1.
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HKROC: an integrated front-end ASIC to readout photomultiplier tubes for the Hyper-Kamiokande experiment
/ Conforti Di Lorenzo, S (Ec. Polytech., OMEGA) ; Afiri, A (Ecole Polytechnique) ; Bolognesi, S (IRFU, Saclay) ; Bombardi, G (CERN) ; Bouyjou, F (IRFU, Saclay) ; Callier, S (Ec. Polytech., OMEGA) ; De La Taille, C (Ec. Polytech., OMEGA) ; Dinaucourt, P (Ec. Polytech., OMEGA) ; Drapier, O (Ecole Polytechnique) ; Dulucq, F (Ec. Polytech., OMEGA) et al.
The HKROC ASIC was originally designed to readout the photomultiplier tubes (PMTs) for the Hyper-Kamiokande (HK) experiment. HKROC is a very innovative ASIC capable of readout a large number of channels satisfying stringent requirements in terms of noise, speed and dynamic range. [...]
2023 - 7 p.
- Published in : JINST 18 (2023) C01035
In : Topical Workshop on Electronics for Particle Physics 2022 (TWEPP 2022), Bergen, Norway, 19 - 23 Sep 2022, pp.C01035
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2.
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HGCROC2: the front-end readout ASICs for the CMS High Granularity Calorimeter
/ Bouyjou, F (IRFU, Saclay) ; Bombardi, G (CERN) ; Callier, S (Ec. Polytech., OMEGA) ; Dinaucourt, P (Ec. Polytech., OMEGA) ; Dulucq, F (Ec. Polytech., OMEGA) ; El Berni, M (Ec. Polytech., OMEGA) ; Guilloux, F (IRFU, Saclay) ; Idzik, M (AGH-UST, Cracow) ; de La Taille, C (Ec. Polytech., OMEGA) ; Marchioro, A (CERN) et al.
The CMS High-Granularity Calorimeter (HGCAL) imposes extremely challenging specifications for the front-end electronics: high dynamic range, low noise, high-precision time information and low power consumption, as well as the need to select and transmit trigger information with a high transverse and longitudinal granularity. HGCROC2 is the second prototype of the readout chip embedding almost all the final functionalities. [...]
2022 - 8 p.
- Published in : J. Phys. : Conf. Ser. 2374 (2022) 012070
Fulltext: PDF;
In : International Conference on Technology and Instrumentation in Particle Physics (TIPP 2021), Online, Canada, 24 - 29 May 2021, pp.012070
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3.
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Beam test performance of the SKIROC2 ASIC
/ Frisson, T (Orsay, LAL) ; Amjad, MS (Orsay, LAL) ; Anduze, M (Ecole Polytechnique) ; Augustin, J.E (Paris U., VI-VII) ; Bonis, J (Orsay, LAL) ; Boudry, V (Ecole Polytechnique) ; Bourgeois, C (Orsay, LAL) ; Brient, J.C (Ecole Polytechnique) ; Callier, S (Ec. Polytech., OMEGA) ; Cerutti, M (Ecole Polytechnique) et al.
Beam tests of the first layers of CALICE silicon tungsten ECAL technological prototype were performed in April and July 2012 using 1–6 GeV electron beam at DESY. This paper presents an analysis of the SKIROC2 readout ASIC performance under test beam conditions..
AIDA-PUB-2015-004.-
Geneva : CERN, 2015
- Published in : Nucl. Instrum. Methods Phys. Res., A 778 (2015) 78-84
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4.
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HGCROC-Si and HGCROC-SiPM: the front-end readout ASICs for the CMS HGCAL
/ Bombardi, G (CERN) ; Marchioro, A (CERN) ; Vergine, T (CERN) ; Bouyjou, F (IRFU, Saclay) ; Guilloux, F (IRFU, Saclay) ; Callier, S (Ec. Polytech., OMEGA) ; Dulucq, F (Ec. Polytech., OMEGA) ; El Berni, M (Ec. Polytech., OMEGA) ; de La Taille, C (Ec. Polytech., OMEGA) ; Raux, L (Ec. Polytech., OMEGA) et al.
The two variants of HGCROC are the ASICs designed to readout the more than 6 million channels of the future HGCAL of CMS, which will consist of hexagonal silicon sensors for a large part but also SiPM-on-scintillators tiles. The SiPM version of the chip was made from the silicon version by adapting only the first amplifier stage. [...]
2020 - 4 p.
- Published in : 10.1109/NSS/MIC42677.2020.9508012
In : 2020 IEEE Nuclear Science Symposium (NSS) and Medical Imaging Conference (MIC), Boston, United States, 31 Oct - 7 Nov 2020
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5.
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Performance of a front-end prototype ASIC for the ATLAS High Granularity Timing Detector
/ Agapopoulou, C. (IJCLab, Orsay) ; Beresford, L.A. (CERN) ; Boumediene, D.E. (LPC, Clermont-Ferrand) ; Castillo García, L. (Barcelona, IFAE) ; Conforti, S. (Ec. Polytech., OMEGA) ; de la Taille, C. (Ec. Polytech., OMEGA) ; Corpe, L.D. (CERN) ; de Sousa, M.J. Da Cunha Sargedas (USTC, Hefei) ; Dinaucourt, P. (Ec. Polytech., OMEGA) ; Falou, A. (IJCLab, Orsay) et al.
This paper presents the design and characterisation of a front-end prototype ASIC for the ATLAS High Granularity Timing Detector, which is planned for the High-Luminosity phase of the LHC. This prototype, called ALTIROC1, consists of a 5$\times$5-pad matrix and contains the analog part of the single-channel readout (preamplifier, discriminator, two TDCs and SRAM). [...]
arXiv:2306.08949.-
2023-08-21 - 20 p.
- Published in : JINST 18 (2023) P08019
Fulltext: 2306.08949 - PDF; document - PDF;
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6.
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7.
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Hyper-Kamiokande
/ Mueller, T A
- Hyper-K.
Approved: 13 March 2023.-
Status: Preparation
External link: Experiment home page
Experiment: RE45
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8.
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Performance of a Front End prototype ASIC for picosecond precision time measurements with LGAD sensors
/ Agapopoulou, C. (IJCLab, Orsay) ; Blin, S. (Ec. Polytech., OMEGA) ; Blot, A. (IJCLab, Orsay) ; Castillo Garcia, L. (Barcelona, IFAE) ; Chmeissani, M. (Barcelona, IFAE) ; Conforti di Lorenzo, S. (Ec. Polytech., OMEGA) ; de La Taille, C. (Ec. Polytech., OMEGA) ; Dinaucourt, P. (Ec. Polytech., OMEGA) ; Fallou, A. (IJCLab, Orsay) ; Garcia Rodriguez, J. (Barcelona, IFAE) et al.
For the High-Luminosity phase of LHC, the ATLAS experiment is proposing the addition of a High Granularity Timing Detector (HGTD) in the forward region to mitigate the effects of the increased pile-up. The chosen detection technology is Low Gain Avalanche Detector (LGAD) silicon sensors that can provide an excellent timing resolution below 50 ps. [...]
arXiv:2002.06089.-
2020-07-06 - 23 p.
- Published in : JINST 15 (2020) P07007
Fulltext: PDF; Fulltext from publisher: PDF;
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9.
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An ultra-low power 10-bit, 50 MSps SAR ADC for multi-channel readout ASICs
/ Firlej, Mirosław (AGH-UST, Cracow) ; Fiutowski, Tomasz (AGH-UST, Cracow) ; Idzik, Marek (AGH-UST, Cracow) ; Kulis, Szymon (CERN) ; Moroń, Jakub (AGH-UST, Cracow) ; Świentek, Krzysztof (AGH-UST, Cracow)
The design and measurement results of a fast, ultra-low power, small area 10-bit SAR ADC, developed for multi-channel readout systems, in particular for applications in particle physics experiments, are discussed. A prototype ASIC was designed and fabricated in 130 nm CMOS technology and a wide spectrum of static (INL<0.4 LSB, DNL<0.3 LSB) and dynamic (ENOB=9.45) measurements was performed to study and quantify the performance of ADC.The ADC converts analogue signals with a sampling frequency up to 55 MHz and power consumption below 1 mW.The ADC works asynchronously, so no external clock is required. [...]
2023 - 16 p.
- Published in : JINST 18 (2023) P11013
Fulltext: PDF;
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10.
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