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CERN Document Server 2,014 elementer funnet  1 - 10nesteslutt  gå til element: Søket tok 0.18 sekunder. 
1.
Source Switched Charge-Pump PLLs for High-Dose Radiation Environments / Prinzie, Jeffrey (Leuven U.) ; Biereigel, Stefan (CERN) ; Kulis, Szymon (CERN) ; Leitao, Pedro (CERN) ; Moreira, Paulo (CERN)
This article presents a radiation tolerant charge-pump phase-locked loop (PLL) with low static phase error variability suitable for high-performance clock systems in high-dose radiation environments. We investigate the use of source switching charge-pump architectures to minimize any voltage- or dose-dependent charge injection and address the limitations of enclosed layout transistors (ELTs) in the conventional drain switched charge-pump. [...]
2023 - 6 p. - Published in : IEEE Trans. Nucl. Sci. 70 (2023) 590-595
In : 2022 IEEE Nuclear and Space Radiation Effects Conference, Provo, Utah, USA, 18 - 23 Jul 2022, pp.590-595
2.
A radiation-hard 80 MHz phase locked loop for clock and data recovery / Toifl, Thomas H ; Moreira, P
A radiation-hard phase locked loop (PLL) was developed to recover a low-jitter clock and data from an 80 MHz biphase mark encoded bitstream. The circuit was implemented in a 0.8 mu m radiation-hard SOI-BiCMOS technology (DMILL) and operates with a power supply voltage of 3.3 V. [...]
1999
In : 1999 IEEE International Symposium on Circuits and Systems, Orlando, FL, USA, 30 May - 2 Jun 1999, pp.524-527
3.
Radiation-Tolerant Digitally Controlled Ring Oscillator in 65-nm CMOS / Biereigel, Stefan (CERN ; Leuven U. ; Brandenburg Tech. U.) ; Kulis, Szymon (CERN) ; Leroux, Paul (Leuven U.) ; Moreira, Paulo (CERN) ; Prinzie, Jeffrey (Leuven U.)
This article presents a radiation-tolerant digitally controlled complementary metal–oxide–semiconductor (CMOS) ring oscillator design suitable for all-digital phase-locked loop (ADPLL) implementations. To address the challenges presented by harsh radiation environments, a wide tuning range oscillator architecture is presented with superior single-event effect (SEE) tolerance. [...]
2022 - 9 p. - Published in : IEEE Trans. Nucl. Sci. 69 (2022) 17-25 Fulltext: PDF;
4.
Development of scalable frequency and power Phase-Locked Loop in 130nm CMOS technology / Firlej, M (AGH) ; Fiutowski, T (AGH) ; Idzik, M (AGH) ; Moron, J (AGH) ; Swientek, K (AGH)
The design and measurements results of a prototype very low power Phase-Locked Loop (PLL) ASIC for applications in readout systems of particle physics detectors are presented. The PLL was fabricated in 130 nm CMOS technology. [...]
AIDA-PUB-2014-006.- Geneva : CERN, 2014 - Published in : JINST 9 (2014) C02006
In : Topical Workshop on Electronics for Particle Physics, Perugia, Italy, 23 - 27 Sep 2013, pp.C02006
5.
Radiation-Tolerant All-Digital PLL/CDR with Varactorless LC DCO in 65 nm CMOS / Biereigel, Stefan (CERN ; Leuven U. ; Brandenburg Tech. U.) ; Kulis, Szymon (CERN) ; Moreira, Paulo (CERN) ; Kölpin, Alexander (Hamburg, Tech. U.) ; Leroux, Paul (Leuven U.) ; Prinzie, Jeffrey (Leuven U.)
This paper presents the first fully integrated radiation-tolerant All-Digital Phase-Locked Loop (PLL) and Clock and Data Recovery (CDR) circuit for wireline communication applications. Several radiation hardening techniques are proposed to achieve state-of-the-art immunity to SingleEvent Effects (SEEs) up to 62.5 MeV cm$^{2}$ mg$^{−1}$ as well as tolerance to the Total Ionizing Dose (TID) exceeding 1.5 Grad. The LC Digitally Controlled Oscillator (DCO) is implemented without MOS varactors, avoiding the use of a highly SEE sensitive circuit element. [...]
2021 - 16 p. - Published in : Electronics 10 (2021) 2741
6.
Charge Buildup and Spatial Distribution of Interface Traps in 65-nm pMOSFETs Irradiated to Ultrahigh Doses / Bonaldo, Stefano (U. Padua (main)) ; Gerardin, Simone (U. Padua (main)) ; Jin, Xiaoming (Northwest Inst. Nucl. Tech., Xian) ; Paccagnella, Alessandro (U. Padua (main)) ; Faccio, Federico (CERN) ; Borghello, Giulio (CERN) ; Fleetwood, Daniel M (Vanderbilt U. (main))
In this paper, a commercial 65-nm CMOS technology is irradiated at ultrahigh ionizing doses and then annealed at high temperature under different bias conditions. The experimental results demonstrate the high sensitivity of pMOSFETs to radiation-induced short-channel effects, related to the buildup of defects in spacer dielectrics. [...]
2019 - 10 p. - Published in : IEEE Trans. Nucl. Sci. 66 (2019) 1574-1583
In : Conference on Radiation and its Effects on Components and Systems, Gothenburg, Sweden, 16 - 21 Sep 2018, pp.1574-1583
7.
International Symposium on High-dose Dosimetry - High-dose Dosimetry   8 - 12 Oct 1984  - Vienna, Austria  .-
1984 STI-PUB-671
8.
Single-Event Effect Responses of CMOS Integrated Planar Multiturn Inductors in LC-Tank Oscillators Under Heavy-Ion Microbeam Irradiation / Adom-Bamfi, Gideon (Leuven U.) ; Biereigel, Stefan (CERN) ; Leroux, Paul (Leuven U.) ; Prinzie, Jeffrey (Leuven U.)
This article presents detailed measurements of a novel radiation effect caused by the sensitivity of on-chip spiral inductors to ionizing particles, leading to single-event frequency transients (SEFTs) in LC-tank oscillators. Quantitative experimental results from heavy-ion microbeam irradiation of two-turn and four-turn inductor samples are presented. [...]
2024 - 11 p. - Published in : IEEE Trans. Nucl. Sci. 71 (2024) 1380-1390
9.
A Radiation-Tolerant 25.6-Gb/s High-Speed Transmitter in 28-nm CMOS With a Tolerance of 1 Grad / Klekotko, A (CERN ; Leuven U.) ; Biereigel, S (CERN) ; Baszczyk, M (CERN) ; Moreira, P (CERN) ; Martina, F (CERN) ; Prinzie, J (Leuven U.) ; Kulis, S (Leuven U.)
This article presents a 25.6-Gbit $\cdot $ s−1 high-speed transmitter (HST) manufactured using 28-nm CMOS technology. The HST macroblock includes an all-digital phase-locked loop (ADPLL), duty cycle corrector (DCC) circuit, data pattern generator, serializer, and a driver capable of driving the differential 100- $\Omega $ line as well as a silicon photonics (SiPh) ring modulator (RM). [...]
2024 - 9 p. - Published in : IEEE Trans. Nucl. Sci. 71 (2024) 2124-2132 Fulltext: PDF;
10.
Analysis of parameter-independent PLLs with bang-bang phase-detectors / Toifl, Thomas H ; Moreira, P ; Marchioro, A ; Placidi, P
The parameter-independent design of Phase-Locked Loops (PLLs) is investigated for the case that a bang-bang phase-detector is used. Two self-biased CMOS PLL structures are proposed and compared, one l eading to a completely parameter- and frequency independent behavior. [...]
CERN-EP-98-042.- Geneva : CERN, 1998 - 5 p. Fulltext: PDF;
In : 5th IEEE International Conference on Electronics, Circuits and Systems, Lisbon, Portugal, 7 Sep 1998, pp.299-302 - CERN library copies

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