Timing Budgeting Flow
Timing Budgeting Flow
Timing Budgeting Flow
Why Budgeting?
In the hierarchical design methodology, budgeting generates SDC timing constraints for block-level implementation Good budgeting inputs generate SDC with good quality No over- or underconstrained SDC
detection of feasibility of top-level timing closure Easier to close top-level timing after implementing blocks
What is Budgeting?
The process of distributing positive and negative slack and creating block-level budget SDC files
Budgeter determines block input and output delays by analyzing delays of inter block timing arcs
Budgeter does not modify timing, only distributes slacks among blocks.
What is Budgeting
Budgeting outputs all SDC constraints required to fully describe the timing environment for blocks Delay setting for I/O (budget allocation) set_input_delay, set_output_delay
set_multicycle_path, set_disable_timing
etc
More accurate pin location, more accurate wire capacitance estimation through I/O pins Need pin assignment Better I/O budgets & wire capacitance, better SDC Ensure better
block implementation
Full-chip in place optimization Assign pin locations to well estimate wire capacitance through I/O pins for each block Plan group-aware global routing Pin-cutting (pin assignment based on global route)
Budgeting flow Check timing environment Perform timing budgeting Check budgeting results
report_timing Check timing is reasonable for budgeting check_fp_timing_environment Check feasibility of the
design and its timing constraints
check_fp_budget_result
Generate a report which allows you to compare real delay with budgeted delay
Budgeting Based On Crosstalk Effect Do budgeting using noise-induced delay Timer will estimate
coupling effect based on congestion map
Budgeter will store effective aggressor driving strength for input pins and coupling cap across block boundary into block CEL view
true by default
The block CEL view is updated with new budgets, no need to load the new sdc file