Mod 1
Mod 1
Mod 1
TRANSISTOR
BIPOLAR JUNCTION TRANSISTOR
This equation is plotted in the
output characteristics of the
transistor with VCE and Ic as
variables
, where m is
the slope of the line and c is the
intercept of the line on vertical
current axis
Considering the following two particular situations
(i) when VCE=0, = > saturation point A
(ii) when Ic=0, = > cutoff point B
By joining these two points, DC load line is obtained
The DC load line represents the dynamic
characteristics of the device
The DC load line gives the values of the Ic and VCE
corresponding to zero signal conditions.
QUIESCENT POINT
It is the point on the DC load line
which represents DC collector
emitter voltage and collector
current in absence of AC signal.
Also called as operating point
Because the variations in VCE and
Ic takes place about this point
when the signal is applied,
The best position for this point is
the midway between the cutoff
and saturation point where the
AC LOAD LINE
Ic=β IB+(1+β)ICO
factor S=10.
3. A Ge transistor with β= 49 has a self biasing
arrangement. Given Vcc = 10 V, RL=1Ω,VCE=5V,
Ic=4.9A as VBE= 0.2V. The stability factor is
derived to be 10. Obtain the values of R 1, R2, RE .
4. A voltage divider bias circuit has the following
datas
I =1mA, VCEQ=5V, β=100, S=8, RE=1kΩ,
CQ
C2 =10µF.
Ans.
VCC = (IC+IB)RC +IBRB+ V BE
= (1+β) IBRC + IBRB + V BE
IB = = 15.5µ A
IC =1.86mA
VCE= VCC -(IC+IB)RC = 11.19V
VC= VCE = 11.19V
• Determine the resistor RB for a fixed bias and
collector to base bias and compare the stability
factors.
VCC=12V,RL=33KΩ, IB=0.3mA, β=100, VCE=6V.
BIAS COMPENSATION
Reduces the amplification signal
Compensation techniques
DIODE COMPENSATION FOR VARIATIONS
IN BASE EMITER VOLTAGE V
BE
DIODE COMPENSATION FOR
VARIATIONS IN Ico
THERMISTOR COMPENSATION
• Minimise change in Ic due to variation of
VBE,B,Ico with temperature
HYBRID PARAMETERS
• TWO PORT NETWORK
........(1)
........(2)
h11 Short circuit input impedance parameter or input
impedance with output short circuited
parameter
1 h 11 h ie h ib h ic
2 h 12 h re h rb h rc
3 h 21 h fe h fb h fc
4 h22 h oe h ob h oc
HYRID PARAMETERS OR h
PARAMETERS
HYBRID EQUIVALENT CIRCUIT OF
TRANSISTOR
ANALYSIS OF TRANSISTOR USING h
PARAMETERS
CURRENT GAIN Ai
INPUT IMPEDANCE Zin
Slide 96
VOLTAGE GAIN Av
OUTPUT IMPEDANCE Zo
Slide
HYBRID EQUIVALENT CIRCUIT OF CE
CONFIGURATION
ib and Vc are selected as independent variables
VB= f1(ib , Vc )
Ic= f2(ib , Vc )
Making use of Taylor’s series expansion, about zero
operating point
=> β
CE TRANSISTOR AMPLIFIER USING h
PARAMETERS
CE AMPLIFIER AC EQUIVALENT CIRCUIT
Slide101
Slide 99
CE AMPLIFIER AC EQUIVALENT
CIRCUIT
WITH AN UNBYPASSED EMITTER RESISTOR
CE AMPLIFIER h PARAMETER
EQUIVALENT CIRCUIT
Voltage divider bias
INPUT IMPEDANCE Zin
Input impedance to transistor base
circuit
CURRENT GAIN