This document describes a BCD ripple counter circuit. It consists of four JK flip-flops that represent the four binary digits of a decimal number. The output of each flip-flop triggers the next in sequence. It counts from 0 to 9 in decimal before resetting to 0. The state transitions of each flip-flop are described to show how the circuit implements a BCD counter.
This document describes a BCD ripple counter circuit. It consists of four JK flip-flops that represent the four binary digits of a decimal number. The output of each flip-flop triggers the next in sequence. It counts from 0 to 9 in decimal before resetting to 0. The state transitions of each flip-flop are described to show how the circuit implements a BCD counter.
This document describes a BCD ripple counter circuit. It consists of four JK flip-flops that represent the four binary digits of a decimal number. The output of each flip-flop triggers the next in sequence. It counts from 0 to 9 in decimal before resetting to 0. The state transitions of each flip-flop are described to show how the circuit implements a BCD counter.
This document describes a BCD ripple counter circuit. It consists of four JK flip-flops that represent the four binary digits of a decimal number. The output of each flip-flop triggers the next in sequence. It counts from 0 to 9 in decimal before resetting to 0. The state transitions of each flip-flop are described to show how the circuit implements a BCD counter.
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BCD Ripple Counter
A decimal counter follows a sequence of
ten states and returns to 0 after the count of 9. Such a counter must have at least four flip-flops to represent each decimal digit, since a decimal digit is represented by a binary code with at least four bits. The sequence of states in a decimal counter is dictated by the binary code used to represent a decimal digit. BCD Ripple Counter If BCD is used, the sequence of states is shown below in the state diagram. This is similar to a binary counter, except that the state after 1001 is 0000. BCD Ripple Counter The logic diagram of a BCD ripple counter is shown below. The four outputs are designated by the letter symbol Q with a numeric subscript equal to the binary weight of the corresponding bit in the BCD code. The flip-flops trigger on the negative edge, i.e., when the CP signal goes from 1 to 0. BCD Ripple Counter BCD Ripple Counter Note that the output of Q1 is applied to the CP inputs of both Q2 and Q8 and the output of Q2 is applied to the CP input of Q4. The J and K inputs are connected either to a permanent 1 signals or to outputs of flip- flops, as shown in the diagram. A ripple counter is an asynchronous sequential circuit and cannot be described by Boolean equations developed for describing clocked sequential circuits. BCD Ripple Counter Signals that affect the flip-flop transition depend on the order in which they change from 1 to 0. The operation of the counter can be explained by a list of conditions for flip- flop transitions. These conditions are derived from the logic diagram and from knowledge of how a JK flip-flop operates. BCD Ripple Counter Remember that when the CP input goes from 1 to 0, the flip-flop is set if J=1, is cleared if K=1, is complemented if J=K=1, and is left unchanged if J=K=0. The following are the conditions for each flip-flop state transition. ◦ Q1 is complemented on the negative edge of every count pulse. ◦ Q2 is complemented if Q8=0 and Q1 goes from 1 to 0. Q2 is cleared if Q8=1 and Q1 goes from 1 to 0. BCD Ripple Counter ◦ Q4 is complemented when Q2 goes from 1 to 0. ◦ Q8 is complemented when Q4Q2=11 and Q1 goes from 1 to 0. Q8 is cleared if either Q4 or Q2 is 0 and Q1 goes from 1 to 0. To verify that these conditions result in the sequence required by a BCD ripple counter, it is necessary to verify that the flip-flop transitions indeed follow a sequence of states as specified by the state diagram. BCD Ripple Counter Another way to verify the operation of the counter is to derive the timing diagram for each flip-flop from the conditions just listed. The timing diagram is shown below with the binary states listed after each clock pulse. BCD Ripple Counter BCD Ripple Counter The BCD counter discussed till now is a decade counter, since it counts from 0 to 9. To count in decimal from 0 to 99, we need a two-decade counter. To count from 0 to 999, we need a three- decade counter. Multiple-decade counters can be constructed by connecting BCD counters in cascade one for each decade. BCD Ripple Counter A three-decade counter is shown below.
The inputs to the second and third
decades come from Q8 of the previous decade BCD Ripple Counter When Q8 in one decade goes from 1 to 0, it triggers the count for the next higher- order decade while its own decade goes from 9 to 0. For instance, the count after 399 will be 400.