Introduction to Computer Architecture

COE 308 Computer Architecture Prof. Muhamed Mudawar Computer Engineering Department King Fahd University of Petroleum and Minerals

Welcome to COE 308

Instructor: Office: Office Phone: Dr. Muhamed F. Mudawar Building 22, Room 328 4642

Schedule and Office Hours:

http://faculty.kfupm.edu.sa/coe/mudawar/schedule/

Course Web Page:

http://faculty.kfupm.edu.sa/coe/mudawar/coe308/

Email:
mudawar@kfupm.edu.sa
Introduction to Computer Architecture Muhamed Mudawar, CSE 308 KFUPM Slide 2

Grading Policy
Homework and Quizzes MIPS Programming Project CPU Design Project Midterm Exam I Midterm Exam II Final Exam 10% 10% 15% 20% 20% 25%

Introduction to Computer Architecture

Muhamed Mudawar, CSE 308 KFUPM

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Late Policy, Attendance, & Makeup

Homework is due at the beginning of class time Late homework is not accepted
Especially if the solution is posted online

Late project is accepted up to 3 days late

But will be penalized 5% for each late day

Attendance will be taken at the beginning of each lecture

Official / medical excuses must be presented within one week

Late attendance is counted as half presence

Two late attendances are counted as one absence

No makeup exam will be given for missing exam or quiz

Introduction to Computer Architecture Muhamed Mudawar, CSE 308 KFUPM Slide 4

Software Tools
MIPS Simulators
MARS: MIPS Assembly and Runtime Simulator
Runs MIPS-32 assembly language programs Website: http://courses.missouristate.edu/KenVollmar/MARS/

SPIM
Also Runs MIPS-32 assembly language programs Website: http://www.cs.wisc.edu/~larus/spim.html

CPU Design and Simulation Tool

Logisim
Educational tool for designing and simulating CPUs Website: http://ozark.hendrix.edu/~burch/logisim/
Introduction to Computer Architecture Muhamed Mudawar, CSE 308 KFUPM Slide 5

Why Study Computer Architecture?

You want to be called Computer Engineer or Scientist You want to become an expert on computer hardware You want to become a computer system designer You want to become a software designer and need to understand how to improve code performance Technology is improving rapidly new opportunities Has never been more exciting! Impacts Electrical Engineering and Computer Science
Introduction to Computer Architecture Muhamed Mudawar, CSE 308 KFUPM Slide 6

Which Books will be Used?

Computer Organization & Design The Hardware/Software Interface
David Patterson and John Hennessy Morgan Kaufmann Publishers Third Edition (2005) is available in bookstore Read the textbook in addition to the course slides

References: MIPS32 Architecture

Volumes I, II, and III are available online

Course webpage
http://faculty.kfupm.edu.sa/coe/mudawar/coe308/
Introduction to Computer Architecture Muhamed Mudawar, CSE 308 KFUPM Slide 7

Course Objectives
Understand modern computers, their evolution, and tradeoffs at the HW/SW interface
Instruction Set Architecture Computer Arithmetic Performance and Metrics Pipelining

Understand the design of a modern computer system

Datapath design Control design Memory System Design I/O System Design
Introduction to Computer Architecture Muhamed Mudawar, CSE 308 KFUPM Slide 8

Five Classic Components

Since the 1940s, computers have 5 classic components Computer Input devices Devices Processor
Keyboard, mouse,

Output devices
Display, printer,

Control Memory Datapath

Input Output

Storage devices
Volatile memory devices: DRAM, SRAM, Permanent storage devices: Magnetic, Optical, and Flash disks,

Datapath Together, they are called the Processor Control Newly added 6th component: Network
Essential component for communication in any computer system
Introduction to Computer Architecture Muhamed Mudawar, CSE 308 KFUPM Slide 9

Fetch - Execute Cycle

Instruction Fetch Fetch instruction Compute address of next instruction Generate control signals for instruction Read operands from registers

Infinite Cycle implemented in Hardware

Instruction Decode

Execute

Compute result value

Memory Access

Read or write memory (load/store)

Writeback Result
Introduction to Computer Architecture

Writeback result in a register

Muhamed Mudawar, CSE 308 KFUPM Slide 10

CPU Clocking
Operation of digital hardware is governed by a clock
Clock period Clock (cycles) Data transfer and computation Update state

Clock period: duration of a clock cycle

e.g., 250 ps = 0.25 ns = 0.25 109 sec e.g., 1/ 0.25 109 sec = 4.0109 Hz = 4.0 GHz
Muhamed Mudawar, CSE 308 KFUPM Slide 11

Clock frequency (rate) = 1 / clock period

Introduction to Computer Architecture

What is Computer Architecture ?

Computer Architecture = Instruction Set Architecture + Computer Organization Instruction Set Architecture (ISA)
WHAT the computer does (logical view)

Computer Organization
HOW the ISA is implemented (physical view)

We will study both in this course

Introduction to Computer Architecture Muhamed Mudawar, CSE 308 KFUPM Slide 12

Instruction Set Architecture (ISA)

Is a subset of Computer Architecture Definition by Amdahl, Blaaw, and Brooks 1964
the attributes of a [computing] system as seen by the programmer, i.e. the conceptual structure and functional behavior, as distinct from the organization of the data flows and controls the logic design, and the physical implementation.

An ISA encompasses
Instructions and Instruction Formats Data Types, Encodings, and Representations Programmable Storage: Registers and Memory Addressing Modes: Accessing Instructions and Data Handling Exceptional Conditions
Introduction to Computer Architecture Muhamed Mudawar, CSE 308 KFUPM Slide 13

Instruction Set Architecture contd

Critical interface between hardware and software
Standardizes instructions, machine language bit patterns, etc. Advantage: different implementations of the same architecture Disadvantage: sometimes prevents using new innovations

Examples
Intel IBM Power HP PA-RISC MIPS Sun Sparc Digital Alpha PowerPC
Introduction to Computer Architecture

(versions)
(8086, 80386, Pentium, ...) (Power 2, 3, 4, 5) (v1.1, v2.0) (MIPS I, II, III, IV, V) (v8, v9) (v1, v3) (601, 604, )
Muhamed Mudawar, CSE 308 KFUPM

Introduced in
1978 1985 1986 1986 1987 1992 1993
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Overview of the MIPS ISA

All instructions are 32-bit wide Instruction Categories
Load/Store Integer Arithmetic Jump and Branch Floating Point Memory Management
PC HI LO
Rt5 Rt5 immediate26
Muhamed Mudawar, CSE 308 KFUPM Slide 15

Registers

R0 - R31

Three Instruction Formats

R-type I-type J-type Op6 Op6 Op6 Rs5 Rs5 Rd5 sa5

funct6

immediate16

Introduction to Computer Architecture

Computer Organization
Realization of the Instruction Set Architecture Characteristics of principal components
Registers, ALUs, FPUs, Caches, ...

Ways in which these components are interconnected Information flow between components Means by which such information flow is controlled Register Transfer Level (RTL) description

Introduction to Computer Architecture

Muhamed Mudawar, CSE 308 KFUPM

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Microprocessor Organization
Front Side Bus

Intel NetBusrt Micro-Architecture

Frequently used paths Less frequently used paths

Bus Unit 2nd Level Cache

8-way Front End

D-Cache
4-way

Fetch & Decode

Trace Cache
Microcode ROM

Execution
Out-of-Order Core Branch History Update

Retirement

BTBs / Branch Prediction

Introduction to Computer Architecture

Muhamed Mudawar, CSE 308 KFUPM

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Abstraction Layers
Software
Compiler Assembler Linker Processor Application Operating System Loader Scheduler Device Drivers Memory Digital Logic Design Circuit Design Physical (IC Layout) Design I/O System

Instruction Set Architecture (Interface SW/HW)

Hardware

Datapath & Control Design

Abstraction hides implementation details between levels Helps us cope with enormous complexity ISA is at the interface between software and hardware
Introduction to Computer Architecture Muhamed Mudawar, CSE 308 KFUPM Slide 18

Technology Improvements
Year 1951 1965 1975 1995 2005 Technology Vacuum tube Transistor Integrated circuit (IC) Very large scale IC (VLSI) Ultra large scale IC Relative performance/cost 1 35 900 2,400,000 6,200,000,000

Processor transistor count: about 30% to 40% per year Memory capacity: about 60% per year (4x every 3 years) Disk capacity: about 60% per year Opportunities for new applications Better organizations and designs
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Growth of Capacity per DRAM Chip

DRAM capacity quadrupled almost every 3 years
60% increase per year, for 20 years

Introduction to Computer Architecture

Muhamed Mudawar, CSE 308 KFUPM

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Processor Performance (1978-2005)

Slowed down by power and memory latency

Almost 10000x improvement between 1978 and 2005

Introduction to Computer Architecture

Muhamed Mudawar, CSE 308 KFUPM

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Microprocessor Sales (1998 2002)

ARM processor sales exceeded Intel IA-32 processors, which came second ARM processors are used mostly in cellular phones Most processors today are embedded in cell phones, digital TVs, video games, and a variety of consumer devices
Introduction to Computer Architecture Muhamed Mudawar, CSE 308 KFUPM Slide 22

Classes of Computers
Desktop / Notebook Computers
General purpose, variety of software Subject to cost/performance tradeoff

Server Computers
Network based High capacity, performance, reliability Range from small servers to building sized

Embedded Computers
Hidden as components of systems Stringent power/performance/cost constraints
Introduction to Computer Architecture Muhamed Mudawar, CSE 308 KFUPM Slide 23

Computer Sales (1998 2002)

Introduction to Computer Architecture

Muhamed Mudawar, CSE 308 KFUPM

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The Processor Market (1997-2007)

Introduction to Computer Architecture

Muhamed Mudawar, CSE 308 KFUPM

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Chip Manufacturing Process

Silicon ingot
Slicer 8-12 in diameter 12-24 in long < 0.1 in thick

Blank wafers
20 to 30 processing steps

Tested dies
Die Tester

Individual dies
Dicer

Patterned wafer

Packaged dies
Bond die to package Part Tester

Tested Packaged dies

Ship to Customers

Introduction to Computer Architecture

Muhamed Mudawar, CSE 308 KFUPM

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Wafer of Pentium 4 Processors

8 inches (20 cm) in diameter Die area is 250 mm2
About 16 mm per side

55 million transistors per die

0.18 m technology Size of smallest transistor Improved technology uses
0.13 m and 0.09 m

Dies per wafer = 169

When yield = 100% Number is reduced after testing Rounded dies at boundary are useless
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Effect of Die Size on Yield

Good Die Defective Die

120 dies, 109 good

26 dies, 15 good

Dramatic decrease in yield with larger dies

Yield = (Number of Good Dies) / (Total Number of Dies) 1 Yield = (1 + (Defect per area Die area / 2))2 Die Cost = (Wafer Cost) / (Dies per Wafer Yield)
Introduction to Computer Architecture Muhamed Mudawar, CSE 308 KFUPM Slide 28

Inside the Pentium 4 Processor Chip

Introduction to Computer Architecture

Muhamed Mudawar, CSE 308 KFUPM

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Inside a Multicore Processor Chip

AMD Barcelona: 4 Processor Cores 3 Levels of Caches

Introduction to Computer Architecture

Muhamed Mudawar, CSE 308 KFUPM

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Course Roadmap
Instruction set architecture (Chapter 2) Computer arithmetic (Chapter 3) Performance issues (Chapter 4) Constructing a processor (Chapter 5) Pipelining to improve performance (Chapter 6) Memory: caches and virtual memory (Chapter 7) Introduction to Parallel Architectures Key to obtain a good grade: read the textbook!
Introduction to Computer Architecture Muhamed Mudawar, CSE 308 KFUPM Slide 31