SDH TRANSMISSION SYSTEM

SDH BASICS

What is SDH?
Pre SDH technology
Characteristics of SDH
Bit Rates
Multiplexing method
Frame Structure
1
 What is SDH ?

SDH is a transmission system protocol .

• Defines the standards for
• Digital signal
• Frame structure
• Multiplexing method
• Digital rate hierarchy
• Interface code pattern

2
 Pre-SDH Transmission Technology

Plesiochronous Digital Hierarchy (PDH)

PDH signals with higher transmission rate are

obtained by simply multiplexing several lower rate
signals (E1, T1)

140Mb
34Mb 34Mb
34/140 140/34

8Mb 8Mb
8/34 34/8

2/8 8/2
2Mb 2Mb

3
 Standardized Bit rates in PDH
Japan USA Europe

5. 397200 kbit/s 564992 kbit/s

x4 x4

4. 97728 kbit/s 274176 kbit/s 139264 kbit/s

x3
x3 x6 x4

3. 32064 kbit/s 44736 kbit/s 34368 kbit/s

x4
x5 x7
6312 kbit/s 8448 kbit/s
2. order
x4 x3 x4

1544 kbit/s 2048 kbit/s

primary rate

x 24 x 30/31

64 kbit/s

4
 Disadvantages of PDH
Tributary access in PDH
Since PDH adopts asynchronous multiplexing method, adding
and dropping of a lower rate 2Mb signal requires a complete
cycle of Multiplexing and demultiplexing

140Mb 140Mb
34Mb 34Mb
140/34 34/140

8Mb 8Mb
34/8 8/34

8/2 2/8

2Mb
Drop Add

5
 Disadvantages of PDH
Interface Standards

No universal standards for

• Electrical interface rate levels
• Frame structure
• Multiplexing method
• optical interface
Causes difficulties network structuring, management and
network interconnections

6
 Disadvantages of PDH

Multiplexing methods
Adopts step by step multiplexing/demultiplexing
method. Which
• increases the cost, power consumption, complexity
• decreases the transmission performance.

7
 Disadvantages of PDH

PDH Maintenance signal

LOS
LOF PDH AIS
AIS Equipment

The frame generation procedure leaves almost no space to

implement additional functions such as alarm generation.

Only a few alarm indications are possible on PDH systems.

8
 What are the differences ?

 Synchronous Network
Basically, all network elements work on a single clock
source.

• Abundant Overhead Bits

To carry large information for Network Management.

• Unified Interface and Multiplexing Specifications

Common to all countries.
Standardized optical interfaces.

9
 What are the benefits? (1)
- Synchronous Network -
 Simple multiplexing process
 Easy access to tributary signals in a multiplexed high
bit rate signal.

Simple Access to Tributaries

1 4 0 M 1 4 0 M
D D F

3 4 M 3 4 M

8 M 8 M

A D D /D R O P M U X

2 M
P D H
S T M -1 S T M -1

M IN I X -C O N N

S D H

2 M

10
 What are the benefits? (2)
- Overhead Bits –

• Realization of highly advanced Network

Management System for:
Fault management
Configuration management
Performance management
Security management
Accounting management

11
 What are benefits SDH? (3)
- Unified Interface –

• Multi-vendor Environment
• International Connection

12
 SDH Bit Rates

CEPT
Europe North America Japan
2.048 Mb/s 1.544 Mb/s 1.544 Mb/s
8.448 Mb/s 6.312 Mb/s 6.312 Mb/s PDH
34.368 Mb/s 44.376 Mb/s 32.064 Mb/s G.702
139.264 Mb/s 97.728 Mb/s

STM-0 51.840 Mb/s

STM-1 155.520 Mb/s
STM-4 622.080 Mb/s SDH
STM-16 2,488.320 Mb/s G.707
STM-64 9,953.280 Mb/s
STM-256 39,813.120 Mb/s
STM: Synchronous Transport Module

13
14
SDH TRANSMISSION SYSTEM
MULTIPLEXING STRUCTURE,
FRAME STRUCTURE AND
POINTER
 Multiplexing Structure
 Frame Structure
 Pointer

15
SDH Multiplexing Structure (2)

16
 Multiplexing Process of SDH
Example: 2 Mb/s to STM-4
2.048Mb/s PDH
S 2.048Mb/s C-12

LO POH C-12 VC-12

pointer offset value
TU-1 PTR VC-12 TU-12

TU-1 PTR 3 TU-1 PTR 2 TU-1 PTR 1 VC-12 31 VC-12 21 VC-12 11 TUG-2

TUG-2 7 TUG-2 1 TUG-3

HO POH TUG-3 3 TUG-3 2 TUG-3 1 VC-4

pointer offset value
AU-4 PTR VC-4 AU-4

AU-4 PTR VC-4 AUG-1

AUG-1 4 AUG-1 3 AUG-1 2 AUG-1 1 AUG-4

SOH AUG-4 STM-4

17
 STM-1 Frame Structure
1 2 3 4 5 6 7 8 8 bits = 1 byte

125 µs
( 1) ( 2) ( 9)
270 bytes

9 261
( 1)
( 2) 3 R-SOH

9
1 AU PTR
rows Payload Capacity

5 M-SOH

( 9)
270 columns 125 µs
R-SOH: Regenerator Section Overhead
M-SOH: Multiplex Section Overhead

8 x 9 x 270 x 8000 frames/s = 155.52 Mbps

18
Byte Interleaved Multiplex and Frame Structure STM-N
STM-1 (AU-4)  STM-N

AAA
STM-1 AU-4
BBB
STM-1 AU-4
CCC N CBA N CBA
STM-1 AU-4
STM-N
NNN
STM-1 AU-4
byte interleaved multiplexing

9 x N 261 x N

ABC NABC N N
R SOH

AU PTRs
9 rows

M SOH
N 125 µs

19
 Pointer Function

R SOH VC-4(1)
VC-4(2)
VC-4(3)
AU PTR
TU12 PTR
P POH
VC-12
O
M SOH TU-3 PTR area POH
H VC-12
POH
VC-12
(

V
C
STM-4 4
)

2 M signal
Example:
2 Mb/s to STM-4 via AU-4 VC-4 (4) 63

2
VC-12 (63)
1

20
 AU-4 Pointer and Pointer Offset Number

H1 * * H2 * * H3H3H3 0 0 0 1 1 1 86 # #
87 # #

435 # # 521 # #
VC-4 522 # #
696 # # 782 # #

H1 H2
# same number for 3 consecutive bytes
NNNNSS I D I D I D I D I D
10 bits

Pointer Configuration

21
TU-12 Pointer and Pointer Offset Numbering

V1 V2 V3 V4

Pointer Justification
Offset Value byte

22
 AU-4 Justification (1)

1
Negative justification opportunity
(3 bytes)
4 0 0 0

Positive justification opportunity

(3 byte)
9

Negative justification control

H1 H2 invert five D-bits accept majority vote
I : Increment bit
N N N N S S I D I D I D I D I D D : Decrement bit
N : New data flag bit Positive justification control
pointer value
invert five I-bits accept majority vote

23
 AU-4 Justification (2)
- Positive Justification -
start of VC-4
H1 Y Y H2 1 1 H3 H3 H3

n-1 n n n n+1 n+1

Frame 1
125 µs
pointer value (n)
H1 Y Y H2 1 1 H3 H3 H3

n-1 n n n n+1 n+1

Frame 2
250 µs
pointer value (I bits inverted)
H1 Y Y H2 1 1 H3 H3 H3 positive justification start of VC-4 (new)

n-1 n n n n+1 n+1

Frame 3
375 µs
pointer value (n+1)
H1 Y Y H2 1 1 H3 H3 H3

n-1 n n n n+1 n+1

Frame 4
500 µs

24
 AU-4 Justification (3)
- Negative Justification -
start of VC-4
H1 Y Y H2 1 1 H3 H3 H3

n-2 n-1 n-1 n-1 n n n n+1 n+1

Frame 1
125 µs
pointer value (n)
H1 Y Y H2 1 1 H3 H3 H3

n-2 n-1 n-1 n-1 n n n n+1 n+1

Frame 2
250 µs
pointer value (D bits inverted)
negative justification start of VC-4 (new)
H1 Y Y H2 1 1

n-2 n-1 n-1 n-1 n n n n+1 n+1

Frame 3
375 µs
pointer value (n-1)
H1 Y Y H2 1 1 H3 H3 H3

n-2 n-1 n-1 n-1 n n n n+1 n+1

Frame 4
500 µs

25
26
SDH TRANSMISSION SYSTEM

OVERHEAD AND MAPPING

• Overhead
• Mapping
• Review Questions

27
 STM-1 Frame Structure and SOH
9 bytes 261 b ytes

RSO H

A U P TR
9 row s

STM-1 PAYLOAD

MSOH

A1 A1 A1 A2 A2 A2 J0

S ection O verhead
B1
D1
E1
D2
F1
D3
} RSOH

AU Pointer(s)
B2 B2 B2 K1 K2

}
D4 D5 D6
D7 D8 D9 MSOH
D10 D11 D12
S1 Z1 Z1 Z2 Z2 M1 E2

: bytes reserved for national use

28
 Function of SOH (1)
Framing (A1, A2)
Regenerator section trace (J0) regenerator section connection check
Data communication channel (D1-3) regenerator section DCC, 192 kb/s
(D4-12) multiplex section DCC, 576 kb/s
Order wire (E1) accessible at regenerators
(E2) accessible at multiplexers
User channel (F1) 64 kb/s clear channel
Error monitoring (B1) regenerator section BIP-8
(B2) multiplexer section BIP-24N
APS signaling (K1,2) automatic protection switching
(K2) also used as MS-AIS and MS-RDI
Synchronization status (S1) indication of quality level
Section status reporting (M1) REI (count of BIP-24N)

A1 A1 A1 A2 A2 A2 J0
B1
D1
E1
D2
F1
D3
} RSOH
RDI ; Remote Defect Indication
(formerly FERF, Far End Receive Failure)
AU Pointer(s)
B2 B2 B2 K1 K2 REI ; Remote Error Indication

}
D4 D5 D6
MSOH
(formerly FEBE, Far End Block Error)
D7 D8 D9
D10 D11 D12 MS ; Multiplex Section
S1 Z1 Z1 Z2 Z2 M1 E2
DCC ; Data Communication Channel
: bytes reserved for national use

29
 Function of SOH (2)
Framing (A1, A2)
Regenerator section trace (J0) regenerator section connection check
Data communication channel (D1-3) regenerator section DCC, 192 kb/s
(D4-12) multiplex section DCC, 576 kb/s
Order wire (E1) accessible at regenerators
(E2) accessible at multiplexers
User channel (F1) 64 kb/s clear channel
Error monitoring (B1) regenerator section BIP-8
(B2) multiplexer section BIP-24N
APS signaling (K1,2) automatic protection switching
(K2) also used as MS-RDI
Synchronization status (S1) indication of quality level
Section status reporting (M1) REI (count of BIP-24N)
A1 A1 A1 A2 A2 A2 J0
B1
D1
E1
D2
F1
D3
} RSOH
RDI ; Remote Defect Indication
AU Pointer(s) (formerly FERF, Far End Receive Failure)
B2 B2 B2 K1 K2
REI ; Remote Error Indication

}
D4 D5 D6
D7 D8 D9 MSOH (formerly FEBE, Far End Block Error)
D10 D11 D12
S1 Z1 Z1 Z2 Z2 M1 E2 MS ; Multiplex Section
; bytes reserved for national use DCC ; Data Communication Channel

30
 Section and Path Trace Method
Node A Node B

LPT HPT MST RST RST MST HPT LPT

RST
J0: Section trace

VC-4 POH (J1: Path trace)

VC-3 POH(J1: Path trace)
VC-12(J2: Path trace)
RST: Regenerator Section Termination MST: Multiplex Section Termination
HPT: High Order Path Termination LPT: Lower Order Path Termination

Node -A Node -B
Path Trace : Used Path Trace : Used
Transmit path trace : 123-565656 Transmit path trace : ABCDEFG
Path Trace expected value Path Trace expected value
: ABCDEGF : 123-565656
Received value : ABCDEFG Received value : 123-565656
31
 Principle of BIP 8

1121 * * * K1 * * * 81 12 22 * * * K2 * * * 82

#n 1i 2i * * * Ki * * * 8i
Block

1n 2n * * * Kn * * * 8n

B1 byte
1 2 * * * ** K * * * * 8
n
Ki =
# n+1 even - - - - - K=0
Block 1 odd - - - - - K=1

32
 BIP Computing Area

RSOH RSOH

AU PTR A U PTR
#n
counted counted
MSOH after scrambling M SOH before scram bling

B1
B1 renewed at every regenerator

# n+1 B2 B2 B2
B2 renewed only at m ultiplexer

BIP 8 for Regenerator Section BIP N x 24 for Multiplex Section

33
 Higher-Order POH Functions (VC-3, VC-4)

Path error monitor (B3) BIP-8

Path status report (G1) REI (Remote Error Indication)
count of error (BIP-8 results)
VC-3 / VC-4
RDI (Remote Defect Indication)
receiving path AIS, signal failure
J1 path trace mismatch
Path trace (J1) verification of VC connection
B3 user programmable, 15 characters
Signal label (C2) indication of VC composition
C2 unequipped, equipped-non-specific,
G1 TUG structure, locked TU, ATM,
async. 34M or 45M, async. 140M,
F2 MAN (DQDB), FDDI
Path user channels (F2, F3) 64 kb/s clear channels
H4 APS signaling (K3) automatic protection switching at the
F3 higher order path level
V C -3 / VC-4 Position indicator (H4) multiframe position for the VC-1, VC-2
K3 pa yload Network operator byte (N1) for tandem connection maintenance
N1

REI; formerly FEBE (Far End Block Error), RDI; formerly FERF (Far End Receive Failure)

34
VC-3/VC-4
TU-12 multiframe indication byte
POH Portion

(V4)

VC-3/VC-4 Payload 9 rows

H4(00)

PTR(V1)

H4 bits
VC-3/VC-4 Payload
H4(01) 1 2 3 4 5 6 7 8 Frame No Time
X X 1 1 X X 0 1 0 0
X X 1 1 X X 1 0 1
PTR(V2) X X 1 1 X X 1 0 2
X X 1 1 X X 1 1 3 500s TU-n multiframe
VC-3/VC-4 Payload
H4(10)
X: Bit reserved for future international standardization. Its content
shall be set to “1" in the interim.
PTR(V3)

VC-3/VC-4 Payload
H4(11)

(V4)

VC-3/VC-4 Payload
H4(00)

In H4(X Y), X Y represent bits 7 and 8 of H4

35
 Path Trace (J1)
Node A Node B Node C
Cross
connection
a
L
P
T c
b
L
P
d T

Terminated Section of J1 (J2) Path Trace

LPT: Lower Order Path Termination

[It will change to HPT(High Order Path Termination) when VC-4 J1 is used]

36
 Functions of POH (VC-1x, VC-2)
Path error monitor (V5) BIP-2
V5
Path status report (V5) REI (Remote Error Indication)
count of error (BIP-2 results)
RFI (Remote Failure Indication)
RDI (Remote Defect Indication)
125µs
receiving path AIS, signal failure
J2
Signal label (V5) indication of VC composition
unequipped, equipped-non-specific,
VC-1x / VC-2

asynchronous, bit synchronous,

byte synchronous, equipped-unused
Path access point identifier (J2) verification of VC connection
N2
user programmable, 15 characters

Network operator byte (N2) for tandem connection maintenance

APS signaling (K4) automatic protection switching at the
K4 lower order path level
REI ; former FEBE (Far End Block Error)
BIP-2 REI RFI Signal Label RDI
1 2 3 4 5 6 7 8
RDI ; former FERF (Far End Receive Failure)
RFI ; formerly this bit was assigned to Path Trace
500µs V5 byte

37
 VC Concatenation

• For the transport of payloads that do not fit

efficiently into the standard set of virtual containers
(VC-3/4/12)
• VC concatenation can be used. VC concatenation is
defined for:
VC-3/4- to provide transport for payloads requiring
greater capacity than one Container-3/4;
VC-12- to provide transport for payloads that require
capacity greater than one Container-12.

38
 Contiguous & Virtual Concatenation
NE-A NE-B NE-C NE-D
STM-16 STM-1 STM-16
AU-4#1 AU-4#1
STM-1 STM-1
STM-4 AU-4#2 AU-4#2
AU-4#3 AU-4#3
AU-4#4 AU-4#4

AU-4#1

VC-4-4c AU-4#2
STM-4c AU-4-4c AU-4-4c
AU-4#3
AU-4#4

Contiguous Virtual Contiguous

Concatenation Concatenation Concatenation

39
 Contiguous Concatenation of X VC-4s
(VC-4-Xc, X=4, 16, 64, 256)

9X 261X 9N 261N

RSOH 261X RSOH 261N

3 1 3 1 N
J1 J1 J1
1 AU-4-4c PTRs B3 1 AU-4-4 PTRs B3 B3
C2 C2 C2
G1 G1 G1
Fixed
5 MSOH F2 C-4-Xc 5 MSOH F2 F2
Stuff C-4-N
H4 H4 H4
F3 F3 F3
K3 K3 K3
STM-N N1 STM-N N1 N1

X-1 VC-4-Xc VC-4-N

VC-4 POH VC-4 POH
VC-4 POH
Concatenated VC-4-Xc
VC-4-N

40
AU-4 Pointer and Concatenation Indication

a) Nine AU-4 pointer bytes H1 Y 1* 1* H2 H3 H3 H3

H1 H2

b) Normal AU-4 pointer N N N N S S I D I D I D I D I D

c) Concatenation indication 1 0 0 1 U U 1 1 1 1 1 1 1 1 1 1

(H1, H2) = AU-4 pointer, H3= pointer action byte , Y=(100UU11)

U=Unspecified, 1*=(11111111)
N = New data flag bit, S= size bit, I= increment bit, D= decrement
bit, U=Unspecified

41