Mask Set Cost: $1M For 90 NM Technology Prototyping Low Volume Production

Multi-Project Wafers
Mask set cost: >$1M for 90 nm technology

Share cost of mask tooling between multiple designs!
Prototyping
Low volume production
Images courtesy of EuroPractice and CMP
Design Flow for MPW

Die Sizes + Production
Volumes
Project Partitioning
Project Cloning
Reticle Floorplaning
Shotmap Definition
Dicing Plan Definition
Reticle, Wafer Shotmap, Wafer Dicing Plans
2
Design Flow for MPW

Die Sizes + Production
Volumes
Project Cloning
Shotmap Definition
3
Why is Dicing a Problem?
Side-to-side dicing!
Correctly sliced out dies
Cut lines along all four edges

No cut line partitioning the die
Standard wafer dicing
MPW dicing
4
Side-to-side Dicing Problem

Given:
Production volume for each die

Reticle floorplan
Wafer shot-map
Find:
Horizontal and vertical dicing

plans for each wafer
To Minimize:
#wafers required to meet

production volumes
5
Dicing Strategies
Wafer Dicing Plan (DP): all horizontal and vertical cut lines used
to cut a wafer
Row/Column DP: cut lines through row/column of reticle images
2
Single wafer dicing plan (SDP) [ISPD04] [KahngR04]
The same wafer DP used for all wafers

Different DPs used for different rows/cols in a wafer
Multiple wafer dicing plans (MDP)
Restricted MDP: the same DP used for all rows/cols of a wafer

Graph coloring based heuristic in [Xu et al. 04]
6
Independent Dies
Under restricted MDP dicing, all reticle images on wafer yield

the same set of dies
Independent set: set of dies that that can be simultaneously
diced from a reticle image
Only maximal independent sets are of interest!
Maximal Independent Sets: {1, 4} {2} {3}

7
ILP for Restricted MDP

Minimize : nw n p
Subject to :
Q( I , D) y
DC
N ( D)
nw y I
I
n p xI
I
N max xI y I
y I # wafers used to dice indep. set I

xI 1 if y I 0, 0 otherwise
8
CMP Floorplan
SDP vs. MDP
9 wafers with SDP

5 wafers with MDP
10
4-Part Dicing
Partition each wafer into 4 parts then dice each part

separately using side-to-side cuts
11
Design Flow for MPW

Die sizes + Production
Volumes
Project Cloning
Shotmap Definition
12
Shotmap Definition Problem

Shotmap #1
?
Reticle Floorplan
Shotmap #2
Simple grid-based shotmap definition algorithm yields an

average reduction of 13.6% in #wafers
13
Design Flow for MPW

Volumes
Project Cloning
Shotmap Definition
14
Reticle Floorplaning Problem

Given:
Die sizes & production volumes
Maximum reticle size
Find:
Placement of dies within the reticle
To Minimize:
Production cost (reticle cost, #wafers, )
15
Reticle Floorplaning Methods
Key challenge: cost estimation
Previous approaches
Simulated annealing [ISPD04]
Grid-packing [Andersson et al. 04, KahngR04]
Integer programming [WuL05]
Our approach: Hierarchical Quadrisection (HQ)
16
Hierarchical Quadrisection Floorplan
At most one die assigned to each region at lowest level

Region widths/heights easily computed from die assignment
HQ mesh more flexible than grid
17
HQ Algorithm
Random initial assignment improved using simulated annealing

SA moves: region exchange, die rotation
Max reticle size enforced throughout the algorithm
Hierarchical structure enables quick cost estimation
18
HQ Floorplan of CMP Testcase
Reticle Area = 2.30 (vs. 2.45)
4 wafers with MDP (vs. 5)

19
Design Flow for MPW

Volumes
Project Cloning
Shotmap Definition
20
Project Cloning
Motivation
Post-processing approach [WuL05]
Die-to-die inspection [Xu et al.]

Reduced wafer cost when there is large variation in production
demands
Insert clones in white space left on reticle
Our approach
Before floorplaning: number of clones proportional to square root of

production volume; clones arranged in clone arrays
During floorplaning: clone arrays assigned to single cell in HQ;
new SA moves: add/delete clone array row/column
After floorplaning: insert additional clone array rows/columns
without increasing cell size
21
Design Flow for MPW

Volumes
Project Cloning
Shotmap Definition
22
Schedule Aware Partition
More decision knobs: fabrication schedule

I will not pay you
after June
Project Partitioning Problem
But, money will be

saved if waiting for
other orders
Given: Reticle size, set of projects

Find: Partition of projects into reticles
To minimize: Sum of manufacturing cost and delay cost
[BACUS05] Schedule-aware partitioning leads to an average

cost reduction of 63.8% vs. schedule-blind partitioning
23
Demand Uncertainty
Customer demands (over reticle life period) may not be

fully known at design time
Only rough customer demand distribution available (e.g., min/max

demand)
MPW become even more attractive in this context: sharing

of demand misprediction risks
Online wafer dicing combined with production of larger

wafer lots can bring further economies of scale (see paper)
Feasible when there are no IP protection issues
24
Robust Reticle Floorplaning

Given:
Die sizes
Maximum reticle size
Distribution of customer orders
Find:
Placement of dies within the reticle
To Minimize:
Expected #wafers required to meet customer orders
over a fixed time horizon
25
Compared Algorithms
HQ with production volume set to the expected customer

demand
HQ+Cloning with production volume set to the expected

customer demand
Distribution-driven simulated annealing

Use expected production cost for evaluating SA moves
Monte-Carlo simulation used to estimate expected cost
26
Robustness Results - Normal
27
Robustness Results Uniform
28
Conclusions & Future Research
Improved MPW design flow
Schedule-aware partitioning: 60% average cost reduction

Project cloning: 10% average wafer cost reduction
HQ reticle floorplan: 15% average wafer cost reduction
Wafer shot-map definition: 13% average wafer cost reduction
MDP wafer dicing: 60% average wafer cost reduction
Future work
Multi-layer reticle design
29

Mask Set Cost: $1M For 90 NM Technology Prototyping Low Volume Production

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Multi-Project Wafers

Mask set cost: >$1M for 90 nm technology

Images courtesy of EuroPractice and CMP

Design Flow for MPW

Design Flow for MPW

Why is Dicing a Problem?

Cut lines along all four edges

Standard wafer dicing

Side-to-side Dicing Problem

Production volume for each die

Horizontal and vertical dicing

#wafers required to meet

Single wafer dicing plan (SDP) [ISPD04] [KahngR04]

The same wafer DP used for all wafers

Multiple wafer dicing plans (MDP)

Restricted MDP: the same DP used for all rows/cols of a wafer

Under restricted MDP dicing, all reticle images on wafer yield

Only maximal independent sets are of interest!

Maximal Independent Sets: {1, 4} {2} {3}

ILP for Restricted MDP

y I # wafers used to dice indep. set I

SDP vs. MDP

9 wafers with SDP

Partition each wafer into 4 parts then dice each part

Design Flow for MPW

Shotmap Definition Problem

Simple grid-based shotmap definition algorithm yields an

Design Flow for MPW

Reticle Floorplaning Problem

Reticle Floorplaning Methods

Key challenge: cost estimation

Our approach: Hierarchical Quadrisection (HQ)

Hierarchical Quadrisection Floorplan

At most one die assigned to each region at lowest level

Random initial assignment improved using simulated annealing

HQ Floorplan of CMP Testcase

Reticle Area = 2.30 (vs. 2.45)

4 wafers with MDP (vs. 5)

Design Flow for MPW

Post-processing approach [WuL05]

Die-to-die inspection [Xu et al.]

Insert clones in white space left on reticle

Before floorplaning: number of clones proportional to square root of

Design Flow for MPW

Schedule Aware Partition

More decision knobs: fabrication schedule

Project Partitioning Problem

But, money will be

Given: Reticle size, set of projects

[BACUS05] Schedule-aware partitioning leads to an average

Customer demands (over reticle life period) may not be

Only rough customer demand distribution available (e.g., min/max

MPW become even more attractive in this context: sharing

Online wafer dicing combined with production of larger

Feasible when there are no IP protection issues

Robust Reticle Floorplaning

HQ with production volume set to the expected customer

HQ+Cloning with production volume set to the expected