1997 TCASII I. Galton Spectral Shaping of Circuit Errors in Digital To Analog Converters
1997 TCASII I. Galton Spectral Shaping of Circuit Errors in Digital To Analog Converters
1997 TCASII I. Galton Spectral Shaping of Circuit Errors in Digital To Analog Converters
1, JANUARY 2004
(12)
(13)
Fig. 10. Schematic of a typical SC integrator. The number of needed time constants, in (12), is given
by the settling time required to reach bits of linearity [14] as
. The required linearity of an integrator is deter-
mined by allocating equal distortion power to each integrator
and considering the loop gains to input-refer individual distor-
tion powers, with the sum of the distortion powers set to 3 dB
(0.5 b) below the target DR.
Assuming that MOS transistors operated in weak inversion
are used in the input stage of the op-amp, and a
compact expression for is obtained
(14)
After is calculated, the noise budget can be adjusted for the
rest of the integrators to accommodate the (typically slight) in-
Fig. 11. Schematic of a high-linearity CT integrator.
crease in the budget of the so designed integrator.
The power consumption of the active-RC integrator shown in
requirements for specific linearity performance [2], [14]. The Fig. 11 is also defined by the of the operational amplifier.
capacitive load driven by is derived from the noise perfor- It can be calculated to reduce the nonlinearity introduced by
mance of each integrator. Considering a one-stage amplifier, the the residual voltage below the limit derived from the target
total noise power at the input of the integrator is SNDR [16].
With a one-stage amplifier, the noise power introduced by the
(9) CT integrator is proportional with the signal bandwidth
with (15)
Fig. 12. Power consumption for g as a function of the noise power ratio R.
Fig. 13. Yield of single-loop solutions for different noise margins.
Fig. 14. Histogram of the power consumption for all audio 16 ADC
Fig. 15.
OSR = 32.
Results of global search for the audio ADC. All solutions found have
solutions.
Fig. 17. Global solutions for the xDSL 16 ADC. Fig. 18. Search results for the xDSL ADCs, with the design space constrained
at ORDER =5 and OSR = 16 .
[5] K. Bult, “Analog design in deep submicron CMOS,” in Proc. Eur. Solid- Georges E. Gielen (S’87–M’92–SM’99–F’02)
State Circuits Conf., Sept. 2000, pp. 11–17. received the M.Sc. and Ph.D. degrees in electrical
[6] R. Schreier. Delta-Sigma Toolbox for Matlab. [Online]. Available: engineering from the Katholieke Universiteit
www.mathworks.com/support/ftp/controlssv5.html Leuven, Leuven, Belgium, in 1986 and 1990,
[7] K. Francken, M. Vogels, and G. Gielen, “Dedicated system-level sim- respectively.
ulation of 16 modulators,” in Proc. IEEE CICC’00, May 2001, pp. From 1986 to 1990, he was appointed as a
Research Assistant by the Belgian National Fund
349–352.
[8] K. Francken and G. Gielen, “A high-level simulation and synthesis en- of Scientific Research. In 1990, he was appointed
vironment for 16 modulators,” IEEE Trans. Computer-Aided Design, a Postdoctoral Research Assistant and Visiting Lec-
turer with the Department of Electrical Engineering
vol. 22, pp. 1049–1061, Aug. 2003.
and Computer Science, University of California,
[9] V. Liberali, V. F. Dias, M. Ciapponi, and F. Maloberti, “TOSCA: A simu-
Berkeley. From 1991 to 1993, he was a Postdoctoral Research Assistant of the
lator for switched-capacitor noise-shaping A/D converters,” IEEE Trans.
Belgian National Fund of Scientific Research, ESAT Laboratory, Katholieke
Computer-Aided Design, vol. 12, pp. 1376–1386, Sept. 1993.
Universiteit Leuven. In 1993, he was appointed as a tenured Research Associate
[10] K. Francken, P. Vancorenland, and G. Gielen, “DAISY: A simula- of the Belgian National Fund of Scientific Research and also an Assistant
tion-based high-level synthesis tool for delta-sigma modulators,” in Professor at the Katholieke Universiteit Leuven. In 1995, he was promoted
Proc. IEEE/ACM Int. Conf. Computer-Aided Design, Nov. 2000, pp. to Associate Professor at the same university, where he is now a full-time
188–192. Professor. His research interests are in the design of analog and mixed-signal
[11] F. Medeiro, B. P. Verdu, and A. R. Vasquez, Top-Down Design of integrated circuits, and especially in analog and mixed signal CAD tools
High-Performance Sigma-Delta Modulators. Boston, MA: Kluwer, and design automation (modeling, simulation and symbolic analysis, analog
1999. synthesis, analog layout generation, and analog and mixed-signal testing). He
[12] F. Medeiro, B. P. Verdu, A. R. Vasquez, and J. L. Huertas, “A vertically is coordinator or partner of several (industrial) research projects in this area.
integrated tool for automated design of 16 modulators,” IEEE J. Solid- He has authored or coauthored one book and more than 100 papers in edited
State Circuits, vol. 30, pp. 762–777, July 1995. books, international journals, and conference proceedings.
[13] S. R. Norsworthy, R. Schreier, and G. C. Temes, Delta-Sigma Data Con- Dr. Gielen has been Associate Editor of the IEEE TRANSACTIONS ON
verters. Piscataway, NJ: IEEE Press, 1997. CIRCUITS AND SYSTEMS—PART I: FUNDAMENTAL THEORY AND APPLICATIONS,
[14] A. Marques, V. Piuri, M. S. Steyaert, and W. M. Sansen, “Optimal pa- and recently also of IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—PART
rameters for 16 modulator topologies,” IEEE Trans. Circuits Syst. II, II: ANALOG AND DIGITAL SIGNAL PROCESSING. He is also a member of the
vol. 45, pp. 1232–1241, Sept. 1998. Program Committees of international conferences (ICCAD, DATE, ISCAS).
[15] O. Bajdechi, J. H. Huijsing, and G. Gielen, “Fast exploration of delta He received the Best Paper Award of the International Journal on Circuit
sigma ADC design space,” in Proc. IEEE ISCAS’02, vol. 2, May 2002, Theory and Applications in 1995. He was the 1997 Laureate of the Belgian
pp. 49–52. National Academy of Sciences, Literature, and Arts and is a member of the
[16] L. J. Breems, E. J. van der Zwan, and J. H. Huijsing, “Design of Editorial Board of the International Journal on Analog Integrated Circuits and
optimum performance-to-Power ratio of a continuous-time sigma-delta Signal Processing.
modulator,” in Proc. Eur. Solid-State Circuits Conf., Sept. 1999, pp.
318–321.
Johan H. Huijsing (SM’81–F’97) was born on May
21, 1938. He received the M.Sc. degree in electrical
engineering and the Ph.D. degree from the Delft
University of Technology, Delft, The Netherlands,
in 1969 and 1981, respectively. His dissertation
focused on operational amplifiers.
He has been an Assistant and Associate Professor
in Electronic Instrumentation with the Faculty of
Electrical Engineering of the Delft University of
Technology since 1969, where he has been a full
Ovidiu Bajdechi (S’95) was born on April 24, 1971. Professor in the chair of Electronic Instrumentation
He received the M.S. degree in electrical engineering since 1990. From 1982 through 1983, he was a Senior Scientist at Philips Re-
from the “Politehnica” University of Bucharest, Ro- search Laboratories, Sunnyvale, CA. Since 1983, he has been a consultant for
mania, in 1996 and the Ph.D. degree from the Delft Philips and, since 1998, for Maxim, Sunnyvale, CA. His research is focused on
University of Technology, Delft, The Netherlands, in the systematic analysis and design of operational amplifiers, analog-to-digital
2003. converters, and integrated smart sensors. He is the author or coauthor of some
From 1996 to 1998, he was a Teaching Assistant 200 scientific papers, 40 patents and 9 books, and coeditor of 11 books.
at the Laboratory for Microelectronic Systems, Dr. Huijsing was awarded the title of Simon Stevin Meester for applied Re-
“Politehnica” University of Bucharest, Bucharest, search by the Dutch Technology Foundation. He is initiator and co-chairman of
Romania. He is currently working in the field the international Workshop on Advances in Analog Circuit Design, which has
of analog-to-digital conversion for low-power, been held annually since 1992. He is a member of the program committee of
low-voltage applications. His reasearch interests are in systematic design of the European Solid-State Circuits Conference and of Eurosensors. He has been
analog circuits and analog circuits synthesis. He is currently a Guest Researcher Chairman of the biennial national Workshop on Sensor Technology since 1991
with Electronic Instrumentation Laboratory, Delft University of Technology. and Chairman of the Dutch STW Platform on Sensor Technology.