FAA AMT Powerplant Vol 1
FAA AMT Powerplant Vol 1
FAA AMT Powerplant Vol 1
5 Digital Techniques
Introduction
As far as the pure basic functions and the number of display units are concerned, an
electronic flight instrument system (EFIS) may be considered as being similar to
some type of flight director system. However, an EFIS is fully integrated with digital
computer--based navigation systems.
It utilizes colour--CRT types of ADI and HSI (Figure 1). Therefore it is far more
sophisticated than a flight director.
This is not only in terms of physical construction, but also in the extent to which it
presents attitude and navigational data to the flight crew of an aircraft.
System Units
Refer to Figure 3.
In a number of EFIS applications, the display of air data (like altitude, airspeed and
vertical speed) is still provided in the conventional manner, i.e. separate indicators
are mounted adjacent to the EFIS display units in the basic ’T’ arrangement.
With the continued development of display technology, however, CRTs with much
larger screen areas have been produced. As may be seen from the BOEING
747--400 flight deck layout in Figure 4, such displays make it unnecessary to provide
conventional primary air data instruments for each pilot.
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Digital Techniques
Preliminary Module 5 Elo Inst Systems
Notes 5.1 5.1.1 - HO - 2
FMSI ALT
300 AP/L
YD
280 10
260
10
240
MACH. 723
DIST 10 GSP
20.0 258
LNR
F O
ML
S I
I N
CRS
020
FE 0688
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Notes
Left Right
control panel control panel
Brightness
control
Preliminary
Data busses
VOR Center IRS TMC VOR ILS TMC VOR Center IRS TMC
DME FCC Left & DME RAD.ALT DME FCC
ILS right WXR Center IRS ILS
RAD.ALT IRS FMCS RAD.ALT Display unit
Left Right FMCS FCC FCC Right Left FMCS
WXR WXR
IRS IRS drive signals
FCC Right FMCS FCC
FE 0689 C
5.1.1 - HO - 3
Elo Inst Systems
Digital Techniques
Preliminary Module 5 Elo Inst Systems
Notes 5.1 5.1.1 - HO - 4
FB 7006
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Digital Techniques
Preliminary Module 5 Elo Inst Systems
Notes 5.1 5.1.1 - HO - 5
FE 0697 A
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Digital Techniques
Preliminary Module 5 Numbering Systems
Notes 5.2 5.2.1 - HO - 1
V frequency counters
V timers
V digital voltmeters
Electronics, particularly with the advent of transistors and integrated circuits, has
revolutionized the techniques in all branches.
V current on and
V current off.
On the other hand, counters must be able to count up to several millions. In order to
solve such tasks, different number systems instead of the decimal system have been
introduced in digital and computer techniques.
Since the dawn of civilization man has found it necessary to count, i.e. to have a
method of representing quantities or measures of manipulating them to perform
functions of
V addition
V subtraction
V multiplication
V division.
Not unreasonably, it was found out that fingers provided an excellent physical aid for
registering any counting exercise to be done in somebody’s head. From this the
decimal system was developed.
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Digital Techniques
Preliminary Module 5 Numbering Systems
Notes 5.2 5.2.1 - HO - 2
The 10 is known as the base of the system and the indices indicate the power to
which the base is raised. The base and the particular index to which it is raised are
called the ’weight’: that is, the least significant weight is 100 which is 1, the next is
101 and so on. The numbers by which each weight is multiplied are called ’digits’. In
practice, only the digits of the system are written, the weights being implied.
14 7
7 ⋅ 100 =7⋅ 1 = 7
4 ⋅ 101 = 4 ⋅ 10 = 40
1 ⋅ 102 = 1 ⋅ 100 = 100
147
or expressed otherwise:
147 = 1 ⋅ 102 + 4 ⋅ 101 + 7 ⋅ 100 = 14710
147 = 1 ⋅ 100 + 4 ⋅ 10 + 7 ⋅ 1 = 14710.
It is obvious that there are other number systems with different bases. Some
examples are:
2 ⋅ 82 + 2 ⋅ 81 + 6 ⋅ 80 = 2268 226 to the base of 8
1 ⋅ 53 + 0 ⋅ 52 + 4 ⋅ 51 + 2 ⋅ 50 = 10425 1042 to the base of 5
1 ⋅ 23 + 1 ⋅ 22 + 0 ⋅ 21 + 1 ⋅ 20 = 11012 1101 to the base of 2 .
Number systems comprise only the amount of figures which are equal to the base:
V base 5: figures 0, 1, 2, 3, 4
V base 2: figures 0, 1
V base 16: figures 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F.
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Digital Techniques
Preliminary Module 5 Numbering Systems
Notes 5.2 5.2.1 - HO - 3
V current on and
V current off.
This is the same as high (H) and low (L) or ’1’ and ’0’. Therefore number systems
with the base of 2 are ideal for use in computer systems.
It is obvious from the example that the digits of the system using a base of 2 are
either ’1’ or ’0’, and this is true for any number expressed to the base of 2.
Figure 1 shows numbers expressed to the base of 2 together with their decimal
equivalent numbers.
Numbers expressed to the base of 2 are useful for electronic counting systems
because electronic circuits which can be set to one of two states are made very
simple, whereas circuits with more than two states, although possible, are much
more complex and less reliable.
The counting system using a base of two is called the ’binary system’ and each ’1’ or ’0’
is called a ’bit’, which stands for ’binary digit’. The number of bits in the binary form of
the decimal number 147 is eight and the highest decimal number which can be obtained
with eight bits is 255.
The binary code discussed so far is not the only code which is expressed in
two--state bits. All counting codes with two--state bits, however, fall into one of two
classes, weighted and unweighted. A weighted code is one in which a ’1’ bit is
allotted different values depending on its position in the number.
Example: The code shown in Figure 2 is weighted; a ’1’ in the 20 position of the
column weight has the value 1, a ’1’ in the 21 position has the value 2, a ’1’ in
the 22 position has the value 4 and so on. The order of bits in unweighted codes
changes in such a way as to make this sort of weighting meaningless.
A system in which binary--type elements are connected together to count to the base of
10 is called a ’binary coded decimal (BCD) system’. BCD is of major importance since
it provides the link between the counting system used by the machine and that used by
man.
The table shown in Figure 2 gives an overview of the different number systems. This
is a weighted code.
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Digital Techniques
Preliminary Module 5 Numbering Systems
Notes 5.2 5.2.1 - HO - 4
With three bits of a binary number a maximum of 8 decimal values can be represented.
A number system to the base of 8 is designated an ’octal system’. The octal system
uses 8 numbers or figures, which are 0, 1, 2, 3, 4, 5, 6 and 7.
31748 = 3 ⋅ 83 + 1 ⋅ 82 + 7 ⋅ 81 + 4 ⋅ 80.
Each digit of the octal number can be represented by 3 bits of a binary number.
Example: 3 1 7 4 (octal)
011 001 111 100 (binary).
With four bits of a binary number a maximum of 16 decimal values can be represented.
A number system to the base of 16 is called a ’hexadecimal system’.
Refer to Figure 3.
In computer technique it is common that a single character contains 8 bits which are
called one ’word’. To represent one character, e.g. ’Z’, 8 lines within a computer are
necessary to transmit this character, from the keyboard to the monitor for instance.
During transmission of the character the current at the 8 lines is on or off, e.g.:
line 1 -- no current = 0
line 2 -- current = 1
line 3 -- no current = 0
line 4 -- current = 1
line 5 -- current = 1
line 6 -- no current = 0
line 7 -- current = 1
line 8 -- no current = 0
This bit combination represents the letter ’Z’. In order to simplify this combination it is
divided into two 4--bit groups: 0101 and 1010. The hexadecimal number for 0101 is
’5’ and for 1010 is ’A’, so the combination 0101 1010 can simply be expressed as
5A(H), whereby the letter H is the abbreviation of hexadecimal.
This method is an easy way to minimize a row of binary digits (bits) to a short row of
hexadecimal numbers, eg.:
Decimal: 100,000
Binary: 0001 1000 0110 1010 0000
Hexadecimal: 1 8 6 A 0.
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Digital Techniques
Preliminary Module 5 Numbering Systems
Notes 5.2 5.2.1 - HO - 5
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Digital Techniques
Preliminary Module 5 Numbering Systems
Notes 5.2 5.2.1 - HO - 6
In every location where there is a 1 bit, the numbers should be added together.
1 S 27 + 0 S 26 + 1 S 25 + 0 S 24 + 1 S 23 + 0 S 22 + 1 S 21
+ 1 S 20 = 17110
To convert a five digit hexadecimal number into a decimal number for example
FB8A716 the position values of five positions have to be determined, namely:
According to Figure 2 the hexadecimal values should be multiplied with the corre-
sponding position values and added together.
To convert a decimal number into an octal number for example 29810 proceed as
follows:
1. Start with the highest power of 8 (octal) that is smaller than the number.
2. Divide the decimal number by that power, keeping only the integer part of the re-
sult.
3. Keep the remainder after the division is done, for the next step.
4. Repeat steps 1. to 3. until all octal digit places are filled, and then put there what-
ever is left after the higher digits were done.
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Digital Techniques
Preliminary Module 5 Numbering Systems
Notes 5.2 5.2.1 - HO - 7
To convert from an octal number to a decimal number for example 4528 conduct as
follows:
1. Take the value of each octal digit, convert it to decimal.
2. Multiply it by the power of 8 represented by the digit’s place in the number.
3. Then all the numbers should be added together.
Read the table from left to right, top to bottom; each digit’s value is multiplied by the
appropriate power of 8 and added together, yielding the result 29810.
Octal number 4 5 2
Decimal value of digit 4 5 2
Power of 8 82 81 80
Value of digit place 64 8 1
Value for this number 64S4= 256 5S8= 40 2S1= 2
Running sum (from left to
256 256+40= 296 296+2= 298
right)
A binary number can be represented in octal form by grouping its bits into sets of
three bits. Each group of three binary numbers represents one octal number.
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Digital Techniques
Preliminary Module 5 Numbering Systems
Notes 5.2 5.2.1 - HO - 8
The base--8 numbers have the advantage of being far shorter than binary numbers,
and hence much easier to work with.
The reason the binary number is broken up into groups of three is because the
largest octal number that can be represented is 7 (the base 8 minus 1). It only takes
3 binary digits to represent the largest octal number 7.
1112 = 1 S 22 + 1 S 21 + 1 S 20 = (4 + 2 + 1) = 78
To convert a 8 bit binary number for example 010101002 the number have to be
broken into groups of three binary digits, starting with the rightmost bit, namely:
Group 1: 100
Group 2: 010
Group 3: 01 or 001
Note: To add an extra 0 to the leftmost side will not change the value of
the number.
1. Each group of three digits has to be converted separately.
2. The binary position values have to be determined.
3. In every location where there is a 1 bit, the numbers should be added together.
Group 1: 1002 = 1 S 22 + 0 S 21 + 0 S 20 = (4 + 0 + 0) = 48
Group 2: 0102 = 0 S 22 + 1 S 21 + 0 S 20 = (0 + 2 + 0) = 28
Group 3: 0012 = 0 S 22 + 0 S 21 + 1 S 20 = (0 + 0 + 1) = 18
To convert from a binary number to an octal number for example 4528 the three digit
binary equivalent has to be listed for each octal figure.
48 = 1 S 22 + 0 S 21 + 0 S 20 = 1002
58 = 1 S 22 + 0 S 21 + 1 S 20 = 1012
28 = 0 S 22 + 1 S 21 + 0 S 20 = 0102
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Digital Techniques
Preliminary Module 5 Numbering Systems
Notes 5.2 5.2.1 - HO - 9
20 = 1 28 = 256
21 = 2 29 = 512
22 = 4 210 = 1,024
23 = 8 211 = 2,048
24 = 16 212 = 4,096
25 = 32 213 = 8,192
26 = 64 214 = 16,384
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Digital Techniques
Preliminary Module 5 Numbering Systems
Notes 5.2 5.2.1 - HO - 10
23 22 21 20
or or or or
8 4 2 1
0 0 0 0 0 0
1 1 0 0 0 1
2 2 0 0 1 0
3 3 0 0 1 1
4 4 0 1 0 0
5 5 0 1 0 1
6 6 0 1 1 0
7 7 0 1 1 1
8 8 1 0 0 0
9 9 1 0 0 1
10 A 1 0 1 0
11 B 1 0 1 1
12 C 1 1 0 0
13 D 1 1 0 1
14 E 1 1 1 0
B 1343
15 F 1 1 1 1
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Digital Techniques
Preliminary Module 5 Numbering Systems
Notes 5.2 5.2.1 - HO - 11
Monitor
Line: 8 7 6 5 4 3 2 1
Current: 0 1 0 1 1 0 1 0 0 = no current
1 = current
FA 1676 A
Key
Keyboard
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Digital Techniques
Preliminary Module 5 Data Conversion
Notes 5.3 5.3.1 - HO - 1
Introduction
Special electronic circuits are employed to link analogue and digital electronic
circuits. These circuits are designated
V analogue--to--digital converter (A/D converter or ADC) circuits
V digital--to--analogue converter (D/A converter or DAC) circuits.
A transducer is a device that serves to translate one type of signal into another type
of signal.
In the field of electronics, a transducer is a device that converts electrical and non--elec-
trical signals, as, for instance, a microphone. The majority of signals produced by
transducers are analogue in nature, that is, the voltage value of the input or output
signal is exactly proportional to the non--electrical signal that the transducer produces or
measures.
The nature of analogue signals (Figure 1, detail a)), such as sound, cannot be
changed, but the way in which the signals are processed can be changed.
In a digital signal processing system (detail b)) the processor block operates only on
binary coded numbers:
V ADCs translate analogue signals over a specified range into binary coded
numbers.
V DACs produce an analogue voltage or current output from a binary coded
number input.
In order to translate the analogue signal into a digital (numeric) one, the resolution on
the time and amplitude axes must be limited.
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Digital Techniques
Preliminary Module 5 Data Conversion
Notes 5.3 5.3.1 - HO - 2
The amplitude and time axes are subdivided into a number of equally spaced
intervals, and thereby, the resolution of measurement is limited to the width of one of
these intervals (detail b)).
Subdividing an axis in this manner quantizes the variable on that axis. Then only one
of a fixed number of values (detail c)) can be assumed by the variable.
Sampling refers to subdividing the time axis into a finite number of intervals.
The analogue signal can be thought of as being periodically sampled to obtain a new
signal value.
Figure 3, detail a) shows a sampling example of a sine wave. In detail b) a square
wave is illustrated.
Quantization means that the maximum output range of an analogue signal is divided
into a fixed number of small, equal intervals designated ’1 LSB output level change’,
i.e. an output level change by 1 LSB. Each interval is then associated with a fixed
binary number.
In order to quantize the time axis of measurement it is only necessary to generate
pulses periodically. Each pulse is a command to measure the amplitude and to store
the result.
The digital hardware required to produce the required pulse train is extremely simple,
amounting to only a multivibrator circuit and a counter to divide the oscillator
frequency to an appropriate value, namely the sampling rate.
Review of OP Circuits
Note: The minus sign indicates that the input signal is inverted, that means, if the input
voltage UI is negative, the output will be positive or vice versa.
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Digital Techniques
Preliminary Module 5 Data Conversion
Notes 5.3 5.3.1 - HO - 3
If there is more than one input current as shown in detail b), the sum of the currents
flowing to the inverting terminal of an OP circuit used as adder circuit equals the
feedback current If = I5 according to Kirchhoff’s law:
0 = I1 + I2 + I3 + I4 + I5 /--I5
Un
− I5 = I1 + I2 + I3 + I4 /I n =
Rn
UO
− = U1 + U2 + U3 + U4 /⋅ R5
R5 R1 R2 R3 R4
− U O = U 1 ⋅ R5 + U 2 ⋅ R5 + U 3 ⋅ R5 + U 4 ⋅ R5
R1 R2 R3 R4
The last equation shows that the output voltage is the weighted sum of the input
voltages.
The weighting factor is determined for each input by the ratio of the feedback resistor
R5 to the input resistor (R1, R2, R3 or R4) in that branch. Any number of inputs is
possible by simply connecting additional input resistors.
The importance of the scaling adder circuit is realized when it is considered how binary
numbers are converted into decimal numbers.
A four--digit binary number can be translated into the equivalent decimal value 8:
1000 bin = 1 ⋅ 2 3 + 0 ⋅ 2 2 + 0 ⋅ 2 1 + 0 ⋅ 2 0 = 8
There is a similarity between this equation and the scaling adder function in the equation
mentioned before.
Refer to Figure 5.
When the resistor ratios of the 4 inputs are matched to the power of 2,
R5 = 8, R5 = 4, R5 = 2 and R5 = 1,
R4 R3 R2 R1
and the input voltages U1 to U2 are referred to UREF, the following formula is
achieved:
Example: The switches are set for binary ’1000’. The reference voltage equals --1 V to
provide a positive output voltage UO according to the last formula. The output
voltage produced will be
U o = (− 1 V) ⋅ 8 + 0 V ⋅ 4 + 0 V ⋅ 2 + 0 V ⋅ 1 = − 8 V
U o = (− 1 V) ⋅ 2 3 + 0 V ⋅ 2 2 + 0 V ⋅ 2 1 + 0 V ⋅ 2 0 = − 8 V
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Digital Techniques
Preliminary Module 5 Data Conversion
Notes 5.3 5.3.1 - HO - 4
The term 0 V (= UREF) instead of --1 V (= UREF) is set, because these inputs are
switched to ground. The input at R1 is the least significant bit (LSB), and the
input at R4 is the most significant bit (MSB). The output voltage will be +8 V,
because of the 180° phase shift of the amplifier (--8 V is the value of --UO, UO =
+8 V).
In most DACs the switches are implemented with complementary metal oxide silicon
(CMOS) field effect transistors (FET), so that the circuit is fully electronic.
Such a simple DAC as described before can also be used as an amplifier with
digitally controlled gain. If the fixed reference voltage is replaced by a signal source,
then the output will be an amplified version of the source, whose gain is determined
by the switch setting.
The construction of a DAC as shown in Figure 5 is not complex, yet it has some
serious limitations. The most important factor to be considered is the exponential
series of the resistor values in the network. A resistance error of 10 % in the least
significant bit would cause a 10 % error in the basic increment of the analogue
output.
As an example a four--bit DAC with --1 V reference should be considered. The basic
increment of the analogue output is 1 V, and its range is from 0 to 15 V. A 10 %
tolerance in the LSB resistor means that the output error contributed by the LSB
branch would be about +0.1 V, which is 10 % of the basic 1 V interval.
An error of 10 % in the MSB resistor, however, would cause an error of about +0.8 V,
which is 80 % of one basic interval in the output. Consequently, the resistor values
must be extremely accurate to ensure linear operation of the DAC.
Another problem is the effect of a very wide range of input resistor values on the
operational amplifier’s operation. The largest input resistor cannot be made so large
that it approaches the value of the input impedance of the OP (within a factor of ten).
If it does, earlier assumptions in the analysis about no current flowing into the ’--’ input
of the OP are invalid. On the other hand, the smallest resistor cannot be made so small
that it approaches the value of the OP output impedance (again, within a factor of ten).
A special resistive network is the R--2R ladder network, as shown in Figure 6. The
circuit derives its name from the fact that only two different values of resistance are
used, one being twice the value of the other. The feedback resistor in the OP circuit is
selected to obtain the desired gain. Since only two resistor values are needed, it is
considerably easier to match their tolerances. When the resistors are integrated on a
single chip of silicon, their relative values will almost always be identical, even though
their absolute resistances may vary.
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Digital Techniques
Preliminary Module 5 Data Conversion
Notes 5.3 5.3.1 - HO - 5
Since the resistor ratios are the most important factors in the R--2R ladder, absolute
accuracy is not critically important. For this reason, if the resistors change in equal
proportion with temperature, no errors will be seen on the D/A output, since the ratios
remain identical.
The four--input ladder network is redrawn in Figure 7 to illustrate how a current
induced at one end of the network is successively divided by two in each stage. If a
current originates at an input closer to the end, it will have been divided less when it
reaches the end, and consequently will have more weight.
Using the idea of superposition, and assuming that the source voltage is identical for the
digits ’B3’ to ’B0’, it can be seen that the current flowing through the terminal branch of
the ladder network is the weighted sum of the binary input digits. An operational
amplifier is only added to amplify the current flow in the terminal branch to a useful level.
Refer to Figure 6 again.
Because the resistance of the network as viewed from the OP’s ’--’ input is always the
same, regardless of how many stages are present in the ladder network, a value of ’R’
can be selected so that the input and output impedances of the OP will never approach.
Thus, loading the OP will never be a problem.
Finally, the effect of transistor switches is perfectly balanced, since the resistance, that
each transistor faces, is identical no matter which branch it controls.
Introduction
Amplitude Quantization
Refer to Figure 8.
Amplitude quantization means that the maximum input range of an analogue signal is
divided into a fixed number of small, equal intervals designated ’1 LSB output level
change’, i.e. an output level change by 1 LSB.
Each interval is associated with a fixed binary number. Prerequisite for an ADC to
perform such a function are two factors which must be specified:
V the maximum range of analogue input voltage
V the output resolution, determined by the number n of output bits.
The more binary digits (bits) of outputs are available, the better the resolution and the
more precisely can the analogue signal be encoded.
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Digital Techniques
Preliminary Module 5 Data Conversion
Notes 5.3 5.3.1 - HO - 6
Resolution
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Digital Techniques
Preliminary Module 5 Data Conversion
Notes 5.3 5.3.1 - HO - 7
In this type of ADC, the analogue input signal controls the pulse width of a monost-
able multivibrator, whose output is used for gating the clock input of a counter.
The count value present in the counter at the end of the monostable’s pulse width is
proportional to the analogue input.
This approach is particularly useful when the analogue input is controlled by a
potentiometer; there is a direct control over the monostable’s pulse width by varying
the resistance (shaft angle) of the potentiometer. If the analogue input is electrical in
nature, the potentiometer can be replaced by a controlled--resistance device, such as
an FET transistor.
With a fairly high speed system clock frequency of 20 MHz, a 10--bit A/D converter
designed for using the time--window technique provides a sample period of about
55 ms (approximately 18 kHz), which is too slow for any analogue signals with
frequency components greater than 1.8 kHz. If speed is not important the time--win-
dow converter will be the most efficient design.
Note: The ’timing components’ referred to are the resistor and capacitor components.
Advanced techniques using the ramp approach utilizes two ramps:
V one to measure a fixed, accurate reference voltage
V one to measure the signal source.
For measuring the reference voltage and comparing it with the signal source,
the timing components of the ramp generator are calibrated against the accurate
voltage reference on every conversion.
Thus, variations in the timing components over time are compensated for.
This technique is known as ’dual--slope A/D conversion’.
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Digital Techniques
Preliminary Module 5 Data Conversion
Notes 5.3 5.3.1 - HO - 8
This is the basic idea behind the OP circuits. If the input of a circuit is analogue and
its output is digital, then a prerequisite for the presence of feedback will be a
digital--to--analogue converter necessary to carry out the comparison between the
two analogue signals. Thus, in closed--loop A/D converter circuits, one of the
components must be a D/A converter.
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Digital Techniques
Preliminary Module 5 Data Conversion
Notes 5.3 5.3.1 - HO - 9
With this characteristic the conversion time is directly proportional to the rate of
change of the analogue input signal, and when any part of the analogue signal is
changing by more than one incremental step per clock pulse, a substantial error is
introduced.
Just like the tracking ADC, the successive approximation register ADC uses an
integrated DAC as a feedback loop, whose analogue output is compared with the
input signal.
Bit 7 (MSB):
1. Set the MSB to ’1’ and all other bits to ’0’.
2. Compare the analogue input to the D/A output.
V When the analogue input is greater than the D/A feedback value, then
’10000000’ is less than the correct digital representation. Leave the MSB at ’1’
and go on to the next lower significant bit.
V When the analogue input is less than the D/A feedback value, then ’10000000’
is greater than the correct digital representation. Reset the MSB to ’0’ and go
on to the next lower significant bit.
Bit 6:
3. Set bit 6 to ’1’, leaving all other bits unchanged.
4. Compare the analogue input to the D/A output.
V When the analogue input is greater than the D/A feedback value, then
’X10000000’ is less than the correct digital representation. Leave bit 6 at ’1’ and
go on to the next lower significant bit.
V When the analogue input is less than the D/A feedback value, then ’X10000000’
is greater than the correct digital representation. Reset bit 6 to ’0’ and go on to
the next lower significant bit.
Bit 5:
5. Set bit 5 to ’1’, leaving all other bits unchanged.
6. Compare the analogue input to the D/A output.
V When the analogue input is greater than the D/A feedback value,
then ’XX10000000’ is less than the correct digital representation. Leave bit 5 at
’1’ and go on to the next lower significant bit.
V When the analogue input is less than the D/A feedback value, then ’XX10000000’
is greater than the correct digital representation. Reset bit 5 to ’0’ and go on to the
next lower significant bit.
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Digital Techniques
Preliminary Module 5 Data Conversion
Notes 5.3 5.3.1 - HO - 10
Bit 4 to 0:
7. For bit 4 to bit 0 (LSB) the sequence is continued in the same manner as de-
scribed for bit 7 to bit 5.
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a) General analogue signal processing system
Notes
Analogue--
converter
Digital
signal
B 1348 A
processor
5.3.1 - HO - 11
Data Conversion
Digital Techniques
Preliminary Module 5 Data Conversion
Notes 5.3 5.3.1 - HO - 12
11
10
9
8
Amplitude
7
(mV)
6
5
4
3
2
1
0 10 30 50 70 90 110 130 150 170 190 Time (ms)
11
10
9
8
Amplitude
7
(mV)
6
5
4
3
2
1
Time 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 160 170 180 190
Quantized
0 3 6 8 9 9 9 7 6 5 5 6 6 7 8 8 8 7 7 6
amplitude
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Digital Techniques
Preliminary Module 5 Data Conversion
Notes 5.3 5.3.1 - HO - 13
Amplitude
Amplitude
Original square wave
Square wave reproduced from the samples
t
A 1771 A
Figure 3 Sampling
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Digital Techniques
Preliminary Module 5 Data Conversion
Notes 5.3 5.3.1 - HO - 14
a) Inverting amplifier
IF R1
II R2
Ud
UI
UO
IR1 R1
U1
IR2 R2 IR5
U2
IR3 R3 R5
U3
IR4 R4
U4
Ud
UO
B 1349 B
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Digital Techniques
Preliminary Module 5 Data Conversion
Notes 5.3 5.3.1 - HO - 15
R5
Reference
voltage
’1’ B0 (LSB) R1
--
’0’
+
’1’ B1 R2
’0’
’1’ B2 R3
’0’ UO
’1’ B3 (MSB) R4
--UREF
’0’
A 1784 D
R5 = 1 R5 = 2 R5 = 4 R5 = 8
R1 R2 R3 R4
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Rf
Notes
Preliminary
R R R 2R
--
2R 2R 2R 2R 2R
(LSB) B0 B1 B2 B3 (MSB)
5.3
UO
--UREF
A 1783 D
5.3.1 - HO - 16
Data Conversion
Notes
20 mA 20 mA R 10 mA R 5 mA R 2.5 mA
10 mA 5 mA 2.5 mA
2R 2R 2R 2R 2R 2R
40 mA --Terminal
5.3
UREF
A 1779 B
B0 B1 B2 B3
LSB MSB
5.3.1 - HO - 17
Data Conversion
Digital Techniques
Preliminary Module 5 Data Conversion
Notes 5.3 5.3.1 - HO - 18
Analogue input
FB 1347 B
9
8
7
Quantization
6
5
change
output
1 LSB
level
Maximum input range
Figure 8
3
2
1
0
Binary numbers
Digital output
Q2 Q1 Q0
1
0
1
0
1
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Digital Techniques
Preliminary Module 5 Data Conversion
Notes 5.3 5.3.1 - HO - 19
Q
UA
UB
A 1796 B
Analogue ground
UA > UB Q = ’1’
UA < UB Q = ’0’
UA = UB Previous state *
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Digital Techniques
Preliminary Module 5 Data Conversion
Notes 5.3 5.3.1 - HO - 20
Reference voltage
UREF = 10 V
Overflow
Q8
10.0 V
Q7
8.75 V
Q6
7.50 V
Q5 Binary
coded
6.25 V output
B2
Q4
8--line
5.00 V
to B1
3--line
encoder B0
3.75 V Q3
2.50 V Q2
Combinational
logic
1.25 V Q1
Analogue
input
Q0
A 1795 A
0.00 V
Analogue ground
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Input Voltage Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 B2 B1 B0 Over-
Notes
flow
Preliminary
Less than 0 V 0 0 0 0 0 0 0 0 0 0 0 0 0
0 V to 1.25 V 0 0 0 0 0 0 0 0 1 0 0 0 0
1.25 V to 2.50 V 0 0 0 0 0 0 0 1 1 0 0 1 0
2.50 V to 3.75 V 0 0 0 0 0 0 1 1 1 0 1 0 0
3.75 V to 5.00 V 0 0 0 0 0 1 1 1 1 0 1 1 0
5.3
6.25 V to 7.50 V 0 0 0 1 1 1 1 1 1 1 0 1 0
7.50 V to 8.75 V 0 0 1 1 1 1 1 1 1 1 1 0 0
8.75 V to 10.0 V 0 1 1 1 1 1 1 1 1 1 1 1 0
5.3.1 - HO - 21
Data Conversion
Monostable Digital outputs
Notes
multivibrator
Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0
Preliminary
Pulse synchronizer
Trigger
Q
1 Q Parallel load
D
8--bit register
D7 D6 D5 D4 D3 D2 D1 D0
Analogue
input
(potentiometer)
5.3
Count
System clock
clock & 8--bit natural binary counter
Clear
A 1793 B
5.3.1 - HO - 22
Data Conversion
Digital outputs
Notes
Analogue
input Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0
Comparator Pulse
Preliminary
synchronizer
U Q Parallel load
I D
8--bit register
D7 D6 D5 D4 D3 D2 D1 D0
Q4 Q3 Q2 Q1 Q0
5.3
Q7 Q6 Q5
Ramp
Ramp
generator Clear pulse
A 1792 B
5.3.1 - HO - 23
Data Conversion
Comparator UA > UB = count up
Analogue UA < UB = count down
input
Notes
UA
UI
UB D Q UP/DOWN
Preliminary
8--bit
natural binary
up/down counter
CLK
Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0
System
clock
D7
Analogue
feedback D6
5.3
Analogue
DAC output D4
8--bit Digital
DAC D3 output
D2
D1
D0
A 1790 B
5.3.1 - HO - 24
Data Conversion
Digital Techniques
Preliminary Module 5 Data Conversion
Notes 5.3 5.3.1 - HO - 25
FA 1789 B
t
Tracking error
Up/down input
superimposed
(red coulour)
to counter
down = 0)
(up = 1
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Analogue Comparator
input
Notes
UA
UI CO HIGH/LOW
UB Successive
Preliminary
approximation
R
register
(SAR)
CLK
Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0
Clear
D7
D6
System
5.3
Analogue Analogue
DAC output D4
feedback 8--bit Digital
DAC D3 output
D2
D1
D0
A 1788 B
5.3.1 - HO - 26
Data Conversion
Digital Techniques
Preliminary Module 5 Data Conversion
Notes 5.3 5.3.1 - HO - 27
Operating Table:
Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 CO
1 0 1 1 0 1 0 0 1 0 0 0 0 0 0 0 1*
1 1 0 0 0 0 0 0 0
1 0 1 0 0 0 0 0 1
1 0 1 1 0 0 0 0 1
1 0 1 1 1 0 0 0 0
1 0 1 1 0 1 0 0 1
1 0 1 1 0 1 1 0 0
1 0 1 1 0 1 0 1 0
1 0 1 1 0 1 0 0
* = initial output
A 1786 A
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Notes
output
256
One conversion cycle
224
(10110100)2 = (180)10
192
160
5.3
128
96
64
32
FA 1787 C
t
0 1 2 3 4 5 6 7 8 9/0 1 2 3 4 5 6 7 8 9/0
5.3.1 - HO - 28
Data Conversion
Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.1 - HO - 1
Refer to Figure 1.
In a modern aircraft, the cockpit crew is provided with many different information.
To handle this amount of data with a minimum of manpower and ’in time’, it is
necessary to reduce the number of indicators in the cockpit, i.e. no longer using a
separate indicator for each system/sensor.
Refer to Figure 2.
This is achieved by displaying all data from the various systems on some few
’multi--purpose indicators’.
A system which handles the flow and display of data of many or all aircraft systems is
called an ’integrated digital avionic system’.
The advantages of such a system are
V it provides a better overview over the actual condition of each connected sys-
tem
V it reduces the flight crew’s workload
V less time (and money) is required for maintenance
V it saves electrical power consumption
V the weight is reduced (wiring, units).
Refer to Figure 3.
A digital avionic system replaces the former instrumentation by an electronic flight
instrument system (EFIS) and/or an engine indication and crew alerting system
(EICAS). This includes the change from old analogue equipment to modern systems,
because digital outputs are required.
Refer to Figure 4.
The new generation of aircraft avionics is highly integrated. It saves electrical power
and weight. It provides high accuracy and reliability. The level of integration varies
(whether only the main avionic systems are combined or all), depending on the type
of aircraft.
An essential function of an integrated digital avionic system is the exchange of
information between subsystems and/or between line replaceable units (LRU) within
a subsystem.
Note: A line--replaceable unit (LRU) (also called ’black box’) is a unit, which can be
replaced at flight--line level in a short time.
To incorporate a fully integrated digital avionic system and to ensure the required
information exchange, a digital data bus is required. This bus is used to provide a
two--way interface between various computers, sensors and indicators.
The interface between computers and/or external devices (e.g. transceivers,
receivers) is accomplished via the digital data bus. Data may travel ’oneway’ or in
two directions, depending on the system design.
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.1 - HO - 2
Refer to Figure 5.
Typically, the data bus is a serial bus on which the data are transmitted sequentially,
i.e. one word after the other. A serial bus is commonly used for long--distance data
transmissions (more than 50 m) as required in large aircraft.
The bus is made up of a twisted pair of wires which are shielded and jacketed.
The shielding is grounded at all terminal ends and breakouts to keep bit distortion at
a low level. Shield grounding and high voltage spike protection within the individual
data--receiving components ensure accurate transmissions.
Some of these information are in the form of discrete data. Typically, these data are
formed by switching between +28 V DC and open (or between ground and open).
Discrete data are carried on a single wire.
This type of information is used for annunciators, warnings and wherever simple
‘condition information’ is sufficient. This is a small portion of the total information
interchange.
There are different data bus systems found and used in an integrated digital avionic
system. Each bus system has its own organization in terms of addressing, data,
wordsize, electrical characteristics and speed according to certain standards.
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.1 - HO - 3
FB 7005
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.1 - HO - 4
FB 7006
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.1 - HO - 5
FB 2395 A
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Notes
B 7007 A
5.4
5.4.1 - HO - 6
Data Buses
Notes
Inertial Central
Symbol
reference air data EHSI EADI
generator
Preliminary
system computer
5.4.1 - HO - 7
Data Buses
Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 1
Introduction
Refer to Figure 1.
Aeronautical Radio Incorporated (ARINC) is a corporation in which commercial
airlines are the main shareholders. Other shareholders include air transport
companies, aircraft manufacturers and aircraft equipment manufacturers.
Amongst their activities, ARINC sponsors the ’Airlines Electronic Engineering
Committee’ (AEEC) to formulate standards for electronic equipment and systems for
commercial airlines.
One of these standard is the ’ARINC 429’ Mark 33 Digital Information Transfer
System (DITS). The first revision ’ARINC 429--1’ was issued on 11th April, 1978.
The current specification is ’ARINC 429--10’.
There are two main advantages in standardizing a digital information transfer system:
V Significant savings in size and weight of avionic units and the interconnecting
wiring between them
V Cost savings, since a unit can be used on different aircraft with little or no
modification.
The ARINC 429 bus system is made up of transmitters (source) and receivers (sink)
connected by shielded, twisted wire pairs.
Data is transmitted by a single transmitter to either a single receiver or a group of up
to 20 receivers connected in parallel.
Each ARINC 429 bus carries data in one direction only. Bi--directional transmission
between two line--replaceable units (LRUs) must be accomplished by using two sets
of transmitters, receivers and twisted--wire--pair buses.
Each LRU must have its own transmitter and its own receiver.
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 2
Refer to Figure 2.
In the octal label, bits 1 to 8 are used to represent numbers of 0 -- 377. The 8 bits are
divided into two groups of 3 bits and one group of 2 bits. Each group represents a
digit encoded in binary.
The octal label is transmitted with the most significant bit (MSB) (bit 1) of the most
significant digit first. This ’reversed label’ characteristic is a legacy from past systems
in which the octal coding of the label field was of no particular significance.
Example: In the following table, line one shows the label ’230’ = true airspeed’, line two
shows the label ’312’= ground speed.
Bit number 8 7 6 5 4 3 2 1
LSB MSB
Octal value (1 2 4) (1 2 4) (1 2)
1 0 0 0 1 1 0 0 1
Decoded 0 3 2
2 0 1 0 1 0 0 1 1
Decoded 2 1 3
Data Field
Units, ranges, resolution, refresh rate and number of significant bit for the informa-
tion transferred are encoded in either binary--coded decimal (BCD) (Figure 3,
detail b)) or binary (BNR) (detail a)) (two’s complement) fractional notation. Discrete
information is also sent via the ARINC 429 bus.
If the datafield contains bits in a binary (BNR) format, the most significant bit of the
data field represents one half of the maximum possible of the value transmitted.
Each successive (less significant) bit represents one half of the previous (more
significant) bit. Negative numbers are encoded as the two’s complement of positive
values. The negative sign is reflected in the sign/status matrix.
If the datafield bits 11 to 29 contain bits in a binary--coded decimal (BCD) format,
the data is grouped into 4 bit digits, each denoting a decimal column.
The 19 data bits are broken up into four groups of 4 bits and one group of 3 bits.
Each group of 4 can represent a number from 0 to 9. The fifth group can represent a
number from 0 to 7.
In the data field, only those bits, which are required to transmit parameter range and
resolution, are used. The remaining bits are set to logic 0 and designated as pads (P)
(detail c)).
Angles 0° to 359.xxx° are encoded as 0° to ±179.xxx°. The positive portion of the
semicircle represents 0° to 179.xxx°. The negative portion includes 180° to 359.xxx°.
An ’all zeros’ configuration represents 0° and 180° degrees.
An ’all ones’ configuration represents 179.xxx° and 359.xxx°. two’s complement
notation is used for the negative half in combination with the sign bit.
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 3
Data Types
Sign/Status Matrix
Refer to Figure 4.
Figure 4 shows the sign status matrix for a binary (BNR) and binary-- coded decimal
(BCD) word format.
Parity Check
The parity check is one of the simplest of all error checking methods used in data
handling. There are two basic parity configurations: odd and even. ARINC 429
transmissions are always of ’odd parity’.
Bit 32 is the parity bit. ARINC 429 receivers are programmed to always expect an
odd number of binary ones in each 32 bit word.
Bit 32 is set to logic 1(one) when there is an even number of binary ones in the word.
It is set to logic 0 (zero) when there is an odd number of binary ones in the word.
This creates a word which always contains an overall odd number of ones.
Transmission Waveform
ARINC 429 transmissions return to the ’zero voltage’ condition at the end of each bit
period. As shown in Figure 5, a ’high’ on line A and a ’low’ on line B represent a
binary one. A ’low’ on line A and a ’high’ on line B represents a binary zero.
When both lines A and B are at zero volt, there are no data transmitted.
ARINC 429 transmitters must provide a minimum dead time of 4 bits between
messages because the receivers synchronize to the transmitted data by recognizing
the 4--bit dead time as the synchronizing command.
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 4
Electrical Parameters
Refer to Figure 6.
Tri--level bipolar modulation consists of ’Hi’ (binary one), ’Lo’ (binary zero) and ’Null’
(no data). When the transmitter is open--circuit, the differential output signal voltages
across the specified output terminals (balanced to ground at the transmitter) are:
V ’Null’ --0.5 V to +0.5 V
V ’Hi’ +9.0 V to +11 V
V ’Lo’ --9.0 V to --11 V.
The differential voltage presented at the receiver is dependent upon the line length
and the number of receivers connected to a transmitter. Noise and pulse distortion
will also affect these voltage levels. Therefore, receivers should be designed to
accept the following voltage ranges for the three states:
V ’Null’ +2.5 V to --2.5 V
V ’Hi’ +5.0 V to +13 V
V ’Lo’ --5.0 V to --13 V.
Note: Common receiver input mode voltages (line A to ground and line B to ground) are
not specified because of the difficulties of defining ’ground’ precisely.
The transmitter output impedance is 75 Ω balanced to ground. The receiver input
impedance is typically 8,000 Ω. No more than 20 receivers (400 Ω minimum for
20 receiverloads) should be connected to one digital data bus.
Each receiver contains isolation provisions to ensure that the occurrence of any
reasonably probable failure does not cause loss of data to the others. Bus fault
tolerances for shorts and steady state voltages are designed into the transmitters
and receivers.
5.4.2.4 MIL--STD--1553
Note: A glossary of the terms used in MIL--STD--1553 is provided at the end of this
Chapter.
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 5
To deal with this increasing complexity, the Aerospace Branch of the Society of
Automotive Engineers (SAE) developed the first draft of a multiplexed data bus
standard in 1968.
Communications between different units can take place at different moments in time.
All communications between units share the same bus. The standard is now used on
new military airplane and helicopter systems, space systems and even land--based
vehicles.
There are two main advantages in standardizing a digital time--division multiplex data
bus:
V Significant savings in size and weight of avionic units and the interconnecting
wiring between them
V Cost savings, since a unit can be used on different aircraft with little or no
modification.
Structure
Refer to Figure 7.
MIL--STD--1553 states that the bus controller transmits and receives data,
and coordinates the flow of information on the data bus. All information is communi-
cated in command/response mode.
This mode ensures that the ’sole control of information transmission on the bus shall
reside with the bus controller, which shall initiate all transmissions.’
The remote terminal gathers information, for example, from aircraft sensors.
It formats this data for transfer on the data bus. The remote terminal can also receive
information from the data bus and convert this data to a format suitable for use by the
aircraft.
The remote terminal may contain little or no intelligence, such as a simple interface
unit, or may be a full avionics computer. The standard allows for up to 32 remote
terminals to be connected to the data bus.
The bus monitor listens to the information flowing on the bus and records all or
selected pieces of data. The bus monitor may record data for later analysis, as in a
flight test program. It is strictly passive and is used only as a test device.
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 6
Data to be Transferred
MIL--STD--1553 also defines the information that will flow on the data bus.
This information can be one of the following three words:
V Command word
V Status word
V Data word.
The command word is transmitted only by the bus controller. This word directs a
remote terminal to either transmit or receive information across the data bus.
The status word is transmitted only by a remote terminal. This word indicates the
general status of the remote terminal. It indicates whether any error conditions were
detected in the information received by the remote terminal, or other general RT
status conditions.
The data word is transmitted by the bus controller or a remote terminal. This word
contains the actual information that will be transferred from one avionic unit to
another, across the bus.
Bus Controller
The bus controller (BC) is an avionics computer that controls the flow of information
on the data bus. It transmits commands to remote terminals at predetermined times.
The command may be followed by data words, or it may request data from a remote
terminal (RT).
Changes in the aircraft may also be the result of some unexpected event (such as an
avionic unit failure or battle damage). Regardless of the cause, the BC must be able
to respond to the change.
In the case of some unplanned event, such as an RT failure, the BC has the
capability of detecting the occurrence of an error on the data bus. The BC will then
take action to recover from the error condition.
For a planned change, such as a mode change in the aircraft, a BC will typically
modify the flow of information on the bus in a predetermined way. The BC changes
the sequence and frequency of messages between RTs.
During error detection, the BC will typically retransmit a command to the suspected
RT. If multiple attempts of transmitting to a RT result in errors, the BC will try to
establish communications with the failing RT on the redundant (back--up) data bus.
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 7
Remote Terminal
Bus Monitor
A bus monitor (BM) is a unit used for data bus testing. It can be attached to an
aircraft’s data bus during flight--testing. In this manner, it is used to examine the flow
of information on the data bus in real time. The BM can also store all or selected
messages for later analysis.
As a laboratory bus tester, the BM examines all the traffic flowing on a
MIL--STD--1553 bus. It detects and records electrical and protocol errors.
The bus monitor can generally be used to display ’snap--shots’ of the bus traffic.
Data Bus
The fourth integral part of MIL--STD--1553 is the data bus. The technical definition of
a data bus is ’a twisted shielded pair transmission line made up of a main bus and a
number of attached stubs’. In short, a data bus is a cable whose electrical character-
istics are defined by MIL--STD--1553.
There are two different ways of connecting a terminal to the data bus:
V Directly coupled (Figure 8, detail a))
V Transformer coupled (detail b)).
These connections are referred to as ’stubs’. There are two differences between
these types of coupling. Direct coupling can only be used with stubs less than one
foot (approximately 30 cm) long. With direct coupling, the transformer and isolation
resistors are internal.
Transformer coupling is used with stub lengths less than 20 feet
(approximately 6.1 m). A second transformer is added and the transformers and
isolation resistors are external to the remote terminal in their own box.
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 8
Word Types
Refer to Figure 9.
As mentioned before, there are three distinct types of words defined
by MIL--STD--1553:
V Command words
V Status words
V Data words.
The bits are encoded in each of the words using Manchester II bi--phase encoding.
In a Manchester format, bit values of one are positive for a ½--bit period, followed by
a negative level for a ½--bit period. Zero values are the opposite, a negative level is
followed by a positive one.
The sync pattern is a unique invalid Manchester encoding that indicates the start of
each word.
A command sync is positive level for 1 ½--bit periods followed by a negative level for
1 ½--bit periods.
A data sync is reversed.
A status sync is identical to a command sync. Command and status words are
differentiated by both word content and temporal context, i.e., the occurrence of such
a sync in the timing of a message. Figure 9 shows the various Manchester II
encoded patterns. The MIL--STD--1553 bus is a differential bus. The waveforms
shown are for the positive leg of the bus. Of course, the negative leg is exactly the
opposite.
Each of the three word types has a unique format. All three have a common
structure. They contain a command sync or a data sync. The sync character is
always transmitted first, followed by 16 information bits. The parity bit is always
transmitted last.
This extra bit ensures that, if a hardware failure occurs and a bit is lost in trans-
mission, its loss can be detected. All words transmitted on a MIL--STD--1553 bus
must have odd parity.
Command Words
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 9
Note: Mode commands exchange usually one--data words and may contain even no
data words at all.
Almost every aircraft specification requires at least a basic subset of the mode
commands to be implemented.
The final field in a command is the word count/mode code field. This 5--bit field either
specifies the mode command or the number of words which are to be exchanged
with the BC.
When the previous field (the sub--address/mode field) is all zeros or all ones,
the word count/mode code field uniquely identifies which mode command is being
transmitted. In this way, up to 32 different mode commands can be specified.
When the command is not a mode code, the word count/mode code field identifies
the number of data words that are to be exchanged along with this command.
Refer to Figure 11.
The table in Figure 11 summarizes the mode commands defined by
MIL--STD--1553B.
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 10
Sample Commands
Status Words
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 11
The message error bit is set until it is transmitted in a status or until a new valid
command other than a ’transmit last status’ mode command is received by this RT.
The instrumentation bit follows the message error bit . It is an optional bit used to
differentiate between command and status words. This bit should always be zero.
The service request bit indicates that the RT requires service. Setting this bit can
direct the BC to undertake a predefined data transfer or mode command. This bit is
also optional. If it is not implemented, it must always be a logic 0.
The next 3 bits are reserved and must always be a logic 0.
The broadcast command received bit is used by a RT to indicate that it received a
valid broadcast command. When a broadcast command is received, the bit is set to
logic 1 and remains set until it is either transmitted or until a valid non--broadcast
command is received by this RT. If not implemented, it is set to logic 0.
The busy bit is an optional bit, which indicates that the RT is unable to move data to
or from the subsystem in response to a command. Once set, it remains a logic 1 as
long as the busy condition exists. If this bit is not used, it must be set to logic 0.
The subsystem flag bit is an optional bit used by an RT to alert the BC that a fault
exists in the subsystem and the data being transmitted may be invalid. A logic 1
indicates the presence of a fault condition and a logic 0 its absence. Once set, it will
remain active until the subsystem fault is resolved. If the subsystem flag bit is not
used, it must be set to logic 0.
The dynamic bus control acceptance bit is an optional bit. If not used, it should be set
to logic 0. When set to logic 1, it indicates to the BC that the RT has accepted the
dynamic bus control mode command and will immediately take over the task of bus
control as the back--up bus controller.
The bit is cleared upon transmission. If the RT rejects dynamic bus control, it sets
this bit to logic 0.
The terminal flag bit is also optional. Like the others, if not used, it must be set to
logic 0. When set to logic 1, the terminal flag bit indicates the existence of a fault in
the RT itself. It will remain set until the condition causing the fault is resolved.
Data Words
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 12
Transfers
BC--to--RT
RT--to--BC
RT--to--RT
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 13
In the first command (the receive command) the address field contains the address
of the receiving RT. The T/R bit is set to logic 0 indicating that the RT is to receive
data words. The word count field indicates the number of data words the RT should
expect to receive.
In the second command (the transmit command) the address field contains the
address of the RT which is to transmit the data words. The T/R bit is set to logic 1.
Finally, the word count field indicates the number of data words the RT should
transmit.
Note: The address in the receive command must always be different from the address
in the transmit command.
In order to make an RT--to--RT transfer work, it is necessary that the word count
fields in both the transmit command and the receive command match.
Commands
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 14
Broadcast
Multiple RTs responding to a transmit command by sending data onto a single bus
would provide corrupt data. Likewise, RTs cannot respond with a status due to this
bus collision problem.
Note: For an RT--to--RT broadcast transfer, the receive command is the broadcast
command. The transmit command is sent to the RT which is to provide the
broadcast data. Likewise, the status respond is that of the transmitting RT.
The RT sets the broadcast command received bit in the RT’s status word. The bus
controller determines whether a broadcast command was property received by
polling each remote terminal, requesting its status word through a ’transmit last
status’ mode code command, and checking if the ’broadcast command received’ bit
is set.
Message Validation
Message validation depends upon the RT to detect electrical and protocol errors in a
message and to validate the command and data words received from the BC.
Invalid
An invalid word is a command or data word that contains any or all of the following
conditions:
V An improper sync character
V A bit with an invalid Manchester II code
V The wrong parity (16 bits plus parity).
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 15
Illegal
If an RT detects a command word with a validity error (bad sync, Manchester error,
the wrong number of bits, etc.) it will ignore the whole message. In other words,
no error flags are set.
When an RT detects validity errors in the data portion of a message, it should set the
message error bit in the status word. The sending of the status word is still sup-
pressed. The message error bit could be retrieved by the BC following a no--re-
sponse timeout by using the ’transmit status word’ mode command.
The BC must validate status words and data words from an RT. If the BC detects
errors, it must also disregard the information received.
Electrical Characteristics
MIL--STD--1553 defines the waveform output of a terminal and the input with which a
terminal is required to work.
Note: The full realm of MIL--STD--1553 electrical verification is beyond the scope of this
lecture.
Broadcast command receive bit:: This bit is used by a remote terminal to indicate
that it has received a valid broadcast command.
Bus controller: A device that coordinates the flow of information on the data bus.
Bus monitor: A passive unit used for data bus testing. It listens to all information
flowing on the bus and records all or selected pieces of data.
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 16
Busy bit:: This bit indicates that the remote terminal is unable to move data to or
from the subsystem in response to a command.
Data bus: A cable for transferring data and electrical signals between the central
processing unit, storage and all the input/output devices of a computer system.
Data word: A word transmitted by the bus controller or remote terminal(s). This word
contains information to be transferred from the bus controller to the remote terminals
and information to be transferred between remote terminal(s) and the bus controller,
or between two remote terminals.
Dynamic bus control acceptance bit:: An optional status word bit. If it is set to
logic 1, this bit indicates to the bus controller that the remote terminal has accepted
the dynamic bus control mode command. The remote terminal will immediately start
bus control as the back--up bus controller.
Electric error: An error where the command and/or data words received from the
bus controller contain some sort of waveform error.
Intermessage gap: A gap of at least 4 ms that must always exist between messages.
Invalid command: A word which does not begin with a valid sync field, but with an
invalid Manchester II code or an even parity.
Message error bit:: A bit in the status word, used by the remote terminal to indicate
that something was wrong with the message it just received from the bus controller.
Odd parity: The sum of the preceding 16 bits plus the parity bit must be odd.
Parity bit:: An extra bit that is always odd, according to the logic of the system.
Protocol: The relationship of how the three types of MIL--STD--1553 words are used
to transfer data between terminals.
Protocol error: An error where the incoming command and data are electrically
correct but the message is illegal by the protocol established by MIL--STD--1553.
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 17
Service request bit:: A bit provided to indicate to the active bus controller that the
remote terminal is requesting service.
Standard interface: A unit developed for one aircraft, which can be used on another
aircraft with little or no modification.
Status word: A word transmitted only by a remote terminal to the bus controller.
This word gives information regarding the general status of the remote terminal itself.
The status word indicates whether any error conditions were detected in the
command or data words just received by the remote terminal.
Subsystem flag bit:: An optional status word bit used by a remote terminal to alert
the bus controller that a fault is in the subsystem. It also tells the BC that the data
being transmitted may be invalid.
Sync character: Part of the MIL--STD--1553 word structure. This command or data
character is always transmitted first.
Terminal flag bit: a bit which indicates the existence of a fault in the remote terminal.
Word count/mode code field: A field in the command word that specifies either the
mode command or the number of words, which are to be exchanged with the bus
controller.
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 18
High--speed Tx
bus
Rx
Tx Low--speed bus
Tx
Rx
Rx Rx Rx
Low--speed bus
Tx
Rx Rx Rx
Shielding
Transmitter Receiver
FB 6985 A
To receiver
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 19
00
01
02
03 BCD
04
05
06
07
10 BNR
11
12 BCD
13
14 Discrete
15 Main disc M data
16 Main Data BCD
17 BCD
20
21
22
23 BCD
24 BNR
25
26 Mix Test
27 Discrete Test
30 Application dependent
31
32 BNR
33
34
35 Maintenance Data Ack M ISO ISO 5
36
37 BNR EQ ID
FB 6986
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a) Example of a binary (BNR) data word
Notes
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
P SSM MSB Data field LSB SDI LSB Label MSB
Preliminary
1 1 1 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 0 P P P 0 0 0 1 0 1 0 0 1 1
Label = Ground speed (312)
Data = 650 knots
P = pad
b) Example of a binary--coded decimal (BCD) data word
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
MSB Data field LSB
P SSM SDI LSB Label MSB
5.4
4 2 1 8 4 2 1 8 4 2 1 8 4 2 1 8 4 2 1
0 0 0 1 0 1 0 1 1 0 0 1 0 1 P P P P P P P P 0 0 0 0 0 1 1 0 1 0
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
5.4.2 - HO - 20
Data Buses
Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 21
0 1 No computed data(NCD)
Initial word Initial word
Sign bit
Status matrix
Priority
0 0 Failure warning 1
0 1 No computed data 2
1 0 Functional test 3
B 6988
1 1 Normal operation 4
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 22
B 6989
32
1
Bit number
31
0
30
0
7
0
1
6
5
1
Bit number
0
4
3
0
2
0
1
1
--
4--bit dead time
Figure 5
--
--
--
Line A 0 V
--5 V
+5 V
0V
--5 V
+5 V
Line B
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Notes
G G
+13 V
+11 V
+10 V
+9 V
+5 V
+2.5 V
+0.5 V
5.4
VAB
--0.5 V
--5 V
--9 V
--10 V --11 V
--13 V
Hi Null Lo Hi Null Lo
XMTR output states RCVR input states
FB 6990
5.4.2 - HO - 23
Data Buses
Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 24
redundant
Optional
cables
FB 6991 A
Subsystem
embedded
terminal
remote
Subsystems
terminal
Remote
Figure 7
controller
Bus
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 25
a) Direct--coupled bus
Stub of Shield
specified length
R R
Isolation
transformer
Transmitter/receiver
Terminal
b) Transformer--coupled bus
R R
Shield
Isolation resistors
Stub of
specified length
Isolation
transformer
B 6992 A
Transmitter/receiver
Terminal
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 26
B 6993
Bit time
Bit time
Data sync
Figure 9
Bit time
Bit = 1
Bit = 0
Line A
Line A
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 27
B 6994
20
1
P
19
mode code
17
5
16
Sub--address/mode
13
12
5
11
10
T/
1
9
R
8
Remote terminal
7
address
5
6
5
4
3
Sync
2
1
Command
Bit times
Word
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 28
Broadcast
T/R Mode Associated
Function Command
Bit Code Data Word
Allowed
1 00000 Dynamic bus control None No
1 00001 Synchronize None Yes
1 00010 Transmit status None No
1 00011 Initiate self test None Yes
1 00100 Transmitter shutdown None Yes
1 00101 Override transmitter shutdown None Yes
1 00110 Inhibit terminal flag bit None Yes
1 00111 Override inhibit terminal flag bit None Yes
1 01000 Reset remote terminal None Yes
1 01001 (reserved) None No
to
1 01111 (reserved) None No
1 10000 Transmit vector word Yes No
0 10001 Synchronize Yes Yes
1 10010 Transmit last command Yes No
1 10011 Transmit built--in test word Yes No
0 10100 Selected transmitter shutdown Yes Yes
Override selected transmitter shut-
0 10101 Yes Yes
down
1 or 0 10110 (reserved) Yes Yes
to
FB 3176
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Bit times 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
Notes
Status
Word 5 1 1 1 3 1 1 1 1 1 1
Preliminary
d r
o
r l
e
c a
e c
i c
v e
e p
d t
a
n
c
B 6995
5.4.2 - HO - 29
Data Buses
Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 30
B 6996
20
1
P
19
18
17
16
15
Data
16
11
10
9
8
7
6
5
4
3
Sync
2
1
Bit times
Word
Data
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 31
Command/status sync
2
Bit time
T
Parity
20
Bit time
19
--Volts
+Volts
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 32
B 6998
command
Next
#
Status
word
Intermessage gap
LL
#
word
Data
word
Data
command
Receive
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 33
B 6999
command
Next
#
word
Data
Intermessage gap
LL
word
Data
#
Status
word
LL
command
Transmit
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 34
B 7000
command
Next
#
Status
word
LL
Intermessage gap
LL
#
Status
word
LL
command command
Receive Transmit
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 35
Intermessage gap
#
Response time
Status
word
LL
LL
#
command
Mode
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 36
command
Next
#
Intermessage gap
Response time
word
Data
Status
word
LL
#
LL
command
Mode
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 37
command
Next
#
Intermessage gap
Response time
Status
word
LL
LL
#
word
Data
command
Mode
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Notes
Preliminary
# Intermessage gap
LL Response time
lll Continuous data
5.4.2 - HO - 38
Data Buses
Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 1
5.5.1.1 Introduction
Whenever a logic circuit is clearly defined by its truth table to give a fixed invariant
relationship between input and output, the circuit is referred to as a ’combinational
circuit’. The combinational circuit contains no memory or feedback paths and always
operates in accordance with its truth table.
Whenever a logic circuit cannot be clearly defined by its truth table but instead
requires the entry of a binary variable for one or more of its output conditions,
the circuit is referred to as a ’sequential circuit’.
The sequential circuit possesses a memory as the result of feedback paths, and may
operate differently for a given input condition depending on the prior input sequence
applied to the circuit. An example of the sequential circuit is a logic circuit composed
of flip flops (FF).
Note: This Lesson does not include the description of sequential circuits.
Elementary logic functions can be demonstrated with simple switch circuits but are
primarily constructed with transistor electronic circuits. Symbols of logic gates show
a specific gate logic function but do not specify the exact circuitry. The conventions
relate to specific shapes that are to be associated with logic functions when drawing
logic circuit diagrams.
Various symbols are still in use to represent logic circuits. The most important symbolic
language, however, is the IEC (International Electrotechnical Commission) convention
which shows the relationship of each input of a digital logic circuit to each output
without showing the internal logic.
AND Gate
The most common AND symbols are shown in Figure 1. The inputs are labelled
alphabetically A, B, C ... and the output is labelled Q.
The IEC symbol (detail a)) is identified by the sign ’&’ which stands for the
AND function. The IEC symbol is commonly used, the other symbols (detail b)) may
be used in older publications or in American publications.
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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 2
A and B are called ’binary logic variables’ because they have only one of two states at
any one time. The two logic states are ’0’ and ’1’.
Binary variables can be employed to represent the input conditions or the resultant
output decisions. The truth table (detail a)) is generalized and represents any AND
decision involving two input variables. The functional relationship between inputs
A and B and the output Q of an AND gate is defined as
Q = A⋅B
where the symbol ’ ⋅’ means AND rather than multiplication. The statement is read:
Q equals A and B.
The main feature of an AND gate is that the output logic state is
V ’1’ only when all of the inputs are at logic ’1’
V ’0’ when any one (or more) of the inputs is at logic ’0’.
OR Gate
The most common OR symbols are shown in Figure 2. The designations of the
input and the output are similar to those of the AND gate. The IEC symbol (detail a))
is identified by ’≧1’ which means greater than or equal to 1 and describes the
OR function. The simplest OR gate consists of
V two inputs, A and B
V one output, Q.
The truth table (detail a)) is generalized and stands for any OR decision involving two
input variables.
The main feature of the OR gate is that the output logic state is ’1’ whenever any of
its inputs is at logic ’1’.
Q=A+B
where the symbol ’+’ means OR rather than addition. The statement is read:
Q equals A or B.
A comparison of the truth tables for the AND gate and the OR gate shows that the
output of the AND gate is ’1’ for only one combination of inputs. The OR gate, on the
other hand, has a logic ’1’ output for three combinations of inputs. Other symbols
(detail b)) may be used in older publications or in American publications.
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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 3
NOT Gate
The most common NOT symbols, also called INVERT symbols, are shown in Figure 3.
The IEC symbol (detail a)) is identified by ’1’ and the small circle at the output of this
symbol is used for denoting inversion of the input.
Thus the output of the NOT gate is always the inverse or the complement of its input.
The NOT gate is therefore often called an inverter. The functional relationship between
input A and output Q is defined as
Q=A
The truth table (detail a)) summarizes the properties of the NOT gate. Since there is
only one variable input, there are only 21 = 2 possible truth values for A.
Hence the inverter truth table has only two rows. Other symbols (detail b)) may be used
in older publications or in American publications.
Besides the three elementary types of gate several combinations of logic functions
are so frequently used that special symbols have been adopted for them, such as
V NAND
V NOR
V EXOR.
NAND Gate
The most common NAND gate symbols are shown in Figure 4. The IEC symbol
(detail a)) is composed of the AND symbol, and the small circle at the output
indicates that the NAND gate is an inverted AND gate.
The NAND gate combines the function of the AND gate with the NOT gate function.
Placing an N in front of AND to produce NAND is a contraction of Not AND.
The minimum NAND gate has
V two inputs, A and B
V one output, Q.
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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 4
The main feature of a NAND gate is that the output logic state is
V ’1’ when any or all inputs are at logic ’0’
V ’0’ only when all inputs are at logic ’1’.
If each output of the NAND gate truth table (detail a)) were complemented (i.e.
change ’1’ to ’0’ and ’0’ to ’1’), an AND gate truth table would result. The functional
relationship between input A and B and output Q is defined as
Q = A ⋅ B.
The statement is read:
Other symbols (detail b)) may be used in older publications or in American publications.
NOR Gate
The most common NOR gate symbols are shown in Figure 5. The IEC symbol
(detail a)) is composed of the OR symbol, and the small circle at the output indicates
that the NOR gate is an inverted OR gate.
The NOR gate combines the function of the OR gate with the NOT gate function.
Placing an N in front of OR to produce NOR is a contraction of Not OR. The minimum
NOR gate has
V two inputs, A and B
V one output, Q.
The main feature of the NOR gate is that the output logic state is
V ’1’ only when all inputs are ’0’
V ’0’ when any input is ’1’.
This is just the inverse of what happens with the OR gate. If each output in the NOR
gate truth table (detail a)) were complemented, the OR gate would result.
The functional relationship between output Q and inputs A and B is defined as
Q = A + B.
Other symbols (detail b)) may be used in older publications or in American publications.
Exclusive OR Gate
The most common EXOR gate symbols are shown in Figure 6. The IEC symbol
(detail a)) is identified by ’= 1’ which stands for the EXOR function.
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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 5
The main feature of an EXOR gate is that the output logic state is
V ’1’ only when one of the inputs is ’1’.
V ’0’ when both inputs are ’0’ or when both inputs are ’1’.
The truth table (detail a)) is identical to the ordinary OR gate, sometimes called the
inclusive OR gate, except for inputs A = B = 1.
The truth table also shows that the output of an EXOR gate is ’1’ only when an
odd number of inputs are ’1’. When an even number of inputs are ’1’ or ’0’ its
output is ’0’. Thus, an EXOR gate can be used as an odd--bit detector.
The symbol for the EXOR function is the OR symbol with a circle around it.
The functional relationship between inputs A and B and the output Q is defined as
Q=A + B
and is read:
Q equals A exclusive or B.
Other symbols (detail b)) may be used in older publications or in American publications.
The exclusive OR can be represented by a connection of basic logic functions
(Figure 7, detail a)) but is not a basic logic function itself. The resulting logic function
can be found by considering each possible combination of input values, recording the
values of intermediate variables in a truth table and deducing the final output.
The truth table (detail b)) is composed of the
V input variables A and B
V the intermediate variables Q1 and Q2
V the final output variable Q.
The first three gates with the inputs A and B, and the output Q1 build up an OR gate
with two inverted inputs:
V Q2 is the output of the second OR gate with A and B as inputs
V Q1 and Q2 are led to an AND gate and build up the resulting output Q.
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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 6
This capability of the NOR gate also makes it a so--called universal gate since
any conceivable logic function can be made from a suitable interconnection of
NOR gates.
With the exception of the NOT gate which has only one input, the exclusive gates
discussed so far have two inputs. But it is possible and sometimes desirable to have
gates with multiple inputs.
Refer to Figure 10.
A three--input AND, for instance, behaves in the same way as a two--input AND in
that an output of ’1’ is asserted only when all inputs are ’1’.
However, the third input variable doubles the number of possible input combinations
that must be accounted for in the truth table. Possible truth values of the output
depend on the number of input variables:
V 1 input variable 21 = 2 possible truth values for Q
V 2 input variables 22 = 4 possible truth values for Q
V 3 input variables 23 = 8 possible truth values for Q
V 4 input variables 24 = 16 possible truth values for Q
V N input variables 2N = 2N possible truth values for Q .
OR Gates
If two gates are connected (Figure 11, detail a)), it is important to know the logic
value of output Q for all combinations of inputs A, B, C in these circuits. The output of
OR gate 1 will be at logic ’1’ if either of the inputs A or B are at logic ’1’. The output of
gate 1 is connected as one of the inputs to OR gate 2 and thus the output of gate 2
will be at logic ’1’ whenever either A or B is at logic ’1’.
As a logic ’1’ at input C also causes the output of gate 2 to become logic ’1’, the logic
equation for output Q is given by:
Q=A+B+C
which is exactly the output of a three--input OR gate. Thus by connecting two OR gates
in cascade, a three--input OR gate is created.
Detail b) shows the truth table of the OR gates in cascade.
This process can be continued and the output of gate 2 is fed to the input of another
OR gate. The combination of three OR gates, for example, forms an OR gate with
four inputs (Figure 12, detail a)). Alternatively, the gates may rather differently be
connected together to obtain the same result. The logic equation for output Q is
given by:
Q = A + B + C + D.
Detail b) shows the truth table of the four--input OR gate.
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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 7
AND Gates
The circuit in Figure 13 is similar to the circuit in Figure 11, except that AND gates
have been used this time. It can be stated that the output Q is given by:
Q = A⋅B⋅C
which is the logic equation for a three--input AND gate.
A three--input AND gate (detail a)) is formed by connecting two AND gates in
cascade. In the truth table (detail b)) it is evident that the output is only at logic ’1’
when all inputs A, B, C are at logic ’1’.
A four--input AND gate (Figure 14, detail a)) may be obtained by feeding the output Q
to a further AND gate. Alternatively the gates may be connected together rather
differently to obtain the same result. The logic equation for output Q is given by:
Q = A ⋅ B ⋅ C ⋅ D.
Detail b) shows the truth table of the four--input AND gate.
Seven--Segment Decoder
Many modern digital devices produce numerical results as their output. Typically, the
numerical results appear on a visual display as decimal numbers. The actual digital
circuitry within one of these devices can produce output only in terms of ’1’s and ’0’s.
Although the resulting image may not be as pleasing to the eye as a printed decimal
digit, it is suitable for an electronic construction in which each bar is independently
illuminated.
Thus, by ’turning on’ the proper combination of vertical and horizontal bars, the
image of a decimal digit will be seen.
Since each segment of the numerical display can be independently illuminated, the
problem of generating a decimal number has been changed to one of generating a
seven--digit binary number.
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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 8
The position of a digit in this binary number corresponds to the segment’s state of
illumination. Thus, if the segment letters are related to digit position as
then Figure 16 will indicate the appropriate seven--digit binary numbers. It is assumed
that ’0’ represents an ’off’ segment and ’1’ represents an ’on’ segment.
Although seven binary digits are required to represent decimal numbers in terms of
seven segments, fewer binary digits are needed to represent simply ten different
numerical symbols. In particular with four binary digits, 24 = 16 combinations of ’1’s
and ’0’s are possible and this is more than adequate to encode ten decimal digits.
In most cases it happens to be simpler to process small binary numbers than large
ones. Consequently seven--segment decoders are often used when it becomes
necessary to produce a decimal digit output.
Figure 17 relates the standard four--digit code for decimal digits to the seven--digit
binary numbers required for a display device.
The encoding table shows that six of the sixteen binary input codes are unassigned.
In order to realize this translation from four digits to seven digits a multiple output
combinational logic circuit is needed as shown in Figure 18.
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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 9
a) IEC symbol
A & A B Q
B. .
. . Q 0 0 0
. .
. . 0 1 0 Q=A¯B
N
1 0 0
IEC standard 1 1 1
Truth table
A A
B B
.. .. Q .. .. Q
. . . .
N N
A 1948 A
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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 10
a) IEC symbol
A ≧1 A B Q
B. .
. . Q 0 0 0
. .
. . 0 1 1 Q=A+B
N
1 0 1
IEC standard 1 1 1
Truth table
A A
B B
.. .. Q .. .. Q
. . . .
N N
A 1949 A
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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 11
a) IEC symbol
1 A Q
A Q 0 1 Q=A
1 0
A Q A Q
A 1950 A
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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 12
a) IEC symbol
A & A B Q
B . 0 0 1
. . Q
. .
. . 0 1 1 Q=A¯B
N
1 0 1
IEC standard
1 1 0
Truth table
A A
B
.. .. Q B
.. .. Q
. . . .
N N
A 1951 A
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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 13
a) IEC symbol
A ≧1 A B Q
B. .
. . Q 0 0 1
. .
. . 0 1 0 Q=A+B
N
1 0 0
IEC standard 1 1 0
Truth table
A A
B B
.. .. Q .. .. Q
. . . .
N N
A 1952 A
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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 14
a) IEC symbol
A A B Q
=1
Q 0 0 0
0 1 1 Q =A + B
B
1 0 1
IEC standard 1 1 0
Truth table
A A
+ Q Q
B B
A 1953 A
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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 15
a) EXOR gate
≧1 Q1
1
1 &
Q
A ≧1
B Q2
b) Truth table
A B Q1 Q2 Q
0 0 1 0 0
0 1 1 1 1
1 0 1 1 1
A 1632 C
1 1 0 1 0
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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 16
& 1
&
& ≧1
&
A 1633 C
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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 17
≧1 1
≧1 ≧1 ≧1
≧1
≧1 &
≧1
A 1634 C
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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 18
A B C Q1
0 0 0 0
0 0 1 0
A 0 1 0 0
&
B Q1 0 1 1 0 AND
C 1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 1
A B C Q2
0 0 0 1
0 0 1 1
A 0 1 0 1
&
B Q2 0 1 1 1 NAND
C 1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 0
A B C Q3
0 0 0 0
0 0 1 1
A 0 1 0 1
≧1
B Q3 0 1 1 1 OR
C 1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 1
A B C Q4
0 0 0 1
0 0 1 0
A 0 1 0 0
≧1
B Q4 0 1 1 0 NOR
C 1 0 0 0
1 0 1 0
1 1 0 0
A 1636 C
1 1 1 0
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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 19
A ≧1
2
B
≧1
Q
C
A B C Q
0 0 0 0
0 0 1 1
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 1
A 1639 C
1 1 1 1
Q=A+B+C
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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 20
A ≧1
2
B
≧1
3 Q
C ≧1
A B C D Q
0 0 0 0 0
0 0 0 1 1
0 0 1 0 1
0 0 1 1 1
0 1 0 0 1
0 1 0 1 1
0 1 1 0 1
0 1 1 1 1
1 0 0 0 1
1 0 0 1 1
1 0 1 0 1
1 0 1 1 1
1 1 0 0 1
1 1 0 1 1
A 1954 C
1 1 1 0 1
1 1 1 1 1
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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 21
A &
2
B
&
Q
C
A B C Q
0 0 0 0
0 0 1 0
0 1 0 0
1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 1
A 1640 C
Q=A¯B¯C
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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 22
A &
2
B
&
3 Q
C &
A B C D Q
0 0 0 0 0
0 0 0 1 0
0 0 1 0 0
0 0 1 1 0
0 1 0 0 0
0 1 0 1 0
0 1 1 0 0
0 1 1 1 0
1 0 0 0 0
1 0 0 1 0
1 0 1 0 0
1 0 1 1 0
1 1 0 0 0
1 1 0 1 0
1 1 1 0 0
A 1957 B
1 1 1 1 1
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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 23
f b
g 0 a,b,c,d,e,f
e c
d
1 b,c
Seven--segment display
2 a,b,d,e,g
3 a,b,c,d,g
4 b,c,f,g
5 a,c,d,f,g
6 a,c,d,e,f,g
7 a,b,c
8 a,b,c,d,e,f,g
A 1955 C
9 a,b,c,d,f,g
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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 24
0 a b c d e f -- 1111110
1 -- b c -- -- -- -- 0110000
2 a b -- d e -- g 1101101
3 a b c d -- -- g 1111001
4 -- b c -- -- f g 0110011
5 a -- c d -- f g 1011011
6 a -- c d e f g 1011111
7 a b c -- -- -- -- 1110000
8 abcdefg 1111111
A 1646 C
9 a b c d -- f g 1111011
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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 25
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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 26
≧1
& a
&
≧1
& b
&
≧1
c
≧1
d
&
& ≧1
e
&
≧1
f
&
≧1
g
A &
A 1648 C
B 1
C 1
D 1
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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.2 - HO - 1
5.5.2.1 Introduction
Many aircraft companies design and manufacture aircraft systems, such as: flight
deck illuminated control panels, pillar lamps, lighting bridges, bezels and bearing
scales to suit each aircraft or equipment requirement.
Refer to Figure 1.
Control panels and keyboards include push button switching systems, logic circuitry
and displays, integrated within the panel body. The control panels are designed
specifically to comply with civil, military and marine environmental standards.
Aircraft flight deck and equipment lighting are converted to NVG compatibility in
compliance with specification MIL -- L -- 85762.
Some manufacturer utilize light source technology from filament lamps, LEDs and
electroluminescent lamps to comply with
MIL -- P -- 7788F and aircraft manufacturers’ own specifications.
Onboard passenger information systems, LED illuminated door and tail lights. cab
control panels, warning indicators complying with BRB/LUL RIA specifications.
Complex electronics and sensors are increasingly being relied on to enhance the
capabilities and efficiency of modern jet aircraft.
Many of these electronics and sensors monitor and control vital engine components
and aerosurfaces that operate at high temperatures.
This necessitates either the use of long wire runs between sheltered electronics and
hot--area sensors and controls, or the fuel cooling of electronics and sensors located
in high--temperature areas.
A family of high--temperature electronics and sensors that could function in hot areas
would enable substantial aircraft performance gains. Especially since, in the future,
some turbine--engine electronics may need to function at temperatures as high as
600 °C.
Refer to Figure 2.
600 °C NAND gate, consisting of two SiC (silicon carbide) JFET’s (junction field
effect transistor) and a resistor. Signal input and output pads are labelled, along with
the VDD and VSS bonding pads that supply power to the circuit.
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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.2 - HO - 2
The high temperature integrated electronics and sensors (HTIES) program at the
NASA Lewis Research Center is currently developing silicon carbide (SiC) for use in
harsh conditions where silicon, the semiconductor used in nearly all of today’s
electronics, cannot function.
Refer to Figure 3.
The HTIES team recently fabricated and demonstrated the first semiconductor digital
logic gates ever to function at 600 °C. The photomicrograph shows a NAND (not A
and not B) logic gate, consisting of two junction field effect transistors (JFET’s) and a
resistor fabricated in epitaxially grown SiC.
Figure 3 shows operational waveforms of the SiC NAND gate collected on a probing
station when the sample was heated to a glowing, red--hot 600 °C.
The input voltage waveforms are shown across the top, and the logic gate waveform
output voltage is shown on the bottom. On all the waveforms, a binary logic zero is
represented by a voltage of 0.25 V or less, whereas a voltage of 0.85 V or higher
corresponds to a binary logic one.
Whenever one of the inputs is a logic zero (0.25 V), the output of the logic gate is
greater than 0.9 V (a logic one); only when two logic ones are input does the logic
gate output drop to 0.2 V (a logic zero), consistent with the NAND binary logic
function.
In addition to the NAND gates, NOT (not A) and NOR (not A or not B) gates on the
same SiC wafer demonstrated successful 600 °C operation.
Civil aircraft are becoming more and more dependent on digital avionics and flight
control systems. This is due to new aircraft and avionics designs that incorporate
digital computers in systems that are flight critical.
If a flight critical system should fail, it may result in the loss of the aircraft. For this
reason, the EASA is very concerned about the safety of aircraft using this technology.
The software and digital systems safety (SDSS) program addresses this issue by
conducting research on constantly emerging complex software and advanced digital
hardware technology.
The data and results of the research are used to write policy and guidance for
certification of new aircraft and systems using this technology.
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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.2 - HO - 3
The SDSS program is currently addressing the safety and certification issues
concerning highly complex avionics hardware that is being proposed for use in future
aircraft and avionics systems designs.
The project objective is to conduct a case study using the DO--254 standard
developed by RTCA Special Committee.
This standard provides guidance for design assurance and verification of complex
electronic hardware such as:
V application specific integrated circuits (ASICs)
V erasable programmable logic devices (EPLDs)
V field programmable gate arrays (FPGAs), etc.
These devices have millions of gates and are very difficult to fully test. To ensure
aircraft safety, the EASA is proactively addressing the increasing complexity of
aircraft software and digital hardware.
COTS software and hardware offer significant cost savings for aircraft manufacturers.
There is the potential for increased aircraft safety if lower cost systems could be
shown to be safe and serve as a replacement for older, less capable systems.
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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.2 - HO - 4
C 0074
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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.2 - HO - 5
C 0075
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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.2 - HO - 6
1.0
Input A, V
0.5
0.0
1.0
Input B, V
0.5
0.0
1.5
Output AB, V
1.0
0.5
0.0
--2 0 2 4 6 8 10
C 0076
Time, ms
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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 1
to prepare the program for execution as well as to execute it. Different types of
programs for solving different types of problems are used.
Refer to Figure 1.
The input and output units provide communication between the user and the
computer. Major input units are keyboard and mouse. Main output devices are
display, printer and plotter.
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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 2
The control unit and the arithmetic unit are often combined to form the central
processing unit (CPU). CPU and memory are often combined to form the central unit
or system unit. The CPU includes the electronic circuits controlling the interpretation
of instructions and their execution.
The control unit includes that part of the CPU which governs the operation of
instructions in proper sequence, the interpretation of each instruction and the supply
of the proper data to the arithmetic unit and other units in accordance with this
interpretation.
The arithmetic unit contains the electronic circuits that perform arithmetic and logic
operations.
The memory forms that unit of the computer in which data can be written (stored) and
from which the stored data can be selected for reading.
The smallest unit of digital data is the binary digit (bit), which is the unit of information,
that is represented by either ’0’ or ’1’. A group of 8 adjacent binary digits operated as a
unit of information is known as a ’byte’.
Refer to Figure 2.
The system unit contains the basic units of a computer system such as the CPU,
internal memory, several controllers and I/O ports. All these units are interconnected
for data transfer via a system of signal lines by designated buses.
The control bus is a unidirectional bus, which transfers control data from the CPU to
the associated units in order to control and supervise the actions of the other units.
The address bus is also a unidirectional bus in the CPU. It determines from/to which
location internal and external data are to be transferred.
The data bus is a bidirectional bus. The task of the data bus is to transfer data from
one internal or external unit to the other.
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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 3
The number of lines in a bus depends on the type of CPU and the address capability,
e.g.
V an 8--bit CPU needs 8 data lines
V a 16--bit CPU needs 16 data lines.
The central processing unit (CPU) is the heart of the computer. The CPU is con-
nected to external units via the control bus, data bus and address bus. The buffers of
the address bus and the data bus connect the internal buses of the CPU to the
external buses.
Refer to Figure 3.
Refer to Figure 4.
The A--operand is connected via a data bus to the accumulator and the B--operand is
connected to the data bus of the CPU. In this way the
V A--operand is identical with the content of the accumulator.
Its variable has to be transferred to the accumulator.
V B--operand can directly be loaded with the content of any register, memory or
a constant selected program via software instructions.
The two operands are combined via a combiner logic. This combiner logic is
controlled via the function select logic. The function select logic is controlled by the
program via the control bus.
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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 4
The result of the operation, either logical or arithmetic, is fed to the accumulator and
the flag register. The flags depending on the result of the operation are always set,
while the accumulator stores the result. The content of the accumulator changes with
V arithmetic operations like ADD and SUBTRACT
V logical operations, like AND and OR
V shift instructions.
The content of the accumulator, however, does not change with compare instruc-
tions. Compare instructions only affect the flags of the flag register.
Arithmetic Operations
An electronic arithmetic--logic unit is only able to perform the addition. Therefore the
other three calculations must be derived and converted into additions.
Logical Operations
Such operations make it possible to combine or compare the magnitude of the two
data x and y what is required for decisions as
V selecting program branches
V using program jumps, so--called ’jumps on conditions’.
x=y (x equals y)
This capability of comparing data and the resulting program control are a characteris-
tic of the flexibility of microprocessor systems. More or less complex electronic
switching circuits are necessary for the ALU to execute the mentioned operations.
Interrupt Control
Input devices, such as keyboard and mouse, collect data from outside the computer.
These devices need the microprocessor to process the data they have collected;
they need microprocessor service.
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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 5
Input devices need a means to interrupt what the microprocessor is currently doing.
Therefore they are connected to the microprocessor’s interrupt lines.
When an input device wants to interrupt the microprocessor, it sets one of the
interrupt lines to high voltage. This is called ’interrupt request’. When an interrupt
occurs, the microprocessor
V completes the execution of the current machine language instruction
V pushes the program counter to the stack
V saves the contents of the registers on the stack
V writes a new address into the program counter.
The new address is called ’interrupt vector’. An interrupt vector is a fixed address that
depends on the interrupt line which is set. The microprocessor expects a subroutine
starting at this address. This subroutine is expected to instruct the microprocessor to
process the data the input device has collected. Such a subroutine is called ’interrupt
service subroutine’.
At the end of an interrupt service subroutine a return instruction is executed.
Once the microprocessor has finished running the interrupt it continues the former
running program from the point where it was interrupted.
The interrupt control controls the interrupt management of the CPU. When an
interrupt occurs the running program is interrupted and the line INTA is set to 0 as
interrupt request.
INTR, RST 5.5 to 7.5 and TRAP are interrupt inputs with different priority. The input
with the lowest priority is INTR, the highest TRAP.
I/O Control
The CPU whose block diagram is shown in Figure 3 is provided with a serial input/out-
put (I/O) control device. SID is the serial input data line, while SOD represents the
serial output data line. Both are connected to the data bus of the central system unit.
Instruction Decoder
When an instruction word is read into the instruction register via the internal data bus,
the instruction decoder recognizes whether the instruction is a single byte or a
multibyte instruction. In case of multibyte instructions the subsequent bytes are stored
in the intermediate registers W and Z. The instruction decoder acts upon the clock and
sequence control, making it pass on the logical follow--up pulses to the respective units
as necessary for a proper operation cycle.
The clock and sequence control sets the respective control line according to the
instructions given by the instruction control. It is connected to
V the control bus of the central unit/system unit (e.g. RD, WR, IO/M lines) and
V the internal control bus of the CPU.
The internal control bus of the CPU controls the actions of the registers, the bus
drivers, the ALU and the instruction decoder.
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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 6
Registers
A register is a storage location inside the processor. Registers in the control unit, for
example, are used to keep track of the overall status of the program that is running.
They store information, such as
V the current instruction (instruction register)
V the location of the next instruction to be executed (program counter)
V the operands of the instruction.
An important factor that affects the speed and performance of a processor is the size
and number of registers. Technically, the term ’word size’ (or ’word length’) describes
the size of an operand register, but is also used for describing the size of the buses to
and from the processor.
Currently, word sizes in computers range from 8 to 64 bits. If the operand registers of a
processor are 32 bits wide, the processor is said to be a 32--bit processor.
Special--Purpose Registers
The accumulator (accu or A) is especially used for arithmetic and logical operations.
The results of these operations are always stored in the accumulator except for
compare results which are stored in the flag register. By the use of register pairs the
accu A is commonly combined with the flag register F to the register pair AF.
Input and output instructions can only be executed with the accumulator. Additional
direct addressing is only possible with the accumulator either as source or destination.
The flag register F stores the results of arithmetic or logical operations and contains
flags, like parity flag, zero flag, carry flag and sign flag.
The intermediate registers W and Z are used for the storage of operands. When an
instruction containing one or two operands occurs these operands are stored in the
registers W and Z.
The stack pointer SP contains the two bytes of the address of the stack. The stack
is used as intermediate storage of registers and addresses in the case of interrupts
or subroutines.
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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 7
The increment/decrement address register is used for driving the address buffers
connected to the address bus of the central unit/system unit. It receives the address
data from the data bus and is controlled by the clock and sequence control. Address
increment and decrement can be done directly within this 16--bit register.
General--Purpose Registers
The general--purpose registers (operand registers) are available for arithmetic and
logical operations. The registers are connected to the ALU via the data bus.
Operations and data transfer between two registers, and register and accumulator
are very fast. For 16--bit operations two registers of 8 bits can be combined to a
register pair which can handle the 16 bits.
The registers are selected via the register select circuit under the control of the clock
and sequence control unit.
Memory Devices
The CPU does not work without a program which is a sequence of instructions.
Therefore a medium for storing the program must be available. This medium is the
memory.
Integrated in the system unit are two different types of internal memories, RAM and
ROM, and the controller for an external memory -- e.g. the disc controller.
RAM, the short form of random access memory, and ROM, short form of read only
memory, belong to a special category of memory, named ’semiconductor memory’.
The other category is the external memory. This category generally includes
magnetic storage devices and will be described later.
The advantage of a random access memory (RAM) is that the contents of each
storage cell can be read or over--written.
Programs from external devices can be loaded into the RAM and then executed by
the CPU. The disadvantage of a RAM is that the stored data of the RAM are lost
when the power is switched off.
The static RAM contains bi--stable multivibrators (flip flops) as storage devices while
the dynamic RAM contains small capacitors storing the information in the form of
electric charge.
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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 8
Within the dynamic RAM (DRAM) the information will have to be refreshed from time
to time because the micro--capacitors lose the charge even when the power supply is
switched on. Refreshing is done by a special refresh--circuit integrated in the
computer system.
Another form of memory is the fixed memory where the computer can only read the
memory, but is not able to change it. The following memories belong to this type of
memory:
V ROM
V PROM
V EPROM
V EEPROM.
ROM is the abbreviation of read only memory. This fixed storage unit can be
programmed only once, e.g. in the factory. ROMs are used for storage of system
software, interpreter software and/or encoder software.
A PROM, short form of programmable read only memory, is similar to the ROM.
The program is not loaded by the producer of the PROM but by the user by means of
a special programming unit. The PROM is programmable only once at a time. When
the PROM has been programmed the data cannot be changed. The data are fixed.
EPROM is the short form of erasable programmable read only memory. This memory
component is programmable like a PROM. However, the contents of an EPROM is
erasable by UV light.
Therefore EPROMs have a glass window on top of the package by which the UV
light can erase the data. Once programmed, this window must be covered with a
piece of adhesive paper. For the erasing procedure in a special unit the paper should
be removed.
An EEPROM, short for electrical erasable programmable read only memory, is similar to
an EPROM. The contents of the EEPROM, however, is not erased by UV light but with a
relatively high electrical voltage.
RAM and ROM are often integrated on the same printed circuit board as the CPU,
and sometimes also integrated in the CPU itself. Another advantage of RAM and
ROM is that the data can be read/written from/to every memory cell in parallel.
The address of the memory cell is selected by the address on the address bus.
Then the data is read/written in parallel (8 to 32 bits at a time) from/to the memory cell.
In this way access time is very short, in the range of 7 ns to 350 ns depending on the
chip technology.
Interfaces
Refer to Figure 5.
An interface is the connection between two units, circuits, program modules
(software interface), computers or external units. Via the interface, data and control
information can be transferred.
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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 9
The number of interfaces and the method of interfacing depend on the application
and the size of a computer system. A small computer might only require two to four
interfaces, while larger systems require more than a hundred interfaces.
There are various methods by which peripheral equipment may be connected via
interface units to the computer. Interfaces are subdivided into two categories, namely
V parallel interfaces
V serial interfaces.
Parallel Interfaces
Parallel interfaces enable parallel data transfer for sending and receiving data.
Parallel means that all bits forming a data word are sent or received at the same
time.
For data transfer the interface uses as many parallel lines as bits are contained in a
data word (Figure 5, detail a)). Additional acknowledge (Ackn) lines, busy, ground
(GND), system clock (Clock) and auxiliary (Aux) lines are integrated in the interface.
The IEEE488 is the American standard corresponding to the European IEC bus.
Serial Interfaces
A serial interface, as shown in detail b), transfers the bits of a data word bit after
bit by employing only one data line for transmitting data (TxD) and receiving data
(RxD). The TxD line of system 1 is connected to the RxD line of system 2 and
vice versa.
The serial interface is used for long--distance data transfer. Serial interfaces are
subdivided into
V synchronous interfaces
V asynchronous interfaces.
Within the asynchronous serial interface on serial transmissions the bits of a data word
are transmitted one after the other on a single wire. The bits are not sent at a defined
speed in a special time period, but with start and stop bits. Therefore this interface is
called ’asynchronous’. This kind of interface allows to connect two devices using
different clock rates.
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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 10
The two standards, RS232C/V.24, relate to the connection of the data terminal
equipment, such as peripheral devices, or of a computer to a data communication
equipment, e.g. a modem (modem is the short form of modulator/demodulator).
The central processing unit and the internal memory unit form the system unit. I/O
units and external memory units are referred to as peripheral components of the
computer system. Interface and controller circuits that are assigned to the system unit
provide interconnection between system unit and peripheral devices. Peripheral
devices, such as diskette and fixed disc drive, can be installed in the same housing
as the system unit. The standard input and output devices, such as keyboard and
display, are mostly stand--alone units connected by cables to the system unit.
I/O Devices
Keyboard and display (monitor) are the standard I/O devices through which the user
communicates with the operating system, utility and application software and the
hardware itself. The mouse is another typical input unit, whereas printer and plotter
are typical output devices.
Keyboard
Refer to Figure 6.
The keyboard is the major device through which the user communicates with the
computer system.
Pressing a key on the keyboard generates an n--bit code that represents the character
associated with the key. For ASCII representation the code includes 7 bits.
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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 11
Figure 6 shows the layout of a typical alphanumerical keyboard. The numerical and
alphabetical symbols are arranged in the same position as on the appropriate
typewriter. On the right side of the keyboard a field with additional numerical keys is
located.
Additionally, the keyboard contains
V function keys and
V control keys.
The function keys can have different functions defined by a software program
designated keyboard driver.
Example: The function key F9 may have the function ’delete current line’.
The control keys are operated by simultaneously pressing a special key (e.g. CTRL)
and one or more other key(s) of the keyboard and thus generating control se-
quences.
Example: The combination of the keys ’CTRL’ and ’C’ interrupts a running program when
the MS--DOS operating system has been employed.
Mouse
By means of the mouse device, shown in Figure 7, detail a), a pointer presented on
the display can be shifted across the screen. The pointer is located on
V symbols
V windows
V menu windows
and with a click on the push--button the appropriate object is selected. The selection
is shown on the display and can initiate
V a program
V a procedure or
V an instruction.
The mouse includes a roller ball which acts on two axes:
V one for the x--direction
V one for the y--direction (detail b)).
On each axis a slotted disc is connected. LEDs emit light beams which are sent
through the slots to photo resistors located on the other side of the slotted disc.
When forced by the movement of the mouse the disc is rotating, the light beam is
interrupted until the next slot has appeared. The photo resistors detect the
interruptions and convert them into data for the computer. The computer calculates a
new pointer (cursor) position within the defined range of the display according to the
mouse movement.
Displays
The most important output device of a computer is the display. The display shows the
user the information immediately after it has been received from the computer or
entered via the keyboard.
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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 12
Display is the designation for any form of optical monitor. The most common display
types are
V TV--type monitor
V flat--panel displays (e.g. LCD).
TV--Type Monitor
Refer to Figure 8.
Most personal computer (PC) systems and workstations employ a TV--type monitor.
This type of monitor is able to display alphanumerical characters as well as graphical
pictures.
For interface purposes the system unit of a computer includes a graphic board which
meets the standard of the connected monitor.
Monitors are available as
V monochrome monitors
V colour monitors.
Both types employ cathode ray tubes (CRT) like a TV. The display picture is
generated by an electron beam which moves from the top left side to the bottom right
side within the display. While the beam is moving across the display it is switched on
and off according to the data supplied by the computer.
In this way single picture points are generated which are designated ’pixel’. Pixel is
the short form of picture elements.
In order to generate characters, the electron beam starts at the left top corner of the
display and moves to the right top corner. When the beam has arrived at the right
side of the display it jumps back to the left side, again writing a new line one pixel
lower.
When the beam arrives at the right bottom corner a picture has been finished and the
beam will be reset to the left top corner in order to write the next picture. One picture
may be written in less than 20 milliseconds which equals more than 50 pictures per
second.
The human eye is not able to follow the quick movement of the beam and therefore
the picture seems to be fixed.
Each pixel displayed on the monitor equals one bit stored in the video buffer which is
part of the graphic board of the computer. The most common graphic boards use
more than 1 bit to define each pixel. When the bit equals 0, a white pixel is written
(beam on), and when the bit equals 1, a black pixel is written (beam off).
When using monochrome displays, more than one bit must be employed to control
the intensity of the beam and thus to realize different grey steps to be displayed.
When using colour displays, more than one bit is used for defining the colours.
The colour display employs three basic colours:
V red (R)
V green (G)
V blue (B).
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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 13
By mixing these three colours for one pixel, each colour can be generated.
Video cards employing 8 bits per pixel can differ between 28 colours which equals
256 different colours. A video card employing 16 bit per pixel can display 216 colours
which equals 65,536 different colours.
Flat--Panel Displays
The most common type of flat--panel display is the liquid crystal display (LCD) --
a liquid--filled surface that, when electrically charged, creates images using ambient
light.
Because LCDs have very low power consumption in comparison with CRT displays,
they are the most cost--effective displays for portable battery--powered computers.
Printers
The data, programs or results of the operated programs must be printed out to make
them permanently visible (outputs on monitors are only temporary).
Printers are connected to the system unit of the computer via
V controllers (hardware interface) and
V drivers (software interface).
Figure 9 gives an overview about different types of printer. The main distinction is
made between
V impact and
V non--impact printers.
Impact printers get their name from the method of creating characters on paper.
Like a typewriter, a striking mechanism transfers a whole or partial character by
striking a ribbon (the impact) that transfers the image onto the paper. Non--impact
printers, however, use nozzles, heat, electricity, magnetism or optical methods to
transfer an image on the paper instead of using an impact mechanism.
Impact printers are
V teletypewriter
V matrix printer
V daisywheel printer.
Non--impact printers are
V ink--jet printer
V bubble--jet printer
V thermoprinter
V electrosensitive printer
V laser printer.
Teletypewriter
Teletypewriter or TTYs provide both input and output for a computer system. There
must be circuits between the keyboard and the computer I/O that convert the data
instructions into codes compatible with the computer circuits.
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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 14
Matrix Printer
The matrix printer consists of pins in the print head placed in a matrix. The char-
acters are formed when the appropriate pins strike through a carbon band against
the paper. The pins are selected by pulses from a decoder.
The matrix of the print head may have different forms, for instance a 5 x 7 matrix or a
12 x 1 matrix. With the 5 x 7 matrix a complete character can be printed with one
stroke while a 12 x 1 matrix needs five to six strokes in series to form a character.
Some matrix printers are capable of printing about 180 to 200 lines per minute or
300 characters per second.
Daisywheel Printer
A daisywheel printer contains a wheel, shown in Figure 10, detail b), with letters and
characters arranged on pins around the centre.
The daisywheel is turned to the correct position in order to print the proper character.
Once the wheel is in position, the hammer hits the pin of the wheel from behind
(detail a)). The pin touches the paper through the carbon band and prints the
character. Daisywheel printers are capable of printing 10 to 35 characters per
second.
Ink--Jet Printer
Ink--jet printers form characters or graphics with a print head containing tiny nozzles
or jets that spray drops of ink onto the paper. The effect is similar to dot--matrix
printing.
The advantage of an ink--jet printer is that it is nearly noiseless and highly reliable.
Bubble--Jet Printer
By heating the ink and forcing it through the opening, a small bubble is created.
The bubble makes a more precise mark on the paper with less scattering of ink
droplets than a conventional ink--jet printer. The result is a sharper picture.
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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 15
These printers are also similar to the matrix printer, but the pins burn spots onto the
paper by means of heat or electricity. These techniques are not in general use
because special heat--sensitive paper is required and no copies can be made.
Laser Printer
The latest development in printer techniques is the laser printer. A laser beam is
modulated by the electrical signals of a character generator. The beams form
characters of high accuracy and speed on a light--sensitive roll.
Black toner is applied to the light--sensitive roll and sticks to the places where the
characters shall occur. Then a piece of paper is pressed around the roll and the toner
now is transferred from the roll to the paper, thus producing the characters on the
paper.
The print speed varies between
V five pages per minute as regards low--speed laser printers and
V approximately 20 pages per minute as regards high--speed laser printers.
Also colour laser printers are available.
Plotter
In order to expand the available memory space external memory devices are used
for computer systems. External memory devices commonly employ the electromag-
netic principle of storing data. In contrast to RAM and ROM devices the data are
stored in a serial form.
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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 16
The disadvantage of this principle is that the access time is relatively long (fast
devices -- approximately 12 milliseconds) compared with the access time of RAM and
ROM (fast RAM devices -- approximately 60 nanoseconds).
Floppy Disc
The floppy disc device consists of a floppy disc drive and the memory medium,
the diskette.
The floppy disc device is the most commonly used magnetic memory device for
microprocessor--based systems. The floppy disc is often referred to as a diskette; it is
a removable magnetic memory medium which is permanently contained in a paper or
plastic envelope to protect the disc against touching, dust or dirt.
The floppy drive is a low--cost peripheral memory that performs the electromechani-
cal read/write functions necessary to record and recover data on a diskette.
Figure 13 shows a typical floppy disc. The diskettes are available in different sizes,
the most popular sizes are 5 1/4--inches (Figure 13, detail a)) and 3 1/2--inches
(detail b)). Detail c) shows a 5 1/4--inch disc drive.
Today more and more the 3 1/2--inch floppy disc format is used within new computer
systems. Therefore some computers are fitted with two floppy drives, one employing
the 5 1/4--inch format, the other the 3 1/2--inch format.
In the 3 1/2--inch version, the only opening, protected by a sliding metal panel, is
used for the read/write head of the floppy disc drive with which data are stored on the
disc or read from the disc. An opening for the drive motor is provided to let the
magnetic disc rotate at a continuous speed. A write protection notch prevents
undesired writing on the disc.
Depending on the memory capacity of the disc the diskettes are coded with two
letters:
V SD single density: low capacity
V DD double density: medium capacity
V HD high density: high capacity.
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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 17
Fixed disc drives are similar to floppy disc drives. The arrangement of data on both
discs is the same. Fixed discs can be stacked to increase the memory capacity.
With this arrangement the read/write heads can access each point of the fixed disc
independent of the number of discs.
Due to these advantages the memory capacity of a fixed disc is much higher than the
memory capacity of a floppy disc. It varies between some Mbytes and several
Gbytes.
Magnetic tape recorders (streamers) are often used with microcomputers as an external
memory device, mainly for back--up applications. Back--up is a procedure to copy data
from a fixed disc onto a tape to prevent the loss of data in the case of failure of the disc.
The tape recorders used for computers are similar to common music cassette recorders.
CD ROM
Read--only optical discs, called CD ROMs (compact disc read-only memories) have a
function similar to ROM. Once written (burned) the information stored on the CD
ROM cannot be changed.
Note: Blank CDs which can be written once, are called CD R (compact disc record-
able).
The technology of the CD ROM is the same as used with the audio compact disc
(CD). The technology is of digital form and based on a 4.72--inches (12--cm) optical
disc that stores up to 800 MB (90 minutes) on a single side.
The CD ROM can store audio, video and computer data as well, and a mixture of
these data. When compression techniques are used, the data contents of the
CD ROM extends beyond simple line drawings and includes pictures, animation and
real--time video. E.g. with the use of media compression techniques a video of
60 minutes with a resolution of 480 x 640 dots can be stored on a 650 MB disc.
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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 18
DVD ROM
The DVD (digital video disc or digital versatile disc) essentially is a bigger, faster CD
that can hold video as well as audio and computer data.
The DVD has the capability to store near--studio--quality video and better--than--CD--
audio quality. DVDs are available as DVD ROM, DVD R and DVD RW. The storage
capability ranges from 4.7 GB (single--side storage, one layer) up to 17 GB (dual--
side storage, two layers).
Memory Card
Like floppy discs, memory cards can store data and programs, are erasable and can
be exchanged among computers that have memory card slots. Memory cards have a
storage capacity of 20 to 60 MB.
Memory card technology is still at the beginning, but it is expected to replace discs in
portable computers in future. Most hand--held and notebook PCs, for example,
contain a memory card slot. The advantages include faster access, smaller size and
less power consumption due to the lack of any moving parts. The major
disadvantage is the current high cost of the cards relative to discs.
Introduction
Pitot and static pressure systems are specifically designed to measure these
pressures in terms of airspeed, altitude and rate of altitude change. There are many
systems whose operation depends on this type of input.
The utilization of such systems (in terms of weight, size etc.) in an aircraft depends
on its size, weight and operational category.
In order to minimize the problems arising from the employment of various different
indicators and other systems including the necessary piping and wiring, the
pressures are transmitted to a centralized air data computer (ADC) unit.
This unit converts the data into electrical signals and transmits these via cables or
data busses to the dependent indicators and systems.
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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 19
In addition, provision can also be made for the calculation of true airspeed by using
static air temperature data inputs. Following information are typically provided by air
data systems:
V Barometric altitude (ALT)
V Static air temperature (SAT)
V Total air temperature (TAT)
V Indicated airspeed (IAS)
V True airspeed (TAS)
V Mach indication.
To reduce the possibility of a midair collision, the pilot must be sure that he is flying at
the correct cruising altitude. Sometimes he may want to fly at a specific altitude to
take advantage of prevailing winds.
Due to the variation in atmospheric pressure from that of the standard atmosphere,
most barometric altimeters have a zero setting from 952 hPa (28.10 in Hg) to
1,050 hPa (31.00 in Hg). At times, when atmospheric conditions are near standard,
the altitude indicated by the altimeter can be fairly accurate.
All other altitudes will be in error. Flight regulations require pilots flying below
18,000 feet to maintain a flight--level referenced barometric setting to the current
reported altimeter setting of a station within 100 nm of the aircraft.
At altitudes above 18,000 feet, the primary purpose of calibrated altitude information
is to ensure air traffic separation between aircraft. For this purpose, atmospheric
variations are not important, because each altimeter in the area will read the same if
it is set to the standard atmosphere. To ensure this separation, a universally
accepted standard altimeter of 1013.25 hpa (29.92 in Hg) is used above 18,000 feet.
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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 20
Temperature
Airspeed Data
The two main applications of airspeed data on modern jet aircraft are
V to define performance and structural limitations (e.g. limiting speed for flap or
gear operation)
V to assist navigation (e.g. an airspeed input to a long--range navigation system
is necessary to compute the ground speed).
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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 21
Analogue ADC
Failure Warning
Each module of the ADC incorporates a warning logic circuit network which activates
a warning flag in the associated indicators in the event of loss of the respective data
signals. Annunciator lights corresponding to each module are provided at the end
panel of the computer. They are also illuminated in the event of failures. Once a
warning circuit has been triggered it remains latched.
Indicators
The indicators that are used in conjunction with an analogue ADC also contain servo
mechanisms. When connected to the computer they each form a complete servo
loop with the respective modules of the computer. These indicators may, in some
applications, be of the combined pneumatic and servo type or they may be entirely
servo--operated.
Digital ADC
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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 22
Arithmetic unit
Memory
Input Output
units units
Programs Data
Control unit
A 1283 A
Central unit
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Notes
Memory
Address bus
16 bits
Other Other
devices devices
Data bus
8 bits
reset
Module 5
CPU
Buffer Buffer Disc
controller
8 bits
8 bits 8 bits
System
clock ” ”
Registers Accumulator ALU
” ”
” ”
FA 1802 C
5.6.1 - HO - 23
Basic Computer Structure
INTR
INTA
RST 5.5
RST 6.5
RST 7.5
TRAP
SID
SOD
Serial I/O
Notes
X1
X2 Reset
Address bus Data/address
Power +5 V driver bus driver
Clock Control Status DMA
supply 0V
Clk out
Ready
RD
WR
ALE
S0
S1
IO/M
HLDA
HOLD
Reset out
Reset in
5.6.1 - HO - 24
Basic Computer Structure
8--bit input
from data bus
Intermediate
Notes
register
Preliminary
B--operand A--operand
Internal ALU
data bus
Combiner
Function logic Internal
data bus
select logic Internal
control bus
Result
Control bus
Accumulator Flags
A 6991 B
Data bus
5.6.1 - HO - 25
Basic Computer Structure
Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 26
a) Parallel interface
D0 D0
D1 D1
D2 D2
D3 D3
D4 D4
D5 D5
D6 D6
D7 D7
Ackn Ackn
Busy Busy
Clock Clock
Aux Aux
GND GND
System 1 System 2
b) Serial interface
TxD TxD
RxD RxD
SD SD
GND GND
A 6992 B
Clock Clock
System 1 System 2
Figure 5 Interfaces
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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 27
FA 8349 E
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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 28
FA 8333 E
E ITS International Training & Support GmbH. All rights reserved. For training purposes only -- Rev. 01/09
Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 29
FA 8350 B
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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 30
Printer types
Impact Non--impact
-- Electrosensitive
printer
-- Laser printer
A 1817 B
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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 31
Inked
a) Type bar Paper feeding ribbon
roller Hammer
Paper
Actuating
lever
Print
drum
Trigger
magnet
b) Type wheel
A 1818 B
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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 32
x
a) Flat--base plotter
5
2
y 3 4
x
b) Drum plotter 1 = Desk
x 2 = Ordinate--controlled bar
3 = Carriage
6 4 = Pen
5 = Drawing paper
6 = Drum
4
3 y
5
A 1820 B
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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 33
Diskette
(floppy disc)
A 1805 B
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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 34
Read/write
opening
Read/write
head
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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 35
FA 1800 D
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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 36
Air
temperature Angle--of--
probe attack vane
B 7011
Static ports
Pitot probe
Static probe
(both sides)
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Notes
VERTICAL
SPEED
Preliminary
5.6.1 - HO - 37
Basic Computer Structure
Notes
Baro.
Altimeter Synchro corrected
B.P. settings to digital TMC
altitude 1
converter FCC
Stall warning
Aircraft Stab. trim
Preliminary
2
Aircraft Pilot VMO
Pressure Temperature VMO Air data instruments
PI digital
sensor compensation calculation IRU
converter Computed CAS
airspeed
calculation
Type 3
EEC
TAS EFIS
Module 5
Data buses
E 0699 B
5.6.1 - HO - 38
Basic Computer Structure
Digital Techniques
Preliminary Module 5 Fibre Optics
Notes 5.10 5.10.1 - HO - 1
5.10.1.1 Introduction
The latest type of communication link uses a cable made of thin glass fibres that
serve as a conduit for light over long distances with little losses. In this system with a
fibre--optical link, the full cable--channel bandwidth can be used for amplitude
modulation of the light source.
The choice between optical fibre and electrical (or ’copper’) transmission for a
particular system is based on a number of trade--offs. Optical fibre is generally
chosen for systems with higher bandwidths, spanning longer distances, than
electrical cabling can provide. The main benefits of fibre are its exceptionally low
loss, allowing long distances between amplifiers or repeaters; and its inherently high
data--carrying capacity, such that thousands of electrical links would be required to
replace a single high bandwidth fibre. One further benefit of fibre is that even when
run alongside each other for long distances, fibre cables experience effectively no
crosstalk, in contrast to some types of electrical transmission lines.
In certain situations fibre may be used even for short distance or low bandwidth
applications, due to other important features:
V Immunity to electromagnetic interference, including nuclear electromagnetic
pulses (although fibre can be damaged by alpha and beta radiation)
V High electrical resistance, making it safe to use near high--voltage equipment
or between areas with different earth potentials
V Low weight, important in aircraft
V No sparks, important in flammable or explosive gas environments
V Not electromagnetically radiating, and difficult to tap without disrupting the
signal, important in high--security environments.
Refer to Figure 1.
For transmission, a modulated light beam is the source that introduces light into the
glass fibre cable. At the receiving end, a photoelectric detector converts the variation in
light amplitude back to electric signals. The light serves as a super carrier wave for the
entire cable passband.
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Digital Techniques
Preliminary Module 5 Fibre Optics
Notes 5.10 5.10.1 - HO - 2
The reason for the low attenuation is the internal reflection of light inside the fibre
cable. Thus, no light can escape, and the losses are extremely small.
To analyse this effect, the basic laws of refraction of light are illustrated in Figure 2,
detail a), and internal reflection is shown in detail b).
Light rays are going from air into a slab of glass. The velocity of light is reduced
because glass is a denser medium.
In detail a), light rays enter at an angle from the normal (perpendicular) line. This
direction is perpendicular to the interface where the light enters or leaves the glass.
Going into a denser medium, the light rays do not continue their original angular
direction. Instead, they are bent to an angle closer to the normal line because of the
reduced velocity of the rays.
As each wavefront of light reaches the air--glass interface, the effect is like a squad of
people side by side marching in a line. The first one to hit the interface begins going
slower, but the last continues at the original speed up to the interface. As a result, the
line of the wavefront turns to its right, and the light beam bends towards the normal
line.
At the bottom of the glass slab, the light leaves the glass and is bent away from the
normal line. This direction is opposite to the bending of the incident light. The reason
is that the light enters a less dense medium that allows it to travel with higher
velocity.
The bending of the light is called ’refraction’. How much the light bends when it meets
a different medium is determined by the index of refraction, whose symbol is η. Its
value is:
speed of light in vacuum
η =
speed of light in medium
Typical values of η are:
V 1 for air or vacuum
V 1.8 for glass
V 2.4 for diamond
V 1.3 for water.
Now it is considered that a light source is actually inserted in the slab of glass as
shown in Figure 2, detail b). The light radiates in all directions.
The light ray marked ’A’ approaches the interface at a right angle. Such rays along
the normal line are not refracted.
Ray ’B’ is refracted, but still leaves the glass. It should be noted that refraction bends
the light away from the normal line.
For ray ’C’, however, the refraction is just enough to make the light follow along the
glass surface.
At the angle of ray ’D’ and smaller angles of rays, the light is reflected internally.
None of these rays can leave the glass.
The angle at which the internal reflection begins is called the ’critical internal angle’.
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Digital Techniques
Preliminary Module 5 Fibre Optics
Notes 5.10 5.10.1 - HO - 3
For fibre--optical cables the corresponding action is shown in Figure 3. Light entering
the conduit at angles less than twice the critical angle will be reflected internally. Then
the light is propagated along the cable in zigzag directions, bouncing off the walls, but
without leaving the glass.
This angle that allows complete internal reflection is called ’acceptance angle’. All
incident light with a smaller angle, or along the central axis, is transmitted in the
optical cable.
Modal Dispersion
Light entering the optical cable or travelling along the central axis takes the shortest
route. At other angles within the acceptance angle, the light must travel a longer path
because of the internal reflections. The time difference between the direct path and
the reflection paths is called the ’modal dispersion’. This factor limits the bandwidth of
the cable.
To minimize the modal dispersion, the practical optical cable is made of a bundle of
fine fibres of small diameter. In addition, the fibre is encased in a cladding material
that has a high index of refraction in order to increase internal reflections. In effect, all
the fibres are in parallel to provide a cable with very low losses.
Optical Transmitter
Often the light source is a special light--emitting diode (LED), operating in the
infra--red (IR) part of the light spectrum, where the wavelength is greater than that for
visible light.
In construction, the LED is at the bottom of a conical pit and feeds light into the cable.
The LED current and its light output can be modulated over the full passband of all
the cable channels.
Actually, the LED is the limiting factor. The bandwidth of the cable itself is far greater
than the bandwidth of the LED modulation circuits.
Another method of transmitting the optical signal uses an injection laser diode as the
light source. This system can accept modulating frequencies well into the UHF band.
Cable Connectors
One of the problems in fibre optics is the splicing, or joining, of cables. Care must be
taken to make precise optical alignments at the connection, or excessive light loss will
result.
However, special connectors are available to join the cables and keep light losses
within tolerable limits.
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Digital Techniques
Preliminary Module 5 Fibre Optics
Notes 5.10 5.10.1 - HO - 4
FB 6796
Source
Photoelectric
detector
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Digital Techniques
Preliminary Module 5 Fibre Optics
Notes 5.10 5.10.1 - HO - 5
Normal or
Incident perpendicular line
light
Wavefront
Air
Glass
Normal
Ray A
Ray B
No
refraction Refraction
Total internal
Ray C reflections
Ray D
Light
source
B 6797
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Digital Techniques
Preliminary Module 5 Fibre Optics
Notes 5.10 5.10.1 - HO - 6
Glass fibre
Cable
Acceptance
angle
FB 6798
Cladding with different
coefficient of refraction
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Digital Techniques
Preliminary Module 5 Fibre Optics
Notes 5.10 5.10.2 - HO - 1
Refer to Figure 1.
The main task of an optical--fibre transmission system is to convert an electrical
signal into an infrared light signal, to launch or transmit this light signal onto an
optical fibre and then to capture the signal on the other end and re--convert it into an
electrical signal.
The basic elements of an optical--fibre communication system (Figure 1) on the
transmission side are:
V driver
V light source
V source--to--fibre connection
V digital encoder (only for digital signal transmission).
On the reception side the basic elements are:
V fibre--to--detector connector
V light detector
V amplifier
V digital decoder (only for digital signal transmission).
The transmitter and the receiver are linked by an optical fibre cable.
When the link becomes too long the fibre will attenuate the light waves travelling
down so that the light waves cannot be distinguished from noise. Even with the
highest--intensity light sources and the lowest--loss fibres, the light waves finally
become weak and dim from absorption and scattering. For this reason sometimes it
becomes necessary to ’regenerate’ the light signal. The device used for regeneration
of the light signal is called repeater.
The main task of a transmitter is to modulate the light wave (carrier) by a modulating
signal, i.e. the information to be transferred. The light wave can be modulated by
V analogue signals
V digital signals.
The components needed between transmitters and receivers in a fibre--optic link are
fibre cables, connectors and splices, power splitters and directional couplers.
Fibre--Optic Cables
A fibre--optic cable consists of one or more optical fibres formed into a cable for
protection. This is necessary, because the cable may be buried directly in the ground,
pulled through underground ducts, hung on telephone poles or dropped to the bottom
of a lake or ocean.
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Digital Techniques
Preliminary Module 5 Fibre Optics
Notes 5.10 5.10.2 - HO - 2
It must be protected against any mechanical stress and for all kinds of stress caused
by the environment, such as temperature changes from very cold to very hot.
A number of different designs and configurations have been developed to meet all
requirements for protection. These designs differ in materials and arrangements, but
practically all of them include coatings to protect the individual fibres, strength--bear-
ing materials, filler or buffer materials, and an external protective jacket.
Refer to Figure 2.
Figure 2 shows a cabling package used by WESTERN ELECTRIC. The package
consists of 12 ribbons of 12 closely--packed coated fibres. These 144 fibres are then
wrapped in paper, covered by a polyethylene jacket and a Kevlar--type braid that is
surrounded by steel wires embedded in a plastic protective sheath.
Connectors
Connectors are used whenever two fibres, or a fibre and an electro--optical source or
detector, are to be joined and disconnected repeatedly. This is generally the case at
fibre terminal equipment, optical patch panels or fibre couplers within a LAN.
Connectors are present at the transmitter and receiver interface as a minimum.
If jumpers and an optical patch panel are used to connect the optical cable and the
equipment, then the number of connectors on each end can double.
It should be considered that each connector in a fibre--optic system causes an optical
power loss. For this reason the proper choice of connectors can be significant for the
performance of the system.
Refer to Figure 3.
For coupling LEDs, lasers and detectors with spherical and hemispherical lenses are
used to direct the light rays to minimise the power losses. However, this technique is
not used for coupling fibres to fibres.
For direct coupling of fibres the most commonly used fibre--connection technique is
to put the two fibre ends together with a minimum gap and maximum alignment,
while still allowing for remating when required.
Commonly used connectors are shown in Figure 3. Detail a) shows a ferrule--
mounted light source or detector connector. Detail b) shows a fibre--to--fibre
connector in which the slightly deformable ferrule slips very snugly into the receiving
bushing.
Couplers
In optical systems that have been discussed so far, only two terminals are used, a
transmitting terminal and a receiving terminal connected by a fibre--optic cable.
However, it is also possible to attach more than one set of terminals to a single fibre
rather than running a separate fibre or cable for each transmit/receive pair. For this
purpose, various types of couplers are used.
The most common application of this technology is within LANs, whereby a common
fibre carries the multiplexed signals from multiple terminals placed at various
locations within the LAN.
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Digital Techniques
Preliminary Module 5 Fibre Optics
Notes 5.10 5.10.2 - HO - 3
Access to the LAN is gained through the optical couplers that distribute parts of the
signal power on the LAN fibre to each receiver and couple power from each terminal
transmitter onto the fibre.
Refer to Figure 4.
There are various types of couplers, such as tree and brunch couplers, star couplers,
directional couplers and wavelength--dependent couplers. Each of these types has
its own characteristics. As an example, Figure 4 shows the application of a star
coupler.
The star coupler is a multiport coupler that permits power from one of n transmit
ports (TXA, TXB, TXC....TXn) to be split equally to each of n receive ports (RX1,
RX2, RX3....RXn) (detail a)).
Detail b) shows the LAN application of the star coupler, which is one of the most
common applications of this coupler type.
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Input
Source--to--
Notes
Input Digital
encoder
Optical fibre cable
Repeater
5.10
Output
Fibre--to Light
detector detector Amplifier
connection
Output
Digital
decoder
E 5254
5.10.2 - HO - 4
Fibre Optics
Digital Techniques
Preliminary Module 5 Fibre Optics
Notes 5.10 5.10.2 - HO - 5
E 5265
Sheath
Kevlar braid
Polyethylene jacket
Paper
Stranded core
Figure 2
Connector
144 fibres
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Digital Techniques
Preliminary Module 5 Fibre Optics
Notes 5.10 5.10.2 - HO - 6
Photodiode leads
Ferrule
b) Fibre--to--fibre connector
E 5266
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Digital Techniques
Preliminary Module 5 Fibre Optics
Notes 5.10 5.10.2 - HO - 7
TXA RX1
Star coupler
TXB
RX2
TXn
RXn
Terminal 1
RX
TX
Star coupler
RX
TX
Terminal n
E 5267
TX
RX
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Digital Techniques
Preliminary Module 5 Fibre Optics
Notes 5.10 5.10.3 - HO - 1
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Digital Techniques
Preliminary Module 5 Fibre Optics
Notes 5.10 5.10.3 - HO - 2
If a station has transmitted a message, it will regenerate the token and send it to the
next station once it sees its own signal coming back around.
The role of optical fibres in a LAN environment is to replace the more conventional
media of coax and twisted--pair cables in order to reduce electromagnetic interfer-
ences and to increase data rate and distance coverage.
Most LAN standards have concentrated on coax and twisted--pair cables for
transmission rates below 16 Mb/s. With the development and application of
fibre--optic cables the possibility was given for high--speed LANs running at 10 Mb/s,
16 Mb/s, 100 Mb/s or even above.
Ice formation on the wings of aircraft and helicopters blades, can cause disruption of
the airflow leading to a loss of lift and subsequently wing stall. In fixed wing aircraft it
is important to know where the ice is forming as the handling of the aircraft differs
between main or tail wing stall.
The situation is much more critical for helicopters where ice accretion on the main or
tail rotor blade will lead to an increase in drag, and engine power. If unchecked it will
lead rapidly to non--recoverable situation. The existing ice--detection systems use
ambient temperature and humidity from central sensors to determine icing condition,
which initiate the de--icing cycle.
Icing is recognised as one of the major safety issues and it is generally been
accepted that new regulations will enforce all aircraft to have some form of ice
warning system, possibly on all flying surfaces.
The fibre optic ice--detection system is capable of transmitting the information from
the rotating frame of the rotor--blade to a stationary frame of the control unit.
Development
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Digital Techniques
Preliminary Module 5 Fibre Optics
Notes 5.10 5.10.3 - HO - 3
a) CSMA/CD protocol
Simultaneous transmission at t1
t1 t1
Collision at t2
b) Token--ring protocol
t1: T1 receives
token
Terminal Terminal
1 3
Terminal
2
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Digital Techniques
Preliminary Module 5 Electronic Display
Notes 5.11 5.11.1 - HO - 1
Light--Emitting Diodes
For status indicators, pilot lamps and multisegment digital displays, the light--emitting
diodes (LED) are by far the most common device. These solid--state light sources
provide good visibility and require very low current and voltage levels for light
generation. One of the LED’s main advantages is its ability to be driven directly by
low--voltage and low--curent signals.
The discrete LED comes in many forms and four main visible colors (red, orange,
yellow and green). Infrared LEDs are also available for use as invisible light sources.
To understand the characteristics of the LED it is necessary to look at the physics
behind it.
Refer to Figure 2.
In most light sources, photons are generated by electrons falling to a lower energy
state. lt was discovered that certain semiconductor materials generate light when the
electrons fall from the conduction to the valence energy bands at a diode junction.
The physical properties of the semiconductor material determine how large an
energy drop exists between bands, so establishing the colour of the LED.
LEDs drop their energy at certain levels. Light--emitting diodes, generate light in very
narrow colour ranges and can in fact generate coherent (essentially monochromatic)
laser light.
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Digital Techniques
Preliminary Module 5 Electronic Display
Notes 5.11 5.11.1 - HO - 2
Materials that generate photons in the infrared and a portion of the visible light region
have been found. Gallium--arsenide phosphide is a good red emitter. Gallium--arse-
nide phosphite on gallium phosphide is a good yellow emitter. Gallium phosphide is a
fairly good green emitter. There are no blue or violet emitters commonly available
because semiconductor materials that exhibit an energy transition in the blue range
are rare.
The speed of response of the LEDs is 90 nanoseconds (ns) for the red and yellow
LEDs and 200 ns for the green LED. Because LEDs are semiconductor devices and
do not rely on thermal effects to generate light, they can be switched on and off very
quickly. This characteristic makes LEDs ideal for light modulation and communication
uses. Some LEDs are capable of being switched on and off at frequencies in the
range of hundreds of megaHertz (1 to 5 ns range).
Refer to Figure 3.
Interfacing an LED to a digital system is simple. A gate capable of providing the LED
with its required voltage and current levels can be used. Because an LED is a diode,
it will always drop its forward voltage across the diode junction, and it draws as much
current as is supplied to it. A current--limiting resistor is then required to put a ceiling
on this value.
LED Arrays
Arrays of LEDs can be used to represent alphanumeric characters. There are many
pre--assembled LED arrays available, ranging from the simple 7--segment types
found in calculators and digital clocks to 4 by 7 (and higher) dot matrix units.
In theory, interfacing LED arrays is no different from interfacing many single LEDs.
Individual segments can be driven with one gate. Special decoder--driver circuits are
designed to get a binary--coded decimal code and to drive appropriate array
segments to show the input code on the array.
Refer to Figure 4.
In a typical 7--segment display format it is usual to use one LED per segment and to
mount it within a reflective cavity with a plastic overlay and a diffuser plate.
The segments are formed as a sealed integrated circuit pack. Their connecting pins
are soldered to a printed circuit board. Depending on the use and the number of
digits containing the appropriate quantitative display, independent digit packs may be
used, or combined in a multiple--digit display unit.
The counter is of unique design in that its signal drive circuit causes an apparent
rolling of the digits. This simulates the action of a mechanical drum--type counter as it
responds to changes in engine speed.
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Digital Techniques
Preliminary Module 5 Electronic Display
Notes 5.11 5.11.1 - HO - 3
LED and gas--discharge displays fall into the ’active device’ category: they emit light
as a function of the electrical energy applied to them. The liquid crystal display (LCD)
is a passive device because it simply controls light reflection and transmission as a
function of supplied voltage. The LCD acts as a light shutter.
Liquid crystal displays are commonly used in digital watches and many types of
pocket calculator. They are also used in data displays for aircraft systems, e.g. for
the display of selected radio frequencies.
There are two characteristics which make LCDs particularly desirable in certain
areas:
V LCDs draw very little power (in the region of a millionths of a watt) because
controlling light with a shutter takes much less power than creating light.
Unlike with an LED, high--level ambient light can not override the LCD.
V Because the LCD is a shutter, the more light is thrown on it the more it will
reflect.
The passive nature of the LCD creates its disadvantages as well as its advantages.
Because the LCD does not emit any light, it can not be seen in the dark as an LED
can. Solutions to this problem are:
V the use of built--in lights in the front or in the back of the LCD for in--the--dark
uses
V use of special fluoresence--activated LCDs (FLADs), which use as much
ambient light as possible and direct it toward the digits (FLADs still require
some light).
Liquid crystal displays are easy to interface to almost any logic family. Because they
draw current in the micro--ampere range at potentials of only a few volts, even CMOS
circuits can successfully drive them directly. The only precaution in using LCDs is to
use only the recommended drive voltages for the LCD. Too much drive voltage can
seriously damage the liquid crystal dyes used in the LCD panel.
The basic structure of an LCD is shown in Figure 5. lt consists of two glass plates
which are coated on their inner surfaces with a thin transparent conductor material,
such as indium oxide. The material on the front plate is etched into the standard
display format of seven segments, each of which form an electrode. A mirror image
of the digits with its associated electrical contact is also etched into the oxide layer of
the back glass plate. But this is not segmented since it constitutes a common return
for all segments.
The space between the plates is filled with a liquid--crystal compound (esters and
biphenyls are typical) which has a thread--like molecular structure. The molecules are
oriented with their long axes in parallel. The complete assembly is hermetically
sealed with a special thermoplastic material to stop contamination of the liquid--crys-
tal compound by water vapour and oxygen.
LCD Operation
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Digital Techniques
Preliminary Module 5 Electronic Display
Notes 5.11 5.11.1 - HO - 4
The magnitude of the optical change is basically a measure of the light reflected from
(or transmitted through) the segment area to the light reflected from the background
area. An LCD does not emit light, but merely acts on light passing through it.
When two in--phase signals are applied to the display segments, the net voltage is
zero and the display segments freely relax to the de--energized state.
Matrix--Type LCD
The method of directly addressing each segment (as in dedicated displays) becomes
impossible when a large quantity of information needs to be displayed, since it
requires a separate drive circuit and wire contact for each image element (plus one
for the counterelectrode).
A matrix system is used instead. In such a matrix, each image element (or: pixel) is
defined by the intersection of two arrays of parallel electrodes disposed orthogonal to
each other. This makes it possible to address ’M by N’ pixels with only ’M + N’
electrodes.
The reason behind matrix--addressing is obvious: the display is a lot simpler by the
reduced number of electrical connections to the drive circuits. However, in this case,
the pixels are no longer individually accessible. The display has therefore to be
addressed sequentially, usually line--by--line.
Unlike a dedicated display (where each point is statically controlled) each point in a
matrix display is excited by a signal voltage during a fraction of time
(T/N with: N = number of rows in the display; T = data refresh period) as well as by
stray voltages during the remaining time, due to the excitation of other points in the
same column.
As the number of display rows increases, the time T/N diminishes while the stray
voltages gain in relative importance. This leads to a degradation in the panel’s
electro--optical performance (contrast, viewing angle) called ’cross talk effect’.
Displays using this new system are known as ’active--matrix liquid crystal displays’.
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Digital Techniques
Preliminary Module 5 Electronic Display
Notes 5.11 5.11.1 - HO - 5
Refer to Figure 8.
A cathode ray tube (CRT) is an evacuated glass tube that produces images by
focussing an electron beam on phosphors, which coat the screen area.
The brightness of the display is determined by the current in the beam. The beam is
directed by either electrostatic or magnetic deflection circuits built around the neck of
the CRT.
A display is created by systematically sweeping the beam across the entire surface
of the screen while varying the intensity. A pattern is traced on the screen showing
graphically the changes of the electrical input. The cathode ray tube is mainly an
indicating device.
The CRT has many uses, e.g. displaying current and voltage waveforms in the
oscilloscope, as the display of a radar set or for presenting a television picture. In the
latter case, the brightness of the spot is changed as well as its position on the
screen.
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Digital Techniques
Preliminary Module 5 Electronic Display
Notes 5.11 5.11.1 - HO - 6
Refer to Figure 9.
When a cathode is heated, it emits electrons. In the CRT (as in a valve) the source of
electrons is a cathode. But in the case of the CRT this cathode is specially designed
so that it emits electrons in one direction and from one end only.
The first step in the formation of an electron beam is the production of a stream of
electrons which all travel into the same direction. This is done by using suitable
voltages to a specially--shaped control grid and anode, which are placed on the same
axis as the cathode.
The anode is merely a metal disc with a hole in its centre. The control grid (which
surrounds the cathode) is a metal cylinder with a hole cut in the centre of its
end--plate. The holes in the anode and grid are aligned with the cathode to form an
obstruction--free path along which the stream of electrons can pass.
When a positive voltage is applied to the anode, the electrons emitted by the cathode
will be accelerated towards it. lf, at the same time, a negative voltage is applied to the
grid, the moving electrons will be concentrated into a beam along the axis of the
three electrodes. Most of the electrons will pass through the hole in the centre of the
anode.
The density of the electron--beam, i.e. the number of electrons which pass through
the anode and strike the fluorescent screen, can be altered by varying the negative
voltage applied to the grid. As the brilliance of the spot formed on the screen
depends partly on the number of electrons which strike it, the negative voltage
applied to the grid is an obvious choice for use as a ’brilliance control‘.
Focussing
The beam of electrons produced by this system of electrodes begins to spread out as
it leaves the hole in the centre of the accelerating anode. A diverging beam like this
would produce a comparatively large illuminated area when it struck the screen of
the CRT, whereas what is needed is a small spot.
The electrons must then be focussed so as to form a converging beam which will
eventually become so narrow as to finish up as a mere point on the screen.
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Digital Techniques
Preliminary Module 5 Electronic Display
Notes 5.11 5.11.1 - HO - 7
Both these types are in common use. However, tubes are not rigidly classified in this
way since there are changes for different purposes. Like TV screens, displays being
used in aircraft are based on magnetic deflection.
Magnetic focussing relies on the fact that, when an electron enters a magnetic field,
its direction of movement is changed. The amount of this change of direction
depends on the strength of the field.
In this method of focussing, a current is passed through a coil placed round the neck
of the tube. The shape and strength of the resulting magnetic field will depend on
three factors:
V the size of the coil
V the exact location of the coil along the CRT
V the amount of current flowing through the coil.
Electro--Magnetic Deflection
A set of deflection coils is placed around the outside of the neck of the CRT in such a
way, that the axis of their magnetic fields is at right angles to the path of the electron
beam. The amount of current passing through these deflecting coils determines the
strength of the magnetic field produced.
The vertical deflecting coils are wound in such a way that their fields reinforce one
another in producing an even magnetic field. The horizontal deflecting coils are
wound similarly. The result is to produce an even ’deflection sensitivity‘ over the
entire screen.
The Screen
The only point not yet explained is the coating round the inside of the tube just in
front of the screen. This coating is formed by painting a solution of graphite on the
inside of the tube and allowing it to dry.
A voltage is applied to the coating similar to that applied to the second anode, which
gives the electrons a return path to earth close to the screen and stops them from
building up into a space charge near the screen (which would tend to defocus the
beam). The coating also effectively screens the beam from external electrostatic
fields.
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Digital Techniques
Preliminary Module 5 Electronic Display
Notes 5.11 5.11.1 - HO - 8
In some CRTs, the graphite coating is applied in a thin ring close to the tube face. lf a
much higher voltage is applied to this coating than is applied to the second anode,
the electrons will be accelerated after they have passed the deflecting plates.
Because they are travelling faster, they will possess more energy, so increasing the
brightness of the spot.
An effect similar to PDA can be done by increasing the voltage on the second anode.
But this would mean that the electrons would pass the deflecting plates much faster,
and so would be deflected to a lesser extent. Deflection sensitivity would then be
reduced.
Looking from the front of the tube, the rear of the phosphorus is coated with
aluminium. This coating serves two functions: it increases the contrast of the picture
because no light can penetrate to the rear of the tube and brighten the background.
Because of the beam electrons colliding with remaining air molecules, ions are
produced which are not deflected (because of their higher mass) and would cause
the phosphorus at the centre of the screen to be quickly destroyed. To stop this the
ions remain on the aluminium coating.
The inner and outer of the cone is coated with a conductive layer. The outer coat is
connected to ground. The inner is connected via a steel wire. This wire passes
through the glass and is connected to the anode and hence the anode voltage.
Both conducting layers and the glass between them function as a condenser which
can supply voltage long after the equipment is switched off.
All colours are a product of the primary colours, red, green and blue. The illumination
layer of the screen consists of three different phosphors, applied to the inside of the
picture screen (either in the form of points or lines). When these phosphors are hit by
electrons, they illuminate in a particular primary colour.
The frame is made of a steel plate and fastened with special bimetal springs (inside
the glass tube). The frame is under mechanical tension causing the wires to remain
taut (tight).
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Digital Techniques
Preliminary Module 5 Electronic Display
Notes 5.11 5.11.1 - HO - 9
The three electron guns produce three separate electron beams. There are
three separate optics with a common focus. The beam intensity is controlled as in a
black--and--white tube. The focus voltage, however, differs greatly (the colour tube
has a much greater voltage). After focussing, the three electron beams move almost
parallel through the deflection field.
They are deflected together in the X or Y direction. The three beams converge at the
mask and cross. For every three colour strips (blue, green and red) there exists one
wire. This wire allows only the electrons of that gun to pass the phosphorus of which
is to be effected.
Colour picture tubes are sensitive to the influence of exterior magnetic fields. As the
beams are magnetically controlled, exterior fields lead to colour impurities.
An electron beam starts in the left--hand corner and moves horizontally across the
screen. This action is called a ’horizontal scan’. The beam is then blanked (or turned
OFF) to avoid interference with the display on the screen, and turned to the left side
to start another scan. The time for this horizontal retrace is much shorter than the
scan time.
During the horizontal scans, the beam slowly moves down the screen until it reaches
the bottom. At this point, the beam has made many horizontal scans and one vertical
scan. The beam is then blanked and rapidly returned to the top to start another
vertical scan.
In the interlaced method all odd--number lines are transmitted first (starting with line
1). Then the even--number lines are transmitted (starting with line 2). This works well
in TV applications where colours and shadings change gradually. Two scans are
made down the screen for one single picture (or: frame). Both scans overlap (or
interlace) into a single frame.
In European TV systems, there are 262.5 horizontal lines per scan and a total of
525 lines per frame. The scan rate is 50 Hz and the frame rate is 25 Hz. The frame
frequency was derived in the initial stages of television from the mains frequency
(50 Hz) giving 50 half frames per second.
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Digital Techniques
Preliminary Module 5 Electronic Display
Notes 5.11 5.11.1 - HO - 10
Higher density displays are needed for some of the more advanced terminals. Future
developments will surely use the interlaced method. To get more characters on the
screen, some data CRTs use a higher sweep frequency.
The horizontal oscillator frequency can range from 15,720 Hz (which gives 262 scan
lines per scan) to 50,000 Hz (which gives 833 scan lines).
To generate a legible display, the horizontal and vertical oscillators must be kept in
step with each other and with the displayed information. This is done by generating a
horizontal sync and a vertical sync signal. Each of these causes its oscillator to be
reset and starts the beam over again at precisely the correct time.
As the beam scans off the edge of the screen, it must be blanked until it reaches the
position where data is to be displayed. The beam must also be blanked during
retrace both in the horizontal and vertical directions. The signal that controls the
electron beam is called ’blanking’ or ’display enable’.
Character Generation
The most common method of generating characters is to create a matrix of dots, ’x’
dots (or columns) wide, and ’y’ dots (or rows) high. Each character is created by
selectively filling in dots.
As ’x’ and ’y’ get larger, a more detailed character can be created. Two common dot
matrices are 5 by 7 and 7 by 9. Characters require some space between them, so
they are placed in a character block that is larger than the character.
As the electron gun of the CRT scans one line across the screen, it displays the first
row of dots for each character on that character line. On the next scan, the second
row of dots and spaces for each character are displayed. Then this sequence is
repeated for every character line on the screen.
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Digital Techniques
Preliminary Module 5 Electronic Display
Notes 5.11 5.11.1 - HO - 11
a) Seven segments
A
F B
G
E C
D No.of segments 6 2 5 5 4 5 6 3 7 6
b) 13 and 16 segments
c) 4--by--7 matrix
7 rows
E 0671 B
4 columns
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Digital Techniques
Preliminary Module 5 Electronic Display
Notes 5.11 5.11.1 - HO - 12
Protective cover/
diffuser lens
Crystal chip
+
Connections
Effective
segment
height
Plastic overlay
E 0672 A
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Digital Techniques
Preliminary Module 5 Electronic Display
Notes 5.11 5.11.1 - HO - 13
+5 V
TTL gate
Relative luminous intensity
3.0
2.5
2.0
1.5
1.0
E 0673 A
0.5
10 20 30 40 50
Forward current -- mA
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Digital Techniques
Preliminary Module 5 Electronic Display
Notes 5.11 5.11.1 - HO - 14
dp
Individual LED
40 60
20 N2 80
%RPM
0 100
FE 0674 A
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Digital Techniques
Preliminary Module 5 Electronic Display
Notes 5.11 5.11.1 - HO - 15
7--segment electrode
Front plate
Liquid crystal
layer
(typical spacing
= 10 microns)
Back plate
Segment contacts
Mirror image
(not segmented)
Common return
contact
FE 0675 A
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Digital Techniques
Preliminary Module 5 Electronic Display
Notes 5.11 5.11.1 - HO - 16
VO
Column
(source)
TFT
(thin--film transistor)
VG
Row (gate)
Liquid crystal
Counter--electrode VCE
E 0676 A
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Digital Techniques
Preliminary Module 5 Electronic Display
Notes 5.11 5.11.1 - HO - 17
Row electrode
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Digital Techniques
Preliminary Module 5 Electronic Display
Notes 5.11 5.11.1 - HO - 18
Glass envelope
Permanent magnets
(beam focussing)
Grid
Screen
Heater
Cathode
Anode
Electron
E 0678 A
beam
Deflecting
coils
Graphite coating
(collects secondary electrons
to prevent screen from becoming
negatively charged)
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Digital Techniques
Preliminary Module 5 Electronic Display
Notes 5.11 5.11.1 - HO - 19
Hollow cylinder
(grid)
Divergent
beam of
electrons
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Digital Techniques
Preliminary Module 5 Electronic Display
Notes 5.11 5.11.1 - HO - 20
E 0680 B
Phosphor--coated
screen
Grid
Cathode
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Digital Techniques
Preliminary Module 5 Electronic Display
Notes 5.11 5.11.1 - HO - 21
Electron guns
Mask aperture
FB 4616 C
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Digital Techniques
Preliminary Module 5 Electronic Display
Notes 5.11 5.11.1 - HO - 22
R G B
FB 3156
Shadow mask
Coating
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Digital Techniques
Preliminary Module 5 Electronic Display
Notes 5.11 5.11.1 - HO - 23
a) Non--interlaced
b) Interlaced
Line 1
Line 2
FE 0682 A
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Digital Techniques
Preliminary Module 5 Electronic Display
Notes 5.11 5.11.1 - HO - 24
Blanking
H -- sync
A B C Line
Horizontal
retrace
Display period period
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Digital Techniques
Preliminary Module 5 Electronic Display
Notes 5.11 5.11.1 - HO - 25
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Digital Techniques
Preliminary Module 5 Electronic Display
Notes 5.11 5.11.1 - HO - 26
1
2
Scan lines
3
4
5
6
7
E 0685
8
9
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Digital Techniques
Preliminary Module 5 Electrostatic--Sensitive Devices
Notes 5.12 5.12.1 - HO - 1
The charges are caused by friction between two surfaces, at least one of which is
non--conductive. The magnitude and polarity of the charges depend on the
V different affinities for electrons of the two materials rubbing together
V friction force
V humidity of surrounding air.
Mostly all pins of semiconductor devices are protected against electrostatic dis-
charge.
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Digital Techniques
Preliminary Module 5 Electrostatic--Sensitive Devices
Notes 5.12 5.12.1 - HO - 2
Such devices should be kept in their original packing whilst in storage. If a bulk
container is partially unpacked, the unpacking should be done at a protected
workstation. Any components that are stored temporarily should be packed in
conductive or anti--static packing or carriers.
All tools used during PCB assembly, including soldering tools and solder baths, must
be grounded. All hand--tools should be of conductive or anti--static material and,
where possible, should not be insulated.
Completed PCBs must be tested at a protected workstation. Place the soldered side
of the PCB on conductive or anti--static foam and remove the short--circuit clips.
Remove the PCB from the foam, holding the board only at the edges. Make sure the
PCB doesn’t touch the conductive surface of the workbench.
After testing, replace the PCB on the conductive foam to await packing.
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Digital Techniques
Preliminary Module 5 Electrostatic--Sensitive Devices
Notes 5.12 5.12.1 - HO - 3
Plastic trays
Plastic envelopes
Air blowing over table top
Figure 1
Plastic storage bins
Nylon overall
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Conductive Electrostatic
Notes
Cotton overall
Safety Distribution
isolation supply box
transformer
B 8009
5.12
Supply
earth heel grounding protectors
Conductive
bench top
1 M9 Conductive stool
5.12.1 - HO - 4
Digital Techniques
Preliminary Module 5 Software Management
Notes 5.13 5.13.1 - HO - 1
General Information
Refer to Figure 1.
A digital line replaceable unit (LRU) is a black box of electronics, for a complex
engineered system like an aircraft, ship or other vehicle.
Every digital LRU (line replaceable unit) consists of:
V Hardware
-- that comprises all of the physical parts, as distinguished from the data it
contains or operates on.
V Software
-- that provides instructions for the hardware to accomplish tasks.
Hardware
LRUs speed up repair, because they can be replaced quickly, restoring the big
system to service. They also reduce the cost of systems, and increase the quality,
by spreading development costs of the type of unit over different models of vehicles.
LRUs are designed to specifications. The specification defines the inputs and
outputs. It also defines the tools to replace the unit (usually nothing more than a
screwdriver), and the bulk and weight (they always need to be carried by one man,
and fit through a door, if possible).
There are also requirements for flammability, unwanted radio emissions, resistance
to damage from fungus, static electricity, heat, pressure, humidity, condensation
drips, vibration, radiation and other environmental measurements.
Many LRUs for commercial aircraft are designed according to ARINC specifications.
ARINC (Aeronautical Radio Incorporated) is a company owned by a number of
airlines, that sells specifications and sets standards. LRUs are also defined by
aviation manufacturers, or various military organizations.
Software
Digital components are electric circuits based on a number of discrete voltage levels.
In most cases there are two voltage levels: one near to zero volt and one at a higher
level depending on the supply voltage in use. These two levels are often represented
as L and H.
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Digital Techniques
Preliminary Module 5 Software Management
Notes 5.13 5.13.1 - HO - 2
To remove the charge, one would place the chip under an intense
short--wavelength fluorescent ultraviolet lamp for 20--30 min, returning the
entire chip to its original blank (all ones) state.
V EEPROM (electrically erasable programmable read only memory)
-- An EEPROM is a non--volatile storage chip used in computers and other
devices. Unlike EPROMs, EEPROMs can be programmed and erased
electrically.
V EPROM
-- An EPROM, or erasable programmable read only memory, is a type of
computer memory chip that retains its data when its power supply is
switched off. In other words, it is non--volatile. A programmed EPROM
retains its data for about ten to twenty years and can be read an unlimited
number of times.
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Digital Techniques
Preliminary Module 5 Software Management
Notes 5.13 5.13.1 - HO - 3
V Decoder
-- A decoder is a device which does the reverse of an encoder, undoing the
encoding so that the original information can be retrieved. The same
method used to encode is usually just reversed in order to decode.
In digital electronics this would mean that a decoder is a multiple--input,
multiple--output logic circuit that converts coded inputs into coded
outputs, where the input and output codes are different (BCD decoder).
Program Interchange
Refer to Figure 2.
A portable data loader has direct access to the LRU via a test socket. Digital data
interchange is usually performed by means of a floppy disc.
A modern PDL (Figure 2) is capable of performing LRU data loading with or without
the use of floppy discs. The PDL includes an internal mass storage device that can
host the loadable software for an airline’s entire fleet.
Refer to Figure 3.
An airborne data loader is mounted in the aircraft. It is used to upload and download
software and data from/to on--board computers. A typical ADL can load navigation
databases and operational flight programs as well as perform multi--volume data
recording and blank disk formatting.
Refer to Figure 4.
Program interchange is performed under the use of the menu ’programming’ on the
control display unit. After the password is entered the changes can be carried out by
the keyboard.
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Digital Techniques
Preliminary Module 5 Software Management
Notes 5.13 5.13.1 - HO - 4
C 0090
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Digital Techniques
Preliminary Module 5 Software Management
Notes 5.13 5.13.1 - HO - 5
C 0091
E ITS International Training & Support GmbH. All rights reserved. For training purposes only -- Rev. 01/09
Digital Techniques
Preliminary Module 5 Software Management
Notes 5.13 5.13.1 - HO - 6
C 0092
E ITS International Training & Support GmbH. All rights reserved. For training purposes only -- Rev. 01/09
Digital Techniques
Preliminary Module 5 Software Management
Notes 5.13 5.13.1 - HO - 7
C 0093
E ITS International Training & Support GmbH. All rights reserved. For training purposes only -- Rev. 01/09
Digital Techniques
Preliminary Module 5 Software Management
Notes 5.13 5.13.2 - HO - 1
Many newer aircraft feature loadable systems whose functionality may be changed
or updated using onboard loadable software. Modifying system functionality with new
software instead of with modified or new hardware can help operators reduce the
total number of hardware line LRU in inventory, increase hardware commonality,
and reduce airplane modification time.
Loadable software falls into several categories according to function:
V Operational program software (OPS)
V Operational program configuration (OPC)
V Database
V Airline modify--able information (AMI).
The operating system of an LRU, the OPS acts on data contained in the operation
program configuration (OPC) files to define the function of the LRU. The OPS is
typically the largest, most complex software associated with an LRU, both in the
amount of information it contains and the time required to load the software.
Obtaining certification for new versions of an OPS requires commensurate time and
effort.
This software is a specialized database that determines the LRU configuration and
function by enabling or disabling optional features contained in the OPS. Configur-
ation information is also supplied to many LRUs through hard--wired discretes
(program pins).
The large number of possible combinations of software and program--pin configur-
ations complicates configuration management. Though an OPC will probably never
completely replace program pins, as much configuration information as possible is
placed in the OPC.
The OPC is small compared to the OPS and typically requires less than one minute
to load.
Database
A database is a collection of data arranged for easy access and retrieval by the
operating system of an LRU. Some of the databases used by software loadable
LRUs are:
V Flight management computer (FMC) navigation database (NDB)
V FMC model/engine database
V FMC performance defaults database
V FMC quick reference handbook takes--speeds database
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Digital Techniques
Preliminary Module 5 Software Management
Notes 5.13 5.13.2 - HO - 2
AMI is another small data file that supplies information to the OPS of some LRUs.
The operator generates the AMI data file to specify preferences for functions such as
cabin management data recording, report generation and formatting, and services
provided to the various passenger seating zones
AMI data files are used by some LRUs to provide information used by the OPS.
On some airplanes, for example, when data needs to be recorded or formatted,
reports generated, or seating zone services specified, the appropriate OPS refers to
the AMI data file for the necessary information to accomplish the task.
An AMI data file is typically data rather than programs or executable code. However,
AMI data files for some systems include logic units, which are high--level program
code.
To what extent AMI data files can be modified is controlled by the certified OPS of the
LRU, which prevents operator modifications from affecting safety, regardless of
whether the modifications are correct. It is only on this basis that such modification is
permitted without certification authority review.
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Digital Techniques
Preliminary Module 5 Software Management
Notes 5.13 5.13.2 - HO - 3
Introduction
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Digital Techniques
Preliminary Module 5 Software Management
Notes 5.13 5.13.2 - HO - 4
A loadable software part is identified by a unique part number, distinct from the part
number of the hardware component (the LRU) or components in which the software
is loaded. Hardware part numbers listed in the illustrated parts catalogue (IPC) refer
to the physical component only, with no software loaded.
To order a loadable LRU with the software preloaded, the operator must order both
the software and hardware part numbers and stipulate that the software is to be
loaded into the LRU.
The part number of a software program or file is distinct both from the part number
for the media set and the part number for the hardware LRU.
The media set part number may represent one media part or a set of two or more
media parts. The media parts are labelled to indicate how many parts are in the set,
and to identify the designation of each member in a set (for example, 1 of 2, 2 of 2).
The standard media parts are 3.5--in disks, but software for some systems is
supplied on other media, such as on CD--ROM. As a result of operator requests,
beginning in 1999 loadable software will be listed in the IPC according to the
loadable software part number and will be called out in the chapter corresponding to
each loadable system.
The disk part number associated with a loadable software part number will be
referenced in the nomenclature field of each software part number.
Loadable software will be shown in the IPC according to the loadable software part
number, because this is the part number that the mechanic must verify is installed in
an LRU. However, operators must order loadable software parts by specifying the
disk set part number.
It is recommended that operators establish and maintain a software control library (or
libraries) for storing back--up copies of loadable software, associated documentation,
and any media binders that are not kept on an airplane.
Using a software control library can help operators ensure the availability and
integrity of loadable software parts to support their airplanes. Operators must obtain
necessary permission from the supplier before duplicating software, storage media,
or documentation.
Each aircraft is provided with media parts which are packaged in a binder or set of
binders. The standard media type is a 3.5--in disk, but the generic term is media set.
Each media set has its own part number, which is different from the software part
number or part numbers of its components.
In addition to the media sets delivered with the airplane, a supplier for a loadable
system will provide up to ten additional media sets (per part number) upon operator
request.
The binder containing the loadable software is considered part of the certified
configuration of the airplane and so is intended to be stored on the aircraft.
The binders, binder pages, and media sets have unique part numbers and can be
ordered using the same process as for any other spare.
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Digital Techniques
Preliminary Module 5 Software Management
Notes 5.13 5.13.2 - HO - 5
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Digital Techniques
Preliminary Module 5 E/M Environment
Notes 5.14 5.14.1 - HO - 1
EMC is the branch of electrical sciences which studies the unintentional generation,
propagation and reception of electromagnetic energy with reference to the unwanted
effects that such an energy may induce.
In particular, the aim of EMC is the correct operation, in the same environment,
of different equipments which involve electromagnetic phenomena in their operation.
Of course to reach this state, it is necessary to reduce the emissions from sources
that are controllable, to increase the immunity of equipment that may be affected,
or to do both.
In addition, the immunity of a particular piece of equipment can vary (e.g. induced
voltages on a circuit board are strong functions of the angle of incidence and
polarization of the incident EM field).
This variability results in a situation where a balance is found between immunity and
emissions for a particular type of disturbance to prevent problems in a large
percentage (but not all) of the cases of interest.
To try to eliminate all problems (by decreasing emissions and increasing immunity
further) could create a high cost to industry and could prevent new technologies from
emerging.
For example a restriction to lower the transmitting power of cell phones so that
consumers could lay their cell phones on top of any piece of electronic equipment
could compromise the performance and economic viability of cell phone systems.
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Digital Techniques
Preliminary Module 5 E/M Environment
Notes 5.14 5.14.1 - HO - 2
On the other hand, a requirement that all commercial electronic equipment perform
without malfunction at levels of 50 V/m, would place a financial burden on a large
range of equipment.
The frequency range of interest in EMC studies is usually from 100 -- 1011 Hz and the
time scales of interest from 100 -- 10 --12 s. Depending on the sources and the
systems being affected the currents of interest have a range 10 --9 -- 106 A and
electric fields have a range 10 --7 -- 107 V/m.
Refer to Figure 1.
Inverters etc. cause very severe interference over a wide frequency range, due to the
very fast switching of components.
Refer to Figure 2.
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Digital Techniques
Preliminary Module 5 E/M Environment
Notes 5.14 5.14.1 - HO - 3
f
C 0077
1G
UHF
TV
10 M
SW
EMI
RFI
Radio
MW
1M
Figure 1
LW
150 k
10 k
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Digital Techniques
Preliminary Module 5 E/M Environment
Notes 5.14 5.14.1 - HO - 4
C 0078
equipment
Victim
susceptibility
Conducted
EMI Propagation
susceptibility
Radiated
Radiated
emission
Figure 2
Conducted
emission
equipment
Source
Power cable
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Digital Techniques
Preliminary Module 5 E/M Environment
Notes 5.14 5.14.2 - HO - 1
Refer to Figure 1.
The coupling path may involve one or more of the following coupling mechanisms:
V Conduction -- electric current
V Radiation -- electromagnetic field
V Capacitive coupling -- electric field
V Inductive coupling -- magnetic field.
Conducted noise is coupled between components through interconnecting wires
such as through power supply and ground wires. Common impedance coupling is
caused when currents from two or more circuits flow through the same impedance
such as in power supply and ground wires.
Radiated electromagnetic field coupling may be treated as two cases. In the near
field, E and H field coupling are treated separately. In the far field, coupling is treated
as a plane wave coupling.
Electric field coupling is caused by a voltage difference between conductors.
The coupling mechanism may be modelled by a capacitor.
Some typical external noise sources into a radio receiver include radiated electric
field coupling from: high--voltage power lines, broadcast antennas, communications
transmitters, vehicle ignition systems and electric machinery. Most conducted
coupling from external sources occurs through the AC power lines.
Typical radio interference to other equipment includes radiated electric field coupling
to: TV sets, broadcast receivers, telephone lines, appliances, and communications
receivers. Most conducted coupling to other equipment occurs through the AC power
lines.
The most common methods of noise reduction include proper equipment circuit
design, shielding, grounding, filtering, isolation, separation and orientation, circuit
impedance level control, cable design, and noise cancellation techniques.
Electromagnetic radiation involves electric (E) and magnetic (H) fields. Any change in
the flux density of a magnetic field will produce an electric field change in time and
space (Faraday’s Law). This change in an electric field causes another change in the
magnetic field due to the displacement current (Maxwell).
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Digital Techniques
Preliminary Module 5 E/M Environment
Notes 5.14 5.14.2 - HO - 2
Wave propagation occurs when there are two forms of energy and the presence of a
change in one leads to a change in the other. Energy interchanges between electric
and magnetic fields as the wave progresses.
Electromagnetic waves exist in nature as a result of the radiation from atoms or
molecules when they change from one energy state to another and by natural
fluctuations such as lightning. The technology of generating and processing
electromagnetic waves forms the basis of telecommunications.
Electromagnetic Interference
Electromagnetic interference (EMI) is electromagnetic energy that adversely affects
the performance of electrical/electronic equipment by creating undesirable responses
or complete operational failure. The interference sources may be external or internal
to the electrical or electronic equipment and they may propagate by radiation or
conduction.
This discipline includes radio frequency interference (RFI), the term which was
originally used to describe most electrical interference.
EMI is usually divided into two general categories to help in analyzing conducted and
radiated interference effects:
V Narrowband emission
V Broadband emission.
Narrowband Emission
A narrowband signal occupies a very small portion of the radio spectrum.
The magnitude of narrowband radiated emissions is usually expressed in terms of
volts per meter (V/m). Such signals are usually continuous sine waves (CW) and may
be continuous or intermittent in occurrence.
Communication transmitters such as single--channel AM, FM and SSB fall into this
category. Spurious emissions, such as harmonic outputs of narrowband communica-
tion transmitters, power--line hum, local oscillators, signal generators, test equipment,
and many other man made sources are narrowband emissions.
Broadband Emission
A broadband signal may spread its energy across hundreds of megahertz or more.
The magnitude of broadband radiated emissions is usually expressed in terms of
volts per meter per MHz (V/m/MHz).
This type of signal is composed of narrow pulses having relatively short rise and fall
times. Broadband signals are further divided into random and impulse sources.
These may be transient, continuous or intermittent in occurrence.
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Digital Techniques
Preliminary Module 5 E/M Environment
Notes 5.14 5.14.2 - HO - 3
Electromagnetic Compatibility
Electromagnetic Pulse
The electromagnetic pulse (EMP) or nuclear electromagnetic (NEMP) effect was first
observed during the early testing of high altitude airburst nuclear weapons.
The phenomena has been known since the late 1950s. The characteristics of the
electromagnetic radiation resulting from the nuclear explosion depend on the altitude
at which the explosion occurs.
The three EMP categories are
V high altitude burst
V air burst
V surface burst.
Compton Process
Refer to Figure 2.
The source of electromagnetic radiation is basically the same in all cases. The high
energy ’Gamma radiation’ from the nuclear explosion collides with the air molecules
in the earth’s atmosphere and dislodges electrons from these molecules which then
become free to move rapidly away from their parent molecule.
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Digital Techniques
Preliminary Module 5 E/M Environment
Notes 5.14 5.14.2 - HO - 4
These free electrons are known as ’Compton Electrons’ and the movement of the
charge is known as ’Compton Current’. The difference between the three categories
of EMP is the way in which the ’Compton Electrons’ and the resulting ’Compton
Current’ produce the electromagnetic field (Compton process).
This causes them to spiral round the field, thus producing a huge line of current
loops. This is the dominant source of electromagnetic radiation in the high altitude
EMP. The field produced is of high magnitude (over 50 kV/m) and has a very fast rise
time (ns).
Because of the high altitude the area of coverage is enormous. It is worth noting that
EMP is the only significant effect of an exo--atmospheric nuclear explosion. Therefore
it can be of extreme strategic importance. For this reason electrical and electronic
systems which are required to continue to function throughout a serious conflict must
be unaffected by EMP.
EMP Shielding
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Digital Techniques
Preliminary Module 5 E/M Environment
Notes 5.14 5.14.2 - HO - 5
C 0064
Victim
Electromagnetic Interference
Radiated emissions
Conducted emissions
(E and H fields)
(transients, ripple)
Figure 1
Source emitter
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Digital Techniques
Preliminary Module 5 E/M Environment
Notes 5.14 5.14.2 - HO - 6
C 0065
Compton electrons
Compton Process
Positive
Air molecule
Gamma rays
Figure 2
NEMP burst
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Digital Techniques
Preliminary Module 5 E/M Environment
Notes 5.14 5.14.2 - HO - 7
C 0066
Incoming cables
equipment
Critical
EMP Shielding
Internal cables
Figure 3
Doors and hatches
equipment
Host building
Critical
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Digital Techniques
Preliminary Module 5 E/M Environment
Notes 5.14 5.14.3 - HO - 1
In modern aircraft, flight controls that once were operated manually via cables and
hydraulics are increasingly being replaced by digital electronics. Because of weight
and maintenance advantages over conventional hydraulic controls, future commer-
cial aircraft are envisioned as ’all--electronic’.
Some aircraft are designed near the edge of aerodynamic stability and even depend
on computer--assisted controls to stay in the air. In this world of digital fly by wire
(or light) avionics, computerized controls, smart actuators, and other ’black boxes’,
the potential susceptibility of flight--critical systems to external radio frequency
interference is a real concern.
It would be expensive, dangerous, and nearly impossible to test all of the flight
control systems on all classes of aircraft under all likely electromagnetic environ-
ments. Instead, computational and experimental methods are being developed to
assess the effects of electromagnetic interference on aircraft electronics.
Field probes located inside the aircraft measure various field intensities. (Figure 1,
detail a)). Then the interactions of the HIRF fields with the aircraft can be visualized
as colour--coded contours, as shown in Figure1, detail b). The warmer colours
indicate higher field intensities, while cooler colours represent lower field intensities.
Introduction
Aircraft transmit and receive RF signals in the atmosphere external to the aircraft.
In addition, RF signals are conducted and radiated within the aircraft, through
electrical cabling, to control and communicate with various electronic systems.
In addition, if the HIRF gradient within the pressurized area of the aircraft exceeds
23 kV/cm, an electrical discharge may be induced between narrowly separated
conductors. In this latter case, physical damage to electrical components may occur
and flammable materials in the surrounding area may ignite.
The HIRF environment in the vicinity of the occurrence aircraft was studied to
determine whether the ambient field strength was sufficient to produce such an
effect.
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Digital Techniques
Preliminary Module 5 E/M Environment
Notes 5.14 5.14.3 - HO - 2
Airport Environment
An estimate of the most severe HIRF environment, during any phase of flight,
was developed for airspace where fixed--wing commercial operations are permitted.
Field strengths were calculated for surface emitters and airborne intercept radars,
operating at the minimum separation distances permitted under instrument flight
rules.
Mobile and experimental transmitters, and transmitters located inside restricted,
prohibited, and danger areas, were not considered. This methodology produced a
worst--case peak field strength of 7.2 kV/m, which is assessed to occur in the
4 to 6 GHz frequency band.
When a travelling wave is reflected back upon itself, the incident and reflected wave
energy may combine to form a spatially stationary, reinforced wave. For an electro-
magnetic waveform, such as HIRFs, reinforced wave phenomena or resonance can
occur in closed cavities, along a length of wire or around the perimeter of an
aperture.
When resonant conditions exist, the energy density of the reinforced wave may be up
to 25 times greater than the energy density of the incident wave. In practice,
resonant gain factors rarely exceed a single order of magnitude.
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Digital Techniques
Preliminary Module 5 E/M Environment
Notes 5.14 5.14.3 - HO - 3
b) Colour--coded contours
C 0073
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Digital Techniques
Preliminary Module 5 E/M Environment
Notes 5.14 5.14.4 - HO - 1
5.14.4.1 Introduction
Nature of Lightning
Refer to Figure 1.
Lightning is the transient passage of electrical current between a cloud and either the
surface of the earth, another cloud, or an object in or near a cloud (e.g., an aircraft or
rocket). A lightning flash can contain about one billion volts of electricity. That’s
enough energy to light a 100 W bulb for three months.
Lightning is most commonly associated with thunderstorms, but can also occur in
snow storms and from the ash cloud of volcanic eruptions.
Refer to Figure 2.
It is well recognized that the trend toward integrated circuits with more transistors per
unit area, and faster switching speeds, makes these circuits more vulnerable to both
upset and damage.
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Digital Techniques
Preliminary Module 5 E/M Environment
Notes 5.14 5.14.4 - HO - 2
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Digital Techniques
Preliminary Module 5 E/M Environment
Notes 5.14 5.14.4 - HO - 3
Warning of Lightning
Local weather forecasts, listening for thunder from a line of approaching storms,
looking at the locations of cloud--to--ground lightning on a map provided by national
authorities, or using a local electronic instrument to detect intense atmospheric
electric fields that signal the development of a thunderstorm overhead.
While such warnings may be useful to mobilize repair personnel, or to shut down
nonessential equipment, it is not economically feasible to disconnect every electrical
or electronic appliance during every local thunderstorm.
Lightning Protection
Lightning protection and surge--protective devices can be divided into three general
classes.
Refer to Figure 3.
1. There are air terminals (commonly called lightning rods) on the roof, which
are connected to earth through down conductors.
-- Traditionally, a chimney sweep, roofer, or lightning--protection company
installs air terminals.
Refer to Figure 4.
2. There are high--energy surge--protective devices, called arresters, installed
on every electrical and electronic conductor that enters the building, so that
surge currents are diverted to earth.
-- Traditionally, a licensed electrician installs a surge arrester at the main
circuit breaker panel.
Refer to Figure 5.
3. There are low--energy surge--protective devices, called suppressors, installed
at each piece of equipment that is either vulnerable to damage or susceptible
to upset.
-- Traditionally, the user installs surge suppressors at every piece of elec-
tronic equipment inside a building.
This kind of patchwork installation often provides incomplete protection, as there are
interactions between these three classes of protective devices.
For example, in some installations the surge suppressor has a lower voltage
protection level than the surge arrester, thereby drawing surge currents inside a
building and creating new problems.
Drawing surge currents inside buildings can create transient magnetic fields inside
the building that can induce surge currents in other loops of wire or cable, and the
surge suppressor may explode when it absorbs a high--energy surge.
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Digital Techniques
Preliminary Module 5 E/M Environment
Notes 5.14 5.14.4 - HO - 4
As another example, lightning current can travel from a down conductor, punch
through a wall, and enter the electrical power wiring inside a building. Also, some
installers of air terminals, down conductors, and ground rods do an ineffective job,
which results in a waste of money for such ’protection’.
Standard methods for determining lightning protection begin with an estimate of the
number of lightning strikes per square kilometre per year at the user’s site.
While this frequency data can be useful in evaluating the economics of lightning
protection, the user must remember that lightning can, and does, cause immense
damage even in regions where lightning is not common.
Therefore, generally the probability of a lightning strike to the user’s building can be
ignored, since it is foreseeable that lightning will strike near the building sometime in
the next few years. Instead, it should be focused on the loss that will be caused by
lightning:
V Consequential damages
-- loss of business income while equipment is inoperative
-- cost of restoring data from back--ups and paper records
-- injuries caused by upset or damage to electronic equipment, e.g., failure
of monitoring equipment in hospital intensive--care ward
V Cost of replacing or repairing damaged equipment
V cost of replacing damaged power and data cables
V cost of replacing damaged structure -- particularly significant if:
-- structure contains flammable or explosive materials, so lightning could
cause catastrophic loss
-- building has a wood--frame and is located far from the nearest fire brig-
ade (e.g., a farm house)
-- building has historic value and can not be replaced.
Protection against lightning can be much less expensive than repair or replacement
of damaged equipment, as well as consequential damages from loss of use of
damaged equipment.
However, merely connecting some surge suppressors inside the building may result
in an improved ability to withstand mild surges, but is generally inadequate protection
and can create significant new problems.
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Digital Techniques
Preliminary Module 5 E/M Environment
Notes 5.14 5.14.4 - HO - 5
Access control units should be equipped with surge protection on all inputs and
outputs. Smart switches, PC’s, printers, and modems are designed for an indoor,
office environment and do not have surge protection.
However, by properly installing aftermarket surge protection devices on all inputs and
outputs, these devices can also be protected from lightning damage.
Surge protectors should be installed at both ends of RS--232 data lines. If this is not
possible, one protector should be installed near the smart switch, modem, printer or
PC.
The protector must be located at least three wire feet away from the device being
protected. The additional wire resistance will dissipate the energy from leading edge
of the spike. The wire can be coiled; a three--foot physical distance is not required.
Self grounding surge protectors (without a ground wire or ground screw) will not work
for this application. RS--232 surge protectors should not be used unless they are
equipped with a separate ground wire or ground screw.
Self--grounding surge protectors use the connector shell or pin 1 as a ground path.
! The shell and pin 1 are not grounded on smart switches and modems.
Cable shields on RS--232 data cables should be connected at one end only.
The cable shield may be terminated to the same ground as the surge protector.
The cable shield should be unconnected at the opposite end.
At the access control unit, the ground screw on the mounting plate should be
connected to a good earth ground, to allow the built--in surge protection to work
properly.
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Digital Techniques
Preliminary Module 5 E/M Environment
Notes 5.14 5.14.4 - HO - 6
C 0067
Airfield Lightning
Figure 1
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Digital Techniques
Preliminary Module 5 E/M Environment
Notes 5.14 5.14.4 - HO - 7
C 0068
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Digital Techniques
Preliminary Module 5 E/M Environment
Notes 5.14 5.14.4 - HO - 8
C 0069
Lightning Rod
Figure 3
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Digital Techniques
Preliminary Module 5 E/M Environment
Notes 5.14 5.14.4 - HO - 9
C 0070
Surge Arrester
Figure 4
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Digital Techniques
Preliminary Module 5 E/M Environment
Notes 5.14 5.14.4 - HO - 10
C 0071
Surge Suppressors
Figure 5
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AC
A Modem T Telephone network
mains
Notes
Reader unit
D
mounting bracket
5.14
A PC D D Smart switch D D A
mains supply mains
5.14.4 - HO - 11
Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.1 - HO - 1
Introduction
ACARS stands for the aircraft communications addressing and reporting system.
ACARS is a digital data link system transmitted via VHF radio which allows airline
flight operations departments to communicate with the various aircraft in their fleet.
This VHF digital transmission system, used by many civilian aircraft and business
jets, can be likened to ’e--mail for airplanes’, as the registration of each aircraft is
it’s unique address in the system developed by aeronautical radio giant ARINC
(Aeronautical Radio, Inc.).
Traffic is routed via ARINC computers to the proper company, relieving some of the
necessity for routine voice communication with the company. With ACARS, such
routine items as departure reports, arrival reports, passenger loads, fuel data, engine
performance data, and much more,can be requested by the company and retrieved
from the aircraft at automatic intervals.
Before the advent of ACARS, flight crews had to use VHF to relay this data to their
operations on the ground.
ACARS uses the AM mode because the same airborne VHF radio is often also used
for voice communications. Burst transmissions are used with a limit of 220 characters
per message. Transmissions often last less than one second.
ACARS System
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.1 - HO - 2
ACARS Transmission
Original Message
Refer to Figure 1.
ACARS mode: 2 Aircraft reg: N186DN
Message label: 80 Block id: 0 Message no: M03A
Flight id: DL0107
Message content:--
3C03 0107/24 EDDF/KJFK
/POS OTR/OVR 1015/NXT MASIT/ETA 1118
/ENS N56000W020000/ALT 310/FOB 0961/SAT 52
/WND 275057/MCH 81/TRB LT CHOP/SKY UNDERCAST/ICE NONE
Encoded Message
The following frequencies (selected examples) are used to transmit VHF ACARS
data to and from the aircraft:
131.550 MHz Primary channel world--wide
130.425 MHz Additional channel for USA
131.725 MHz Primary channel in Europe
131.525 MHz Secondary channel Europe
136.750 MHz New European frequency
131.850 MHz New European frequency
129.125 MHz Additional channel for USA and Canada.
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.1 - HO - 3
ACARS HF Frequencies
Future systems will support a wider variety of communications including GPS and
radar target position reports, air traffic control (ATC) messages, and differential GPS
corrections.
Refer to Figure 2.
In this Figure a few VHF data communications sites are strategically placed in a
country to provide the coverage and redundancy desired.
Refer to Figure 3.
Each data communications site has one or more data link transceivers providing the
physical and channel access protocol layers and the ground station computers
provide the link and networking protocols. These sites are linked to a central hub
which provides system services and links to the end users.
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.1 - HO - 4
This system could easily support any of the data link technologies individually or
simultaneously. This provides a transition capability for ACARS aircraft.
Technical Data
The following technical data given for an ACARS ground station are to bee seen as
examples.
Transmitter
VHF Receiver
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= Aircraft Communications Addressing and Reporting System (ACARS)
Notes
Message content:--
Stand by
5.15.1 - HO - 5
Elo/Digital AC Systems
Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.1 - HO - 6
C 0060
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Notes
Dual redundant
computer system
Preliminary
VHF receiver
Computer
VHF transmitter
Serial link
Serial link
VHF receiver
Computer
VHF transmitter
C 0061
5.15.1 - HO - 7
Elo/Digital AC Systems
Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.2 - HO - 1
Display Units
The ECAM display units are mounted side--by--side. The left unit displays information
on the status of systems, warnings and corrective actions in a sequenced check--list
format. The right unit displays associated information in pictorial or synoptic format.
Display Modes
There are four display modes. The following three are automatically selected:
V ’Flight phase--related’ mode
V ’Advisory (mode and status)’ mode
V ’Failure--related’ mode.
The fourth mode is ’manual’. This mode permits the selection of diagrams related to
any one of 12 of the aircraft’s systems for routine checking. Furthermore, it allows for
selection of status messages, provided no warnings have been ’triggered’ for display.
The selections are made by means of illuminated push--button switches at the
system control panel.
In normal operation the automatic ’flight phase--related’ mode is used. In this case
the displays are chosen according to the current phase of aircraft operation, i.e.
’pre--flight’, ’take--off’, ’climb’, ’cruise’, ’descent’, ’approach’ and ’after landing’.
An example of a pre--flight phase is shown in Figure 2; the left display unit displays
an advisory memo mode. The right unit displays a diagram of the aircraft’s fuselage,
doors and arming of the escape slides deployment system.
The ’failure--related’ mode takes precedence over the other two automatic modes
and the manual mode. The example in Figure 3 shows that (while taxiing for
take--off) the temperature of the brake unit at the rear right wheel of the left main
landing gear has become excessive.
A diagram of the wheel brake system is immediately displayed on the right display
unit. At the same time, the left unit displays the corrective actions to be taken by the
flight crew. Additionally, an aural warning is sounded and a light
(labelled ’L/G WHEEL’) at a central warning light display panel is illuminated.
After the corrective action has been carried out, the instructions on the left display
are replaced by a message in white confirming the result of the action. The diagram
on the right display unit is ’redrawn’ accordingly.
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.2 - HO - 2
Control Panel
The layout of the ECAM control panel is shown in Figure 5. All switches (with the
exception of those for display control) are of the push--button, illuminated caption
type. Their functions are:
V SGU selector switches:
The SGU selector switches control the respective symbol generator units
(SGU). The lights are off in normal operation of the system. The ’FAULT’
caption is illuminated amber if a failure is detected by an SGU’s internal
self--test circuit. When a switch is released the corresponding SGU is
isolated. This causes the ’FAULT’ caption to extinguish and the ’OFF’
caption to illuminate white.
V Synoptic display switches:
The synoptic display switches permit individual selection of synoptic
diagrams corresponding to each of 12 systems. They illuminate white when
pressed. A display is automatically cancelled whenever a warning or advisory
occurs.
V CLR switch:
The CLR (’clear’) switch is illuminated white whenever a warning or status
message is displayed on the left display unit. It is pressed to clear messages.
V STS switch:
The STS (’status’) switch permits manual selection of an aircraft status
message if no warning is displayed. It is illuminated white. Pressing the
switch also causes the CLR switch to illuminate. A status message is
suppressed if a warning occurs or if the CLR switch is pressed.
V RCL switch:
The RCL (’recall’) switch enables previously cleared warning messages to be
recalled, provided that the failure conditions which initiated them still exist.
Pressing the switch also causes the CLR switch light to illuminate. lf a failure
does no longer exist, the message ’NO WARNING PRESENT’ is displayed
on the left display unit.
System Testing
Each flight warning computer (FWC) of the system is equipped with a monitoring
module which automatically checks data acquisition and processing modules,
memories and the internal power supplies as soon as the aircraft’s main power
supply is applied to the system.
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.2 - HO - 3
A power--on test routine is also carried out for correct operation of the symbol
generator units. During this test the display units remain blank. In the event of failure
of the data acquisition and processing modules (or of the warning light display panel)
a ’FAILURE WARNING SYSTEM’ light at the panel is illuminated.
Manual self--test checks for inputs and displays are carried out from a maintenance
panel. When the ’INPUTS’ switch is pressed, a ’TEST’ caption is illuminated white,
and most of the inputs to each computer are checked for continuity. Any incorrect
inputs appear in coded form on the left display unit.
The right display unit presents a list of defective parameters at the system’s data
analogue converter. The diagrams of systems appear on the right display unit with
the caption ’TEST’ beside the system title, as each corresponding push--button
switch is pressed. Calibrated outputs from the data analogue converter are also
displayed. Any defective parameters are identified by a flag display.
The annunciator lights at the maintenance panel illuminate white simultaneously with
a failure warning system light at the central warning light display panel when a
corresponding computer fails. The ’INHIB OVRD’ switch enables inhibited warnings
to be displayed.
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Notes
Left Right
display unit display unit
Preliminary
ECAM
control panel
5.15
System data
analogue converter
5.15.2 - HO - 4
Elo/Digital AC Systems
Notes
MEMO DOOR
ARM ARM
AVIONIC
Preliminary
FE 0708 B
Examples: Doors locked: door symbol(s) green and name of door(s) white
doors unlocked: door symbol(s) and name of door(s) amber
5.15.2 - HO - 5
Elo/Digital AC Systems
Notes
Preliminary
TEMP: c BRAKE
BRAKES 1 2 3 4
SPD BRK
FE 0709
5.15.2 - HO - 6
Elo/Digital AC Systems
Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.2 - HO - 7
a) Display of failure
HYD
YELLOW PUMP LO PRESS . . . OFF
YELLOW SYS LOPR
Autoland
STATUS LAND 3 INOP capability
PROC: SINGLE ENG OPER
Limitations PROC FOR APPR: HYD SYS LO PR
PROC FOR APPR: INCR LDG DIST
Systems/ HYD BLUE SYS INOP
functions GEN 1 INOP
lost
SPLR PARTIYLLY INOP
Information SLATS SLOW
FE 0710
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Notes
OFF OFF
OFF BRT OFF BRT
Message
clearance
switch
5.15
Status
message BLEED COND PRESS FUEL
switch STS
System synoptic
display switches
5.15.2 - HO - 8
Elo/Digital AC Systems
Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.3 - HO - 1
Display Unit
Each display unit consists of the sub--units as shown in Figure 3. The power supply
units provide the required levels of AC and DC power necessary for overall oper-
ation. The supplies are automatically regulated and monitored for undervoltage and
overvoltage conditions.
The video/monitor card contains a video control microprocessor, video amplifiers and
monitoring logic for the display unit.
The main tasks of the processor and the associated ROM (read only memory) and
RAM (random access memory) are to calculate gain factors for the three video
amplifiers (red, blue, green) and to perform input, sensor and display unit monitor
functions.
The input/output interface functions for the processor are provided by analog
multiplexers, an A/D converter and a D/A converter.
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.3 - HO - 2
The function of the convergence card is to take X-- and Y--deflection signals.
Furthermore, the card develops drive signals for the three radial convergence coils
(red, blue and green) and the one lateral convergence coil (blue) of the CRT.
There are voltage compensators monitoring the deflection signals in order to
establish on which part of the CRT screen the beams are located (right or left for the
X--comparator, top or bottom for the Y--comparator).
Signals for the X-- and Y--beam deflections (for stroke and raster scanning) are
provided by the deflection amplifier card. The amplifiers for both beams each consist
of a two--stage pre--amplifier and a power amplifier.
Both amplifiers use two supply inputs:
V 15 V DC
V 28 V DC.
15 V DC is used for effecting most of the stroke scan writing. 28 V DC is used for
re--positioning and raster scanning.
The interconnect card serves as the interface between the connector of a display unit
and the various cards.
Digital line receivers for the signals supplied by the SGs are also located on this card.
In a typical system, six colours are assigned for the display of the many symbols,
failure annunciators, messages and all other information:
V White: display of present situation information
V Green: display of present situation information
where contrast with white symbols is
required, or for data having lower priority
than white symbols
V Magenta: all ’fly to’ information (such as flight director
commands, deviation pointers, active flight
path lines)
V Cyan: sky shading on an EADI and for low--priority
information (such as non--active flight plan,
map data etc.)
V Yellow: ground shading on an EADI, caution
information display (such as failure warning
flags, limit and alert annunciators) and fault
messages
V Red: for display of heaviest precipitation levels
as detected by the weather radar (WXR).
Symbol Generators
Refer to Figure 4.
The symbol generators provide the analogue, discrete and digital signal interfaces
between an aircraft’s system, the display units and the control panel.
They perform symbol generation, system monitoring, power control and the main
control functions of the EFIS overall.
The interfacing between the card modules of an SG is shown in Figure 4.
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.3 - HO - 3
Card Function
I/01 and 2 supply of input data for use by the main processor
Control Panel
Refer to Figure 5.
A control panel is provided for each system. The switches are grouped for the
purpose of controlling the displays of their respective EADI and EHSI units as listed
below.
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.3 - HO - 4
V EHSI section:
-- RANGE: selects range for displayed WXR and
navigation data
-- MODE SELECT: selects display appropriate to required mode
-- BRT: outer knob controls main display brightness;
inner knob controls WXR display
-- WXR: when pushed in, WXR data are displayed
during all modes except PLAN
-- MAP switches: used in MAP mode; when pushed in, the
switches cause their data to be displayed;
illuminates white.
This is a photodiode device which responds to ambient light conditions in the cockpit.
It automatically adjusts the brightness of the CRT displays to a compatible level.
Refer to Figure 6.
The EADI displays pitch and roll attitude indications against a raster--scanned
background. The upper half is in cyan and the lower half in yellow. Attitude data is
provided by an inertial reference system (IRS).
Also displayed are flight director commands, localizer and glide slope deviation,
selected airspeed, ground speed, AFCS and autothrottle system modes, radio
altitude and decision height.
Figure 6 illustrates a situation during an automatically controlled approach to a
landing together with the colours of the symbols and alphanumeric data produced via
the EFIS control panel and SGs.
Refer to Figure 7.
The EHSI presents a selectable, dynamic colour display of flight progress and plan
view orientation. Four principal display modes may be selected on the control panel:
V MAP
V PLAN
V ILS
V VOR.
Figure 7 illustrates the normally--used MAP mode display. In conjunction with the
flight plan data programmed into a flight management computer, this mode displays
information against a moving--map background with all elements positioned to a
common scale.
Refer to Figure 8.
In the PLAN mode, a static map background with active route data is displayed.
The display is oriented to true North. Additionally, track and heading information are
shown.
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.3 - HO - 5
Failure Annunciation
Failure of data signals from such systems as the ILS and the radio altimeter are
displayed on each EADI and EHSI in the form of yellow flags ’painted’ at specific
matrix locations on their CRT screens.
Example: If the associated flight management computer and the weather radar range
disagree with the control panel range data, the discrepancy message ’WXR/MAP
RANGE DISAGREE’ appears on the EHSI.
Refer to Figure 9.
In the type of system described, means are provided by which the pilots can
(independently of each other) connect their respective display units to alternate
sources of input data, e.g. left or right air data computers, flight management
computers, flight control computers and standby inertial reference system.
Each pilot has a panel of selector switches. The upper rotary type of switch connects
either the left, centre or right flight control computer to the EADI as the source of
attitude data. The other switches are of the illuminated push type and are guarded to
prevent accidental switching. In the normal operating configuration of systems they
remain blank. When activated they are illuminated white.
Refer to Figure 3.
In a number of EFIS applications, the display of air data (like altitude, airspeed and
vertical speed) is still provided in the conventional manner, i.e. separate indicators
are mounted adjacent to the EFIS display units in the basic ’T’ arrangement.
With the continued development of display technology, however, CRTs with much
larger screen areas have been produced.
As may be seen from the BOEING 747--400 flight deck layout in Figure 4,
such displays make it unnecessary to provide conventional primary air data
instruments for each pilot.
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.3 - HO - 6
FMSI ALT
300 AP/L
YD
280 10
260
10
240
MACH. 723
DIST 10 GSP
20.0 258
LNR
F O
ML
S I
I N
CRS
020
FE 0688
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Notes
Left Right
control panel control panel
Brightness
control
Preliminary
Data busses
VOR Center IRS TMC VOR ILS TMC VOR Center IRS TMC
DME FCC Left & DME RAD.ALT DME FCC
ILS right WXR Center IRS ILS
RAD.ALT IRS FMCS RAD.ALT Display unit
Left Right FMCS FCC FCC Right Left FMCS
WXR WXR
IRS IRS drive signals
FCC Right FMCS FCC
FE 0689 C
5.15.3 - HO - 7
Elo/Digital AC Systems
115 V/400 Hz LV power HV power
supply supply
Notes
Red
Green
Blue
Beam test Digital line Video CRT
receivers monitor card
Synchronising
5.15
Raster/stroke
Day/night
X--deflection
Analogue line Deflection
receivers amplifier card
Y--deflection
E 0690 c
Convergence
card
5.15.3 - HO - 8
Elo/Digital AC Systems
WXR data
Notes
Transfer bus
Display unit
Main RAM video
WXR memory Raster
2 ⋅ 16 k RAM generator
Raster
control
Main Display MUX control
processor controller
5.15
Display sequencer
panel
IRS
L,C&R FCCs
FE 0691 A
5.15.3 - HO - 9
Elo/Digital AC Systems
Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.3 - HO - 10
ADI
DH SET BRT
RST
40
20 VOR ILS
WXR
10 MAP
ON
PLAN
MAP
NAV AID ARPT RTE DATA WPT
ON ON ON ON
E 0692 B
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Pitch scales Roll pointer Roll scale Sky shading
Notes
Radio altitude
Ground speed
Aircraft symbol
Speed error scale
Autothrottle mode
Autoland status
Pitch armed mode
5.15.3 - HO - 11
Elo/Digital AC Systems
Notes
MAG/TRU
annunciator
Airport
’NORTH--UP’ annunciator
TRU 6.0/190° FMS 2
identifier
NEF
LAF
Displacement
line
5.15
RNG MAY
ETA 1736
DIS 100
ETA
WX
range
E 0694 C
5.15.3 - HO - 12
Elo/Digital AC Systems
Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.3 - HO - 13
ETA
252
TRK M
200 NM 0835.4Z
24
27
Active route
WPT 10
SBY
AGY
WPT 11
WPT 08
North pointer
N
FLY P1
HAR
FE 0695 A
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.3 - HO - 14
ALTN
FMC
ALTN
EFI
ALTN
IRS
AIR ALTN
DATA
E 0696 A
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.3 - HO - 15
FB 7006
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.3 - HO - 16
FE 0697 A
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.4 - HO - 1
An engine indicating and crew alerting system (EICAS) is a system, which was first
introduced in the BOEING 757 and 767 aircraft.
At the time of their introduction, there were differing opinions on how to approach
such operating factors like flight deck layouts and crews’ controlling functions, like the
extent to which normal, alerting and warning information should be displayed, and in
particular, whether engine operating data should be displayed for the whole flight or
only during certain phases.
In respect of EICAS, engine operating data are displayed on the CRT units, thereby
eliminating the need for traditional instruments. These data (as well as those relevant
to other systems) are not necessarily always on display. But in the event of malfunc-
tions at any time, the flight crew’s attention is drawn to them by an automatic display
of messages in the appropriate colours.
Refer to Figure 1.
The computers are designated ’left (L)’ and ’right (R)’. Only one is in control at a time;
the other is in ’standby’. In the event of a failure the standby computer may be
switched to ’active’ either manually or automatically.
The system provides the flight crew with information on primary engine parameters
(full time), with secondary engine parameters and advisory/caution/warning and alert
messages displayed as required.
Display Units
Refer to Figure 2.
The display units provide a wide variety of information relevant to engine operation
and operation of other automated systems. They utilize colour shadow mask CRTs
and associated card modules.
The units are mounted one above the other. The upper unit displays the primary
engine parameters N1 speed (a certain turbine speed), exhaust gas temperature
(EGT) and warning and caution messages. In some cases, this unit can also display
engine pressure ratio (EPR) depending on the type of engine(s) installed and on the
methods of processing data by the thrust management control system.
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.4 - HO - 2
The lower unit displays secondary engine parameters, i.e. N2 speed, fuel flow,
oil quantity, oil pressure, oil temperature and engine vibration. In addition, the status
of non--engine systems, e.g. flight control surface positions, hydraulic system,
auxiliary power unit (APU), etc., can also be displayed together with the aircraft’s
configuration and maintenance data.
The row of ’V’s shown on the upper display unit only appears when secondary
information is being displayed on the lower unit.
There are seven colours being produced by the CRTs. They are used as follows:
V White:
-- all scales
-- normal operating range of pointers
-- digital readouts
V Red:
-- warning messages
-- maximum operating limit marks on scales
-- digital readouts
V Green:
-- thrust mode readout
-- selected EPR/N1 speed marks or target cursors
V Blue:
-- testing of system only
V Yellow:
-- caution and advisory messages
-- caution limit marks on scales
-- digital readouts
V Magenta:
-- during in--flight engine starting
-- for cross--bleed messages
V Cyan:
-- names of all parameters being measured (e.g. N1/N2, oil pressure, TAT,
etc.)
-- status marks or cues.
The displays are selected according to the appropriate display selection mode.
Display Modes
EICAS is designed to categorize the displays and alerts according to their function
and usage. For this purpose there are three modes of displaying information:
V Operational mode
V Status mode
V Maintenance mode.
The operational and the status mode are both selected by the flight crew at the
display select panel, while the maintenance mode is selected at the maintenance
panel by the maintenance personnel only.
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.4 - HO - 3
Operational Mode
This mode displays the engine operating information and any alerts which require
action by the crew in flight. Normally, only the upper display unit presents information.
The lower one remains blank and can be selected to display secondary information
as and when required.
Status Mode
When selected, this mode displays data to determine the dispatch readiness of an
aircraft. The display shows the positions of the flight control surfaces in the form of
pointers referenced against vertical scales, selected sub--system parameters and
equipment status messages on the lower display unit.
Selection is normally done on the ground either as part of the pre--flight checks,
or prior to shut--down of electrical power to aid the flight crew in making entries in the
aircraft’s technical log.
Maintenance Mode
This mode provides maintenance engineers with information in five different display
formats to aid them in trouble--shooting and verification testing of the major sub--sys-
tems. The displays, which are presented on the lower display unit, are not available
in flight.
The display select panel (Figure 3, detail a)) permits control of EICAS functions and
displays. It can be used both in flight and on the ground. It is normally located at the
centre pedestal of an aircraft’s flight deck. Its controls are as follows:
V Engine display switch:
This switch is of the momentary--push type for presenting (or removing) the
display of secondary information on the lower display unit.
V Status display switch:
Also of the momentary--push type; this switch is used to display the status
mode information on the lower display unit (detail b)). The display is known
as the ’status page’.
V Event record switch:
This switch is of the momentary--push type as well. It is used in the air or on
the ground to activate the recording of fault data relevant to the environ-
mental control system, electrical power, hydraulic system, performance and
APU.
Normally, if any malfunction occurs in a system, it is recorded automatically
(called an ’auto event’) and stored in a non--volatile memory of the EICAS
computer. The push switch enables the flight crew to record a suspected
malfunction for storage. This is called a ’manual event’.
The relevant data can only be retrieved from the memory and displayed by
operating switches on the maintenance control panel when the aircraft is on
the ground.
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.4 - HO - 4
Alert Messages
The EICAS continuously monitors a large number of inputs (typically more than 400)
from engine and airframe systems’ sensors and will detect any malfunctioning of
these systems.
Refer to Figure 4.
lf a fault should occur, then appropriate messages are generated and displayed on
the upper display unit in a sequence corresponding to the level of urgency of the
action to be taken. Up to 11 messages can be displayed at the following levels:
V Level A ’warning’:
Warnings require immediate corrective action. They are displayed in red.
Master warning lights are also illuminated, and aural warnings (e.g. fire bell)
are given from a central warning system.
V Level B ’caution’:
Cautions require immediate crew awareness and possible action. They are
displayed in amber and also indicated by message caution lights. An aural
tone is repeated twice.
V Level C ’advisory’:
Advisories require the crew’s awareness. They are also displayed in amber.
No caution lights or aural tones are associated with this level.
The messages appear on the top line at the left of the display screen. In order to
differentiate between a caution and an advisory message, the latter is always
indented one space to the right.
The master warning and caution lights are located adjacent to the display units
together with a ’cancel’ switch and a ’recall’ switch. Pushing the ’cancel’ switch
removes only the caution and advisory messages from the display. The warning
messages can not be cancelled.
The ’recall’ switch is used to bring back the caution and advisory messages into the
display. At the same time, the word ’RECALL’ appears at the bottom of the display.
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.4 - HO - 5
A message is automatically removed from the display when the associated condition
does no longer exist. In this case, messages which appear below the deleted one
move up one line. When a new fault occurs, its associated message is inserted on
the appropriate line of the display. This may cause older messages to move down
one line.
Example: A new caution message will cause all existing caution and advisory messages to
move down one line.
lf there are more messages than can be displayed at the same time, the whole list
forms a so--called ’page’. The lowest message is removed and a page number
appears in white on the lower right side of the list. lf there is an additional page of
messages it can be displayed by pushing the ’cancel’ switch. Warning messages are
carried over from the previous page.
Refer to Figure 5.
lf the lower display unit should fail when secondary information is being displayed on
it, an amber alert message appears at the top left of the upper display unit, and the
information is transferred to it.
The format of this display is referred to as ’compact’. It may be removed by pressing
the ’ENGINE’ switch at the display select panel. Failure of a display unit causes the
function of the panel status switch to be inhibited so that the status page format can
not be displayed.
lf this panel fails, the advisory message ’EICAS CONTROL PANEL’ appears at the
top left of the upper display unit together with the primary information. The secondary
information automatically appears on the lower display unit. The ’cancel/recall’
switches do not operate under this failure condition.
The standby engine indicator provides primary engine information in the event of a
total loss of the EICAS displays. The displayed information relate to N1 and N
speeds and EGT. The displays of the standby engine indicators are of the LCD type.
Operating limit values are also displayed.
The display control switch has two positions: ’ON’ and ’AUTO’. In the ’ON’ position,
the displays are permanently on. In the ’AUTO’ position the internal circuits are
functional, but the displays will only be presented when the EICAS displays are lost
due to failures of both display units or both computers.
This panel is used by the maintenance personnel for displaying maintenance data
which had been stored in the system’s computer memory during flight or ground
operations. The layout of the panel and the principal functions of each of the controls
are shown in Figure 6.
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.4 - HO - 6
The five display select switches are of the momentary--push type. When one of them
is activated, the corresponding maintenance display page appears on the lower
display unit screen.
System failures which have occurred in flight and have been automatically recorded
(’auto event’) in the computer memory (as well as data entered as ’manual event’)
can be retrieved for display by means of the ’event record’ switch at the panel.
A self--test of the whole system (which can only be activated when an aircraft is on
the ground and its parking brake is set) can be performed by means of the ’TEST’
switch at the maintenance control panel. When the switch is momentarily pressed,
a complete test routine of the system is automatically performed.
An initial test pattern is displayed on both display units with a message in white to
indicate that the system is being tested, i.e. ’L (or R) EICAS’ depending on the setting
of the selector switch at the display select panel.
During the test, the master caution and warning lights and the aural devices are
activated, and the standby engine indicator is turned on if its display control switch is
at ’AUTO’.
The message ’TEST IN PROGRESS’ appears at the top left of the display unit
screens and remains in view while testing is in progress. On satisfactory completion
of the test, the message ’TEST OK’ will appear.
lf a computer or display unit failure has occurred, the message ’TEST FAIL’ will
appear followed by messages indicating which of the units has failed.
A test may be terminated by pressing the ’TEST’ switch a second time or (if it is safe
to do so) by releasing the aircraft’s parking brake. The display units revert to their
normal primary and secondary information displays.
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.4 - HO - 7
Discrete
caution & Warnings &
warning Primary
lights cautions engine
displays
Aural
warnings
Stand--by Display
engine switching
indicators
Secondary engine
or
status display
or
maintenance display
Maintenance
control panel
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.4 - HO - 8
TAT+15°
L HYD SYS PRESS 1.83 1.83
L YAW DAMPER 2.0 1.64 2.0 1.64
RUDDER RATIO
EPR
90.3 90.3
N1
690 690
VVVV EGT
Engine oil parameters
50 50
88 88
N2
120 120
86 86
OIL TEMP
20 20 N3
OIL QTY
4.4 4.4
3.1 1.9
vibration
Engine
VIB
FF
FB 4542
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.4 - HO - 9
ENGINE STATUS
L C R
HYD QTY 0.99 1.00 0.98
CABIN ALT AUTO 1
APU EGT 440 RPM 103 ELEV FEEL
RUD
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.4 - HO - 10
L ENGINE FIRE
Warnings
CABIN ALTITUDE
Cautions
L ENG OVHT
AUTOPILOT
Advisories
R YAW DAMPER
L UTIL BUS OFF
FE 0705 A
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.4 - HO - 11
TAT -- 15°°
EICAS DISPLAY 96.1 TO 96.1
85.0 85.0
10 10
2 2
6 6
N1
450 450
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.4 - HO - 12
Environmental control Electrical and hydraulic Performance and Selects data from
systems and maintenance systems format auxiliary power unit auto or manual event
message formats formats in memory
REC ERASE
CONF ENG
MCDP EXCD
TEST
Configuration Engine exeedances BITE test switch Records real--time Erases stored data
and maintenance for self--test data currently currently displayed
control/display routine displayed (in
panel manual event)
ECS/MSG ELEC/HYD
FLT DK FWD AFT FWD EQUIP FAN 1 STBY APU GND
DUCT TEMP 30 28 17 ZONE TEMP BITE VBAT L R /BAT PWR
TRIM VALVE 0.75 0.80 0.00 NOSE A/G DISAGREE LOAD 0.78 0.85 0.00 0.00
LDG GEAR MONITOR
L R PRIM ANTI--SKID AC--V 0 120 125 0 0
PACK OUT 2 3 BRAKE COOLING FREQ 0 402 398 0 0
PRECOOL OUT 193 196 EICAS DISAGREE DC--A 10 140 150 0
DUCT PRESS 40 42 WARN ELEC DC--V 28 28 27 28
PACK FLOW 62 64 FLT REC OFF IDG OUT 145 150
TEMP VALVE 0.75 0.80 CAPT PITOT HEAT IDG RISE 35 47
RAM IN DOOR 0.62 0.71 PAGE 1
RAM OUT DOOR 0.73 0.72
L C R
HYD QTY 0.82 O/FULL 0.72 RF
HYD PRESSS 3230 3210 2140
HYD TEMP 50 47 115
AFT CABIN TEMP AUTO EVENT L GEN DRIVE AUTO EVENT R HYD QTY
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.5 - HO - 1
Introduction
A flight control system consists of the flight control surfaces, the respective cockpit
controls, connecting linkage, and necessary operating mechanisms to control aircraft
in flight.
The fundamentals of aircraft controls have been explained in aeronautics. Discussion
here centres on the underlying mechanisms of the flight controls.
Generally the cockpit controls are arranged like this:
V Control yoke for roll which moves the ailerons
V Control column for pitch which moves the elevators
V Rudder pedals for yaw which moves the rudder.
Some light aircraft use a control stick for both roll and pitch; the rudder pedals for
yaw.
Flight control systems are:
V Mechanical flight control system
V Hydromechanical flight control system
V Fly by wire (FBW) flight control system.
Fly by wire (FBW) is the generally accepted term for flight control systems in which a
computer processes the pilot’s control movements and sends electric signals to the
flight control surface actuators without any mechanical linkage.
While enhancing aircraft performance and flying qualities, today’s fly by wire systems
present their own unique hazards and risks. Aviation safety officers and accident
investigators need to become ’fly by wire literate’ to be effective today.
As aircraft design progressed to high--speed, swept--wing jets, capable of flying over
a broad flight envelope, flight control designers faced new problems. Airplane
handling qualities varied tremendously with speed, fuel burn, or external stores
configuration.
Improved stability and handling precision were needed, and fly by wire technology
provided the solution. To understand how this technology makes modern airplanes
fly, first at the concept of electronic feedback control is introduced.
Refer to Figure 1.
Feedback compensation is essentially error control. It regulates a system by
comparing output signals to input signals. Any error between the two becomes a
command to the flight control surface until output equals input.
A computer measures an aircraft’s motion parameter, conditions the signal, amplifies
it, and sums it up with an input command, forming a closed loop.
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.5 - HO - 2
In a FBW schematic block diagram of this process, the upper line is called the
forward path while the lower loop is called the feedback loop or path. Gain is the
amplification (or attenuation) that is applied to the signal to adjust the aircraft
response as desired.
A filter may be used to block feedback of signals or motion of an undesired fre-
quency. The diagram’s circle, or summer, indicates algebraic summation according to
the arrows and signs.
An advantage of a feedback system is that the flight control system (FCS) can be
used to reduce sensitivity to changes in basic aircraft stability characteristics or
external disturbances. Autopilots, stability augmentation systems (SASs), and control
augmentation systems (CASs) are feedback control systems.
In an SAS, the damper function is formed in the feedback loop and usually has low
gain, or authority, over a control surface. CAS, implemented in the forward path,
is high--authority ’power steering’, providing consistent response over widely varying
flight conditions.
CAS and SAS were used extensively before fly by wire, as in the A--7 and the F--15,
but fly by wire provides more precision and much greater flexibility. Uniform aircraft
response is achieved over a broad flight envelope through CAS gains that are
programmed as functions of airspeed, Mach, centre--of--gravity position, and
configuration.
Control Laws
Modern flight control computers are programmed with control laws that govern the
feedback control system. Control laws are commonly named after the primary
feedback parameter as ’___feedback’ or ’___command’.
For the pitch channel, common feedbacks are
V vertical load factor (Nz or ’g’)
V pitch rate (q)
V pitch angle (q or attitude)
V angle of attack (a or alpha).
Common lateral feedbacks are
V bank angle (f)
V roll rate (p).
Typical directional feedbacks are
V yaw rate (r)
V side--slip angle (b or ’beta feedback’)
V rate of change of side--slip angle (b with a dot over it, or ’beta dot feedback’).
Refer to Figure 2.
G command, desirable at high speeds, means for a particular amount of stick force,
the same ’g’ regardless of airspeed (energy permitting) is got. In a pitch--rate
command system, the same amount of pitch rate for a given stick force regardless of
speed is got.
Pitch--rate feedback and its effects are presented in detail in Figure 2; -- the concepts
apply to any feedback control law.
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.5 - HO - 3
The pilot applies a certain control force, demanding pitch rate, and that becomes the
flight control computer’s command for a particular pitch rate. Because the pilot’s
control input ’demands’ a certain manoeuvre parameter, such an arrangement is
often termed a ’manoeuvre demand’ system. The computer, not the pilot, then moves
the control surfaces as required to meet the pilot’s demand.
To provide immediate response to pilot input, the computer provides a direct path to
the elevator via the proportional line (called the ’feed forward gain’ in the B--777).
For precision over time, an integrator produces a control surface command until the
feedback signal is equal to the pilot’s command signal.
Pure integral control, or too much integrator gain (K), causes excessive lag in the
aircraft response, hence the use of the proportional circuit. This arrangement, called
’proportional plus integral’ control, is found in most fly by wire designs, including the
B--777 and the A320.
In a block diagram, ’1/s’ or ’K/s’ denotes an integrator, the ’K’ indicating some gain
value. FBW engineers must ’tune’ the integrator gain to prevent excessive lag.
If pitch attitude is changed and control pressure at the desired attitude is released,
the system holds that new attitude because the FCS reacts to bring pitch rate to
zero. The airplane should fly nicely with pleasant control forces and precise attitude
control.
Even though positive speed stability was a generally accepted design requirement
for more classical airplanes, the lack of it doesn’t seem to bother Airbus pilots.
However, Boeing opted to retain conventional trim ’feel’ in its B--777 design.
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.5 - HO - 4
C 0062
Motion
Gain/filter
Airplane
Error
Figure 1
+
--
Pilot command
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.5 - HO - 5
C 0063
Motion
Rate gyro
Airplane
Pitch--Rate Feedback
+
--
Feedback
Integrator
Gain/filter
K/S
Figure 2
Error
Proportional
Pitch--rate command
--
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.6 - HO - 1
5.15.6.1 Introduction
Refer to Figure 1.
The flight management system (FMS) provides many functions such as
V remote radio tuning
V establishing a flight plan and flight plan storage
V waypoint selection and storage
V information on navigation aids and earth reference points, such as airports,
intersections, runways and routes.
However, the primary function of the FMS is to provide high accuracy short and long
range, lateral and vertical navigation. To accomplish this function, the FMS computer
must calculate and maintain an accurate position. The FMS is capable of connecting
to a variety of sensors in order to calculate an accurate position.
These sensors include:
V VOR
V DME
V AHRS
V IRS
V VLF/Omega
V GPS.
Each sensor has individual characteristics which allow them to complement each
other. For example, the IRS has very good short--term accuracy in terms of velocity,
but has a long--term drift. This characteristic is complemented by the DME inputs
which are not subject to any drift error.
Refer to Figure 2.
The FMS ’knows’ the characteristics of each sensor and organizes the use of these
sensors in order to determine the aircraft’s current position. This function is named
’blanking’.
The lateral navigation function of the FMS may be considered as an area navigation
(RNAV) system. Its fundamental purpose is to provide navigation information relative
to selected geographic points. Navigation management allows the pilot to define a
route from the present aircraft position to any point in the world.
The FMS provides advisory information and steering commands to allow the pilot
(or the autopilot) to guide the aircraft along the desired route. Routes are defined
from the aircraft’s present position to a destination waypoint via a great circle route
(or a series of great circle legs defined by intermediate waypoints).
In its memory the FMS has two data bases:
V A navigation database that contains data on navigation aids, airports and air-
ways; this database is updated every 28 days via the dataloader
V A custom database used by the pilot to create and store flight plans and way-
points; the custom database is not updated on any regular basis.
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.6 - HO - 2
Refer to Figure 3.
The CDU provides the primary means for the pilot to make inputs into the system.
It also provides output display for the flight management computer.
The CDU utilizes a full alphanumeric keyboard, including decimals, dash and slash.
Line selection keys are provided on each side of the CRT. Function keys are
provided to allow direct access to specific display pages. Annunciators are located at
the top of the unit to advise the pilot of the system status.
To communicate with the flight management and performance computers, the control
display unit (CDU) consists of
V a keyboard
V a CRT display
V the electronics required to drive the CRT display
V a microprocessor
V power supplies
V programmable read only memories (PROM)
V random access memory (RAM)
V input /output buses.
Colour Assignments
The use of colours on the display pages is designed to highlight important informa-
tion. Colour assignments are coordinated as much as possible with the electronic
flight instrument system (EFIS) multifunction display (MFD).
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.6 - HO - 3
Refer to Figure 4.
The flight management system computer (FMC) performs seven main functions:
V The input/output function:
Receives and transmits digital data to and from the various systems on board the
aircraft and checks that all received data are valid.
V The CDU function:
Sends formats, updates and data to the CDU for display and provides alerting
and advisory messages to the CDU for display on the scratch--pad.
V The bite and monitoring function:
Performs a self--test of the FMC during power up and upon request and
continuously monitors the FMS during normal operation. Failures are recorded on
non--volatile memory for retrieval at a later date.
V The navigation function:
Houses the navigation data base and is responsible for computing the aircraft’s
current position, velocity and altitude. It also selects and automatically tunes the
VOR receivers and DME interrogators.
Positional information from the long range sensors used to solve any ambiguity
that may occur or when the aircraft is on the ground. Velocity and altitude are
computed by using long range sensor inputs and the ADC.
V The performance function:
Computes performance parameters (limits) and predictions for the vertical flight
path of the flight profile, utilizing the performance data base and the CDU input
data.
V The guidance function:
Stores the active vertical and lateral flight plan input from the CDU. Using the
present aircraft velocity and position information calculated by the navigation
function, the guidance function compares actual and desired position and
generates steering commands which are input to the appropriate flight control
computer.
Using the current computed vertical profile data from the performance function,
the guidance function compares actual and desired altitude and altitude rate and
generates pitch and thrust commands which are input to the appropriate flight
control computer (FCC) and the thrust management computer (TMC).
V The EFIS function:
Provides dynamic and background data to the EFIS symbol generator and
provides the navigation function with a list of the closest navigation aid array for
auto tuning.
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.6 - HO - 4
The FMS data loader is used to transfer navigation--related data to the FMC.
A typical data loader uses 3.5--inch diskettes and is interfaced with the flight
management computer.
The data loader provides transfer of data derived from the Jeppesen database.
This data includes navigational aids, waypoints, airports, runways, procedures
and jet routes. The data base is updated every 28 days.
V Flight plan loading:
The data loader has also the capability of interfacing with a Lockheed Jet Plan
computer (or equivalent). This gives the pilot the option of loading a flight plan
from a diskette.
V Download fault monitor:
It is used to download the fault history from the non--volatile RAM in the system.
This information are analyzed and used for troubleshooting.
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.6 - HO - 5
FE 2565 A
FMS computer
GPS antenna
Figure 1
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Flight crew
Notes
Controls &
Preliminary
indicators
Data buses
Data-- Control
Discrete inputs Sensing Autothrottle base Fuel quantity & surface
from aircraft systems probes servos loading servos Antennas
fuel flow data
5.15.6 - HO - 6
Elo/Digital AC Systems
Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.6 - HO - 7
CRT
display
Line
select
keys
Scratch--
pad
Alpha--
numeric
keys
FE 2567 A
Mode Function
Keys keys
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Performance Flight management computer EFIS
function function
Sensors, control
Perf. data
Notes
computation Edit
Sensor & contr. panels backgnd EFIS control
ADC, IRS, DME Aircraft profile/ panel
Fuel quantity, fuel weight Flight data Mode, range
VOR, ILS, fuel, flight data Select
clock EICAS, Backgnd/
I Predict navaid dynamic data I
F, F.Q. proc.
Preliminary
n array n
Current/predict
p data Guidance p EFIS symbol
Initialise Performance FLT plan
u function Compute/ u generator
t Current/ database FLT dat t
AFCS mode LEG data format
control panel / predict data Compute current/ data /
o position/ predict o
u IRS init u
velocity errors
t Sensor, control t
p CDU p
u function Control LNAV, u ADI
t Load FLT plan t HSI
VNAV modes
Data CRS, TRK, Altitude velocity winds
d display LEG sequence Compute LAT/ d
a Roll CMD a
format Navigation vert/thrust pitch CMD
t update steering t
CDU a function thr CMD a
CMDS RMIs
Aircraft mode control
p Page Initialise Compute A/C POS/VEL p
r control position Guidance r
o POS, VEL, ACT LEG/ buffer storage o
c wind procedures c EICAS EICAS
Mode Compute A/C
e select e computer display
5.15
FMC velocity
5.15.6 - HO - 8
Elo/Digital AC Systems
Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.7 - HO - 1
5.15.7.1 Introduction
The global positioning system (GPS) is a very modern long--range navigation system.
Its great advantage is that it is very accurate. At the moment, it is the most accurate
long--range navigation system available.
Refer to Figure 1.
The GPS receiver picks up radio signals which are continuously transmitted
from satellites. These satellites orbit the earth at an altitude of 20,000 km.
Refer to Figure 2.
Each satellite orbits the earth once every 12 hours. From any position on the earth,
a GPS receiver can pick up a signal from five different satellites. Even in bad
weather, accurate navigation is available because only three satellite signals are
required for navigation (four satellites for high accuracy).
The GPS works in a way similar to that of DME. The receiver measures the time a
signal takes to travel from the satellite to the receiver. The satellite tells the receiver
its position. The computer inside the GPS receiver calculates the time it took the
signal to get from the satellite to the receiver.
Refer to Figure 3.
The basic principles behind GPS are quite simple, even though the system itself uses
some of the most ’high--tech’ equipment ever developed.
Satellite Ranging
GPS is based on satellite ranging. This means that the position on the earth is found
by measuring the distance from a group of satellites in space. The satellites act as
precise reference points.
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.7 - HO - 2
Refer to Figure 4.
It is assumed that one’s own position is lost. Now the aim is to locate this position.
The distance to satellite A is known, e.g. 11,000 km. This means this particular
position must be somewhere on an imaginary sphere that is centered on the satellite
and that has a radius of 11,000 km.
Refer to Figure 5.
It is also known that the distance from this specific position to another satellite (B) is
12,000 km. So, this position is 11,000 km away from satellite A and, at the same
time, 12,000 km away from satellite B. That means, this position is on the circle
where the spheres of the two satellites overlap.
If now a measurement is made from a third satellite, the position in question can be
located accurately. It is on the overlap between satellites A and B, and at the same
time 13,000 km away from satellite C. There are only two points in space where this
can be true. Those two points are where the 13,000--km sphere cuts the overlap of
A and B.
Refer to Figure 6.
By ranging from three satellites it is possible to accurately locate two positions in
space, where the position under consideration can be.
How is it possible to find out which one of those two positions is the true location?
Either a fourth measurement has to be made from another satellite or otherwise an
assumption can be made.
One of the two points is unlikely to be true. The incorrect point may not be close to
the earth but far away in space. The computers in GPS receivers have various
techniques for distinguishing the correct point from the incorrect one.
If the altitude of the position in question is known, one of the satellite measurements
can be eliminated easily. One of the satellites’ spheres is replaced by a sphere which
is centered in the earth’s center and which has a radius equal to the earth’s radius
plus the actual altitude of the particular position. The correct position must be
somewhere on this earth--centered sphere.
If it is necessary to be absolutely accurate, trigonometry says that actually four
satellite ranges are needed to correctly locate the desired position. But in practice,
it is possible to find the correct position with just three ranges, if the unlikely solution
is rejected.
Therefore, the basic principle behind GPS is using satellites as reference points for
triangulating the required position somewhere on the earth.
Everything else about the system is of a technical nature. These details are designed
to make this ranging process easier and more accurate.
Example: If a car travels at a speed of 60 km per hour (km/h) for 2 hours, how far has it
gone? The result is velocity (60 km/h) multiplied by travel time (2 h) gives the
distance (120 km).
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.7 - HO - 3
The GPS system works by timing how long it takes a radio signal from the satellite
to reach the receiver. Then, the distance is derived from that time.
Radio waves travel at the speed of light: approx. 162,000 nm/s (approx. 300,000 km/s;
exactly 299,792.458 km/s)). So, if it is possible to find out when the GPS satellite started
sending its signal and when it was received, it is known how long it took the signal to
cover the distance. When that time in seconds is multiplied by 300,000 km/s the range
to the satellite is got in km.
The clocks used for timing need to be good, because light moves very fast and the
travel times are very short. If a satellite were right overhead it would only take
approx. six hundredths of a second for the signal to reach the receiver.
This timing accuracy is only possible by very precise electronic clocks. In fact,
most receivers can measure time with nanosecond accuracy, i.e. with an accuracy
of 0.000,000,001 second.
Pseudo--Random Codes
Refer to Figure 7.
The problem of timing is to find the exact time when the signal has left the satellite.
To overcome this problem, the satellites and the receivers are synchronised. This
means, that they generate the same code at exactly the same time. The codes received
from a satellite are compared to the receiver--generated code. The time of reception is
subtracted from the time when the receiver generated this code. The difference is the
travel time of the signal.
Refer to Figure 8.
Both the satellites and the receivers generate a set of digital codes. The codes are
identical to each other so that they can be compared easily. They almost look like a
string of random pulses.
The codes are not really random codes. They form ’pseudo--random’ sequences
that are actually repeated every millisecond, so they are called the ’pseudo--random
code’.
Timing
As mentioned earlier, light travels at a speed of 162,000 nm/s or approx. 300,000 km/s.
If the satellite and the receiver were out of synchronisation by even 1/100th of a second,
the distance measurement could be off by 1,620 nm (approx. 3,000 km). Therefore,
both the receiver and the satellite have to generate their codes at exactly the same time.
For this reason, the satellites have atomic clocks on board which are very precise.
Note: Atomic clocks obtained their name from the use of the oscillations of a particular
atom as their time reference. It is the most stable and most accurate time
reference which has ever been developed.
Timing Errors
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.7 - HO - 4
A receiver’s clock does not contain an atomic clock but a quartz clock. This clock is not
perfectly synchronised with the universal time (Greenwich mean time (GMT)). It may be
slower or faster, and when the time is actually 12:00:00 GMT, a quartz clock may still
show 11:59:59 or even 12:00:01. This may affect the calculation of positions as follows.
Refer to Figure 9.
It is assumed that the actual position is 4 s away from satellite A (4 × 300,000 km =
1,200,000 km) and 6 s away from satellite B. If this specific position were at sea level
(i.e. when operating in two dimensions) those two ranges would be enough to locate
the position. This position can be called ’X’.
So ’X’ is the accurate position when all the clocks are working perfectly.
Refer to Figure 10.
But a receiver, which is 1 s slow, will show the distance to satellite A as being 5 s and
the distance to satellite B as being 7 s. This will cause the two circles to cross at a
different point ’XX’.
This means, that ’XX’ is the position a faulty receiver may show. The result will seem
to be perfectly correct, since it is not known that the receiver is slow. But this result
will be far away from the real position.
To make sure that there is no timing fault, another measurement must be added to
the calculation. This means, that in the two--dimensional example a third satellite is
being ranged.
The offset of 1 s must be added to this measurement as well. The broken lines in
Figure 11 show the ’pseudo--ranges’ caused by the slow clock.
Note: The term ’pseudo--range’ describes ranges that contain errors (usually timing
errors).
While the pseudo--ranges of satellites A and B still cross at ’XX’, that one of C is not
close to that point. So, there is no position that can really be 5 s from A and 7 s from
B and 9 s from C.
The computers in GPS receivers are programed in such a way that, if they get a
series of measurements which do not intersect at a single point, they will realise
something is wrong. They assume that the reason is their internal clock. Either it is
off or it has some offset.
Now, the computer starts subtracting (or adding) the same amount of time from (to)
all measurements. This is done until all ranges of one series hit one point.
Using this example, the computer will detect the error by subtracting one second
from all three measurements. Now, the circles will cross at one point and the
computer assumes that its clock is 1 s slow.
For the solution of this problem, algebraic formulas are used to keep the time
necessary for this procedure as short as possible. Usually, it takes not more than
one or two additional measurements to find out about the clock error of the receiver
and to correct it.
In three dimensions, four measurements are necessary to cancel out any error. This
means that a true, accurate position cannot be obtained unless four satellites are
’in sight’, i.e. above the horizon.
The GPS system consists of 18 active and three spare satellites. So there are always
more than four satellites visible from any position on earth.
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.7 - HO - 5
The need for four measurements affects the design of GPS receivers. If continuous,
real--time position measurements are needed, a receiver with at least four channels
is required in order to receive the signals of four satellites at the same time.
Many applications do not require such a high accuracy. For these, a single--channel
receiver may be enough. A single--channel receiver receives the signals of four
different satellites in sequence, i.e. one signal after the other. The whole operation
may take between 2 s and 30 s, which is fast enough for many applications.
But this type of receiver does not provide good velocity calculations, because any
movement of the receiver during one reception cycle can affect the accuracy of the
measurements.
A popular compromise is a two--channel receiver. One channel carries out the time
measurement calculations while the other establishes a radio lock on the next
satellite to be measured. When the first channel has finished its measurement,
it can instantly switch to the new satellite without wasting any time for locking--on it
or for listening to the system condition message. The other channel then looks
ahead to the next satellite and begins the lock--on procedure for that one. When it
is no longer needed for lock--on, it can be used for time measurement.
This method can greatly speed up the sequencing, and continuous position updates
are always available. A two--channel receiver can be preprogramed to track more
than four satellites. When one satellite is blocked (or hidden), another one can
be instantly ranged without any interruption of the navigation process.
Satellites are continuously orbiting the earth and it is necessary to know the position
of each at any given moment.
The satellites orbit the earth at an altitude of approx. 11,000 nm (20,200 km). Here,
they are well clear of the earth’s atmosphere. They orbit the earth on known paths
like the moon.
The satellites are placed in a very precise orbit according to the GPS master plan.
Because there is no atmospheric drag at altitudes of 20,200 km, the satellites keep
their orbits exactly.
The orbits are known in advance. Most GPS receivers have these orbits stored in
their memory, which tells them where in the sky each satellite will be at any given
moment.
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.7 - HO - 6
Monitoring Satellites
Since the satellites orbit the earth once every twelve hours, they pass over one of the
monitoring stations twice a day. This lets the monitoring stations precisely measure
their altitudes, positions, clocks and speeds.
Each satellite transmits this information at two frequencies (L1 = 1575.42 MHz
and L2 = 1227.6 MHz). The variations from the ’perfect’ (i.e. preplanned) orbit are
usually very small.
Once a satellite’s position has been measured and the variations detected, this
information is processed by the master control station and transmitted to the satellite
via ground antennas.
Ground antennas are the S--band facilities that provide duplex communication with
the satellites by receiving telemetry and transmitting both commands and upload
data. The satellite broadcasts the corrections along with its timing information.
This message, with the exact orbital location and the system status, is called
’system condition message’ (or: ’data message’).
Most GPS receivers use this information, along with the information in their internal
memory, to precisely establish the position of the satellite.
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.7 - HO - 7
Space segment
Downlink
Uplink
Time/
position
Control segment
User segment
B 2253 B
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.7 - HO - 8
7
2
18
10
4
15 5
12
19
21 13
16
20
14
17 3 9
8 1
11
S 0163
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Digital Techniques
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Notes 5.15 5.15.7 - HO - 9
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.7 - HO - 10
E 0503 A
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.7 - HO - 11
A B
FE 0504 A
2 measurements provide
this ‘circle of position’
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.7 - HO - 12
3 measurements provide
2 possible ‘points of position’
A B
FE 0505 A
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.7 - HO - 13
Transmitter (satellite)
X X X X X X X X X X
X X X X X X X
Receiver
E 0507 A
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.7 - HO - 14
Receiver
Time difference
E 0506
Transmitter (satellite)
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.7 - HO - 15
4s X
6s
FE 0508
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.7 - HO - 16
5s
(wrong time)
X
4s 7s
(wrong 6s
time)
XX FE 0509
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.7 - HO - 17
5s
(wrong time) X
7s
XX (wrong time)
9s FE 0510
(wrong time)
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.7 - HO - 18
E 0511 A
Ground antenna
uplink/downlink
station
L1 and L2
downlink
Monitor station
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.7 - HO - 19
E 0512 B
Kwajalein
Monitoring station
Ascencion
Legend:
Hawaii
Equator
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.8 - HO - 1
5.15.8.1 Introduction
To understand the modern inertial reference system (IRS) it is required to start with
the explanation of the INS (inertial navigation system) which is the forerunner of the
IRS and is still used in some types of aircraft.
The INS is a long range NAV system that does not rely on the reception of radio
waves. The key to the operation of INS is the very accurate measurement of the
acceleration forces.
Theory of Operation
Refer to Figure 1.
The INS is the only self--contained single source of all navigation data within the
aircraft.
After being supplied with initial position information, it can continuously update
extremely accurate displays with:
V position
V ground speed
V attitude
V heading.
It also provides guidance or steering information for the autopilot and flight instru-
ments.
Refer to Figure 2.
The basic measuring instrument of the INS is the accelerometer. There are two
accelerometers fitted in the system. One measures the aircraft’s acceleration in the
north/south direction. The other measures the aircraft’s acceleration in the east/west
direction.
Basically, the accelerometer is a swinging device. When the aircraft accelerates, the
pendulum (due to inertia) swings off its null position. A signal pick--off device tells
how far the pendulum is off the null position.
The signal from the pick--off device is sent to an amplifier, and current from the
amplifier is sent back into the accelerometer to the torque motor. The torque motor
restores the pendulum back to its null position.
As long as the aircraft flies in one direction only, one accelerometer is enough to
determine the distance travelled from the starting position. Since the aircraft may
move in any direction, three accelerometers are required to sense the acceleration
90° apart.
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.8 - HO - 2
Platform Levelling
Refer to Figure 3.
The inner element of the platform (where the accelerometers are fitted) also carries
the gyroscopes and is used to stabilise the platform. The gyros supply signals to the
motors which control the gimbals of the platform.
5.15.8.2 Gyrocompassing
The platform is kept horizontal to the earth’s surface. Within the inertial reference
system there is a navigation computer which receives an input of latitude and
longitude from the pilot, after the system is turned on. This input tells the navigation
computer its present position. It is the starting point from which the INS can navigate.
Before navigation can start from an actual position there must be a reference to true
or magnetic north. This is called ’platform north alignment’ or ’gyrocompassing’. The
most common method of platform north alignment is called the ’wander azimuth
system’.
System Operation
Refer to Figure 4.
The basic fundamentals of a wander azimuth system are identical to a basic north
pointing system, except that during gyrocompassing the platform is allowed to take
an angle with respect to true north, that is the initial wander (or: alpha) angle.
The gyro platform is levelled. Firstly it is assumed that the alpha angle is zero, so all
the earth rate compensation is sent to the X--gyro (Figure 4, detail a)).
Because the initial assumption is not correct, the platform will tilt as the earth rotates
(detail b)).
This tilt condition is detected by the accelerometers. Now the gyro torquing signal will
be split between the two gyros, to compensate for the earth’s rate of rotation. Instead
of continuing to send all the earth rate compensation to the X--gyro and pointing the
platform to north to satisfy that condition, some earth rate compensation is sent to
the Y--gyro.
When the correct combination of earth rate compensation to the gyros is given for
the particular wander angle, then the platform will remain levelled as the earth rotates
(detail c)). The ratio of earth rate compensation sent to the gyros is then used to
compute the initial wander (or alpha) angle.
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.8 - HO - 3
Accelerometer
Refer to Figure 5.
Operation of a wander azimuth system is the same as a basic north pointing system,
except that the wander angle is taken into account in all computer calculations.
The accelerometers do not point along north/south and east/west directions but are
offset by the wander angle. However, the computer knows the wander angle and can
easily work out north/south and east/west accelerations, using the sensed acceler-
ation and the computed wander angle.
Figure 6 shows the block diagram of an inertial navigation system. The main
components are:
V mode selector unit
V control display unit
V inertial reference unit.
This system is used both in military and civil aircraft. It has the advantage that is can
store way points (WPTS) and a flight plan to let the aircraft fly from the departure point
to its destination by using only INS as the navigation source. The INS can also control
the automatic flight control system.
Refer to Figure 7.
Refer to Figure 8.
The control display unit (CDU) is used by the pilot to input present position and way
points into the navigation computer. On the numerical displays, data are displayed
which come from the navigation computer.
The display selector switch controls what information is displayed on the numerical
displays.
The data keyboard is used to enter or modify present position or way point informa-
tion.
Figure 9 shows an inertial reference unit (IRU) with its main components:
V stable platform (gimbal assembly)
V computer
V power supply assembly.
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Digital Techniques
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Notes 5.15 5.15.8 - HO - 4
Theory of Operation
The disadvantage of the gimbal assembly in the INS is that it has many moving parts.
As these parts become older, they create errors in navigation accuracy.
The cost of servicing and maintenance of the gimbal assembly is high and the skill
level required to service the gimbal assembly is also high.
To improve reliability and to reduce maintenance costs the ’strapdown IRS’ has been
developed. With improvements in gyro technology and in navigation computer
software, the gimbal has been replaced.
The gyros and accelerometers are ’fixed’ or ’strapped’ to the airframe inside the IRS.
They still sense pitch, roll and yaw, and the accelerometers are still able to sense the
aircraft accelerations.
But the job of the gimbal has been replaced by a computer program.
The IRS performs the same basic navigational functions as an INS but as its fully
digital computer can also be pre--programmed with other relevant reference data
there was the necessity in changing its name.
A modern IRS does not use conventional spinning gyroscopes and does not need a
gyro stabilized platform.
The three accelerometers measure acceleration forces along the aircraft’s three
axes:
V vertical
V lateral
V longitudinal.
Each ring laser gyro is a device with no moving parts that replaces a conventional
gyro with a spinning wheel.
The ring laser gyro uses a triangular housing and two different laser beams. A
computer processes the signals from the three accelerometers and the three laser
gyro sensors to determine:
V aircraft heading
V position
V groundspeed.
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Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.8 - HO - 5
Strapdown System
This modern IRU is referred to as a strapdown system because it does not need a
gyro stabilized platform like that shown in Figure 3.
The IRS can be programmed with complete routes of flight and can be coupled to the
aircraft autopilot to provide steering commands.
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Notes 5.15 5.15.8 - HO - 6
DIS/TIME
POS
WPT 0
Wind direction
and speed
b) Off track
TIME GS
True north
WPT 1
DSR TK TKE
DA
HDG
TK
DIS
XTK
WPT 0 POS
Wind direction
and speed
E 1506
E ITS International Training & Support GmbH. All rights reserved. For training purposes only -- Rev. 01/09
Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.8 - HO - 7
Torquer
North
acceleration
Amplifier
E 1485 A
Signal
pick--off
Force
Null
E ITS International Training & Support GmbH. All rights reserved. For training purposes only -- Rev. 01/09
Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.8 - HO - 8
Gyroscope
Platform
Aircraft
FE 1489 A
E ITS International Training & Support GmbH. All rights reserved. For training purposes only -- Rev. 01/09
Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.8 - HO - 9
a) Platform levelled
Platform levelled,
all earth rate
compensation
sent to X--gyro
=
= =
Y
Earth rate
compensation Y X
Y
X
X
a
a a
Y
Y X
Y
X Earth rate
compensation
X
a
a a
Y
Y Earth rate X
Y
X compensation
X
E ITS International Training & Support GmbH. All rights reserved. For training purposes only -- Rev. 01/09
Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.8 - HO - 10
Computed
north acceleration
=
Sensed acceleration
Computed
east
acceleration
=
Sensed
acceleration
FE 1501
E ITS International Training & Support GmbH. All rights reserved. For training purposes only -- Rev. 01/09
Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.8 - HO - 11
MSU
ON/OFF/Mode selection
Pitch/roll
To ADI
Aircraft power TRUE HDG
To HSI
MAG HDG
INU To HSI
Backup battery NAV HDG
To AFCS
Steering
To HSI
commands
LAT/LONG
Input by pilot
CDU Way points
E ITS International Training & Support GmbH. All rights reserved. For training purposes only -- Rev. 01/09
Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.8 - HO - 12
Ready navigation
light
ALIGN
STBY NAV
READY
NAV
OFF ATT
REF
BATT
FE 1503 A
Mode Battery
selector light
switch
E ITS International Training & Support GmbH. All rights reserved. For training purposes only -- Rev. 01/09
Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.8 - HO - 13
Left Right
numerical DIM ALERT numerical
display control light display
BATT
light
FROM/TO
way point
display
ALERT BATT WARN
WPT
selector W D
WARN
switch P 0 I
N
T TK M 1 2 3 light
CHG
TK CHG
push--button MAN
AUTO RTM
INSERT
W4 5 6E Data
keyboard
AUTO/MAN/ WPT
RTM switch POS DIS/TIME L7 8 9R
XTK/TKE WIND S
INSERT HDG DSR TK
push--button DA STS 0
FE 1504 D
TK HOLD CLEAR
GS TEST DTK
Display HOLD
selector push--button
switch
E ITS International Training & Support GmbH. All rights reserved. For training purposes only -- Rev. 01/09
Computer
Servo--amplifier
Power assembly
Notes
supply
assembly
Preliminary
Digital--to--synchro Stable
electronics platform
Analogue--to--digital
converter
Frequency
Analogue--to--digital control
multiplexer assembly
5.15
Monitor
assembly
Mode
assembly
Analogue test
connector
Temperature
control Cooling air Elapsed-- System
E 1505 B
5.15.8 - HO - 14
Elo/Digital AC Systems
Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.8 - HO - 15
C 0139
Anode
Light beam
Light beam
Piezoelectric
dither motor
Readout detector
Corner prism
E ITS International Training & Support GmbH. All rights reserved. For training purposes only -- Rev. 01/09
Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.9 - HO - 1
Introduction
Refer to Figure 1.
A traffic alert and collision avoidance system (TCAS) is used to reduce mid--air
collisions and so--called ’near miss’ incidents between aircraft. TCAS helps to
prevent disaster by presenting a display of surrounding aircraft and, when necessary,
providing audible warnings and manoeuvre instructions to help pilots to avoid danger
with a gentle manoeuvre.
Both systems provide a map--like display of the surrounding traffic. Both provide a
’traffic advisory (TA)’ whenever other aircraft come close. During a TA, a synthesized
voice announces ’TRAFFIC TRAFFIC’, and the symbol for the other aircraft changes
shape and colour.
TCAS II, the more sophisticated TCAS, has an additional function called a ’resolution
advisory (RA)’. During an RA, the TCAS will command a manoeuvre such as ’CLIMB
CLIMB’, or ’DESCEND DESCEND’, or may tell the pilot not to manoeuvre.
Note: The European organization for the safety of air navigation (EUROCONTROL),
which recommends aviation regulations for European nations, has suggested
requiring a system identical to the latest TCAS II system. In Europe, the system
will be called the airborne collision avoidance system (ACAS II).
Function
If the other aircraft has a transponder that provides altitude data, the TCAS displays
the relative altitude of the other aircraft and shows whether it is climbing or descend-
ing.
Refer to Figure 2.
Example: If an aircraft is 200 feet above and another is 1,400 feet below own aircraft, ’+02’
appears at the higher aircraft’s symbol and ’--14’ at the lower aircraft’s one. If the
aircraft is climbing at a rate of more than 500 feet per minute, an arrow pointing
upwards appears beside its symbol. If descending, the arrow points downwards.
E ITS International Training & Support GmbH. All rights reserved. For training purposes only -- Rev. 01/09
Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.9 - HO - 2
! A TCAS is not a radar and cannot detect an aircraft without a compatible transpon-
der. Some transponders are incompatible with TCAS and will not be detected.
Regulations limit the TCAS power to reduce radio interference. This effectively limits
the TCAS range to approximately 45 nm forward and significantly less to the sides
and the rear. In some systems, the flight crew may select shorter display ranges to
provide greater detail and less clutter while in heavy traffic.
Although TCAS can track up to 45 aircraft, it can display a maximum of 30, selecting
the highest--priority targets for display.
If both aircraft continue on a conflicting course after the TA, the system announces a
resolution advisory (only TCAS II) approximately 35 s before the closest point of
approach is reached. During an RA, the other aircraft’s symbol changes to a solid red
square block and the voice announces a manoeuvre, e.g. ’CLIMB CLIMB’.
The system also displays a green band on the vertical speed indicator to show the
desired rate for the manoeuvre. These suggested manoeuvres are gentle and
normally not noticed by passengers.
Note: TCAS regulations allow commands for vertical manoeuvres only, not for turning
manoeuvres.
The TCAS system includes a TCAS processor, one or two directional antenna(e),
a transponder and a cockpit display (separate indicator or integrated in the electronic
display system). Following information are provided by the transponder:
V Mode A transponder:
sends identification code without altitude
V Mode C transponder:
sends identification code and encoded altitude
V Mode S transponder (TCAS II only):
sends identification code, encoded altitude and other datafields including
aircraft discrete address.
Figure 3 shows a radio management unit (RMU) which includes the control panel for
transponder/TCAS operation.
E ITS International Training & Support GmbH. All rights reserved. For training purposes only -- Rev. 01/09
Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.9 - HO - 3
FE 2561 A
Transponder
TCAS indicator
Figure 1
Bottom antenna
E ITS International Training & Support GmbH. All rights reserved. For training purposes only -- Rev. 01/09
Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.9 - HO - 4
RNG 5
+02 --14
+02 --14
+02 --14
+02 --14
Symbol Legend
Own aircraft
E ITS International Training & Support GmbH. All rights reserved. For training purposes only -- Rev. 01/09
Digital Techniques
Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15.9 - HO - 5
COM 1 NB NAV1
123.20 110.25
131.27 109.35
MEMORY--3 MEMORY--1
ATC/TCAS ADF1
1471 162.5
1 ATC ON ANT
TCAS DSPY 1 MLS1 ERR
TUNE
SQ DIM 1/2 STO
E ITS International Training & Support GmbH. All rights reserved. For training purposes only -- Rev. 01/09