C ALCULATING THE VOLTAGE GAIN AND OUTPUT IMPEDANCE OF

JFET AMPLIFIER STAGES

October 27, 2012

J.L.
 1

This example shows how to evaluate the small-signal voltage gain and the
output impedance of a junction field-effect transistor (JFET) amplifier stage.
The output impedance will be evaluated using the results of Thévenin and
Norton theorems. According to these theorems, the output impedance of
any circuit stage is obtained as the quotient of open circuit voltage and short
circuit current. The following analysis demonstrates how to apply both nodal
and mesh analysis methods to JFET circuits.

The analysed circuit contains the JFET in a common-source configuration as

shown in Figure 1. The analysis of other JFET amplifier configurations follow
the same procedure as for the common-source amplifier.
VDD

RD
Vout

Vin RS

Figure 1: JFET amplifier in a common-source configuration

When considering input signals of small amplitudes, the JFET device can
be modelled as a linear voltage-controlled source. Both voltage-controlled
voltage source (VCVS) and voltage-controlled current source (VCCS) are
suitable models for the JFET device, because the controlled source can be
transformed accordingly using the Thévenin and Norton theorems of circuit
analysis. Figure 2 indicates the VCVS and VCCS small-signal models for a
general JFET device. These models are applicable only for audio frequen-
cies, since the semiconductor pn-junction capacitances have been neglected
to simplify the following analysis. The linear small-signal gain of the JFET
is modelled by the amplification factor µ = gm rd , where gm is the internal
transconductance and rd the internal drain junction resistance.

The nodal method of analysis is first used for calculating the voltage gain
transfer function of the common-source amplifier stage. The rules of the
nodal analysis method require that all alternating (signal) sources in the cir-
2

D D
+ +
rd
G vds G gm vgs rd vds
+ +
vgs µvgs vgs
− S − − S −
(a) a voltage source model (b) a current source model

Figure 2: Controlled source models for a JFET device

cuit are represented as current sources. This requirement can usually be

filled by applying the source transformations defined by the Norton and
Thévenin theorems. Additionally, all the static DC sources are considered
to behave as a ground node from the viewpoint of alternating signals. This is
why all the wires originally connected to DC sources are reconnected to the
ground node in the small-signal equivalent circuit.

gm vgs
1 2 3 (Vout )
vgs
+ −

Vin rd
RX RS RD
RX

Figure 3: Voltage node model of the common-source amplifier

Figure 3 illustrates the equivalent circuit of the common-source amplifier of

Figure 1, which is modified according to the rules of nodal analysis. Com-
pared to the circuit shown in Figure 1, this small-signal model contains an
additional resistor RX . This resistor depicts the internal resistance of the
signal source Vin , which is required to transform the voltage source to a cur-
rent source. However, due to the infinite input resistance of the JFET, this
additional source resistance will not affect the final results at all. The volt-
age nodes of the equivalent circuit 3 are indexed with numbers 1, 2 and 3.
The node 3 together with the ground node are the output terminals of the
circuit. According to the rules of nodal analysis, the small-signal model of
the common-source amplifier is represented mathematically by the matrix
equation
 3

 1 
Vin
   
0 0
 RX  V 1   R
X 
     
 1 1 1    
    
 0 +  × V2  =  gm vgs .

−
 R S rd rd     
    
1 1 1
  
0 − + V 3 −gm vgs
rd rd R D

This matrix equation can be simplified by noting that the control voltage
vgs can be expressed as the difference of node voltages V1 and V2 , namely
vgs = V1 − V2 . Based on this observation, the transconductance terms can be
moved from the output current vector to the admittance matrix side. This
little trick will make the symbolic evaluation of the circuit much simpler. It
should be noted that also in matrix equations when terms are moved to the
other side of the equal sign the term changes its sign from positive to negative
or vice versa. After transferring the transconductance terms from the current
vector to the admittance matrix, the final form of the matrix equation is

 1 
Vin
   
0 0
 RX  V 1   R 
     X
 µ 1 µ+1 1      
+ V  =  0 .

− − × 2
 rd RS rd rd     
     
µ+1 1 1 
 µ    
− + V3 0
rd rd rd R D

The output voltage can be solved systematically using Cramer’s rule. An

application of this rule yields a determinant division

 1 Vin 
 
 0 
 RX RX 
 
 µ 1 µ+1 
+ 0 
 
−
 rd RS rd 
 
 µ µ+1 
0 
 
−
rd rd

V3 = Vout = ,
 1
 
0 0

 
 RX 
 
 µ 1 µ+1 1 
+

− −
 rd RS rd rd 

 
 µ µ+1 1 1 
+

−
rd rd rd R D
 
4

which can be evaluated in symbolic form by applying the basic steps of solv-
ing a determinant in the numerator and the denominator. The solution of
the determinant quotient for the node voltage V3 is
−Vin µRD
V3 = Vout = .
RD + rd + (µ + 1)RS
Form here one can obtain the transfer function
Vout −µRD
= .
Vin RD + rd + (µ + 1)RS
This result along with the short circuit current expression is later used for
evaluating the formula for the output impedance of the common-source
stage.

The analysis of the mesh currents requires its own small-signal equivalent
circuit, which is obtained with slight modifications from the nodal analysis
model. Basically all that is needed to reach the mesh-specific small-signal cir-
cuit is to transform the current sources to voltage sources. In many cases this
approach is more convenient since the nodal analysis often forces to intro-
duce the source resistance RX from nowhere to be able to make the necessary
signal source transforms. Figure 4 illustrates the redrawn common-source
circuit suitable for mesh analysis.
µvgs
rd
1 2 Vout
vgs
+ −
RX
RS I2 RD I3
Vin

Figure 4: Mesh current model of the common-source amplifier

Since the first current loop is open-circuited, the output short circuit current
is evaluated from the matrix equation

     
RS + rd + RD −RD I2 −µvgs
× = .
     

−RD RD I3 0

The voltage vgs in this matrix equation can be expressed using the mesh
currents as vgs = Vin − (−I2 RS ), and therefore the matrix is reshaped to
 5

     
(µ + 1)RS + rd + RD −RD I2 −µVin
× = .
     

−RD RD I3 0

The use of Cramer’s rule to solve the output short circuit current I3 leads to
a solution

−µVin
I3 = .
rd + (µ + 1)RS

V3
Finally, the output impedance is evaluated as the quotient of , which
I3
equals

V3 RD [rd + (µ + 1)RS ]
Zout = = .
I3 RD + rd + (µ + 1)RS

The small-signal model of an electron tube is very similar to the JFET model.
Therefore, the equations derived for the JFET are equally applicable for the
tube as well. One can just replace the drain resistor RD with the plate resistor
RP , the internal drain resistance rd with the internal plate resistance rp , the
source resistor RS with the cathode resistor RK , and the tube model is ready
to be used.