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    Circuit Design

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    justinepunzalan25
    Circuit Design for Bandgap Voltage Reference

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    Circuit Design

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    justinepunzalan25
    87 views7 pages
    Circuit Design for Bandgap Voltage Reference

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    Circuit Design for Bandgap Voltage Reference

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    © All Rights Reserved
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    Download as docx, pdf, or txt
    87 views7 pages

    Circuit Design

    Uploaded by

    justinepunzalan25
    Circuit Design for Bandgap Voltage Reference

    Copyright:

    © All Rights Reserved
    Download as DOCX, PDF, TXT or read online from Scribd
    Download as docx, pdf, or txt
    of 7

    Circuit Design and Analysis

    One of the most widely used voltage reference for integrated circuits is a
    Bandgap Voltage Reference (BVR). It produces a fixed voltage reference which is
    independent from temperature. A simple topology for implementation of BVR is
    shown on Figure 2.1. It utilizes an Operational Transcoductance Amplifier, PMOS and
    PNP transistors as well as resistors. Each component has its role to fully satisfy a
    temperature independent voltage reference.

    Figure 2.1 BVR Topology with OTA


    For a successful design of BVR, three main parameters are of great concern.
    These are currents Proportional To Absolute Temperature(I PTAT), ICTAT (Complementary
    To Absolute Temperature) and IZTAT(Zero To Absolute Temperature). IPTAT is the current
    which is dependent on the common mode input of OTA. Thus, keeping the common
    mode voltage constant also means less variation of I PTAT in terms of parameter analysis.
    Also, this is the current from Emitter of the PNP transistor. On the other hand, I CTAT is a
    variable dependent to R2. From Kirchhoff Analysis, current is inversely proportional to
    resistance. Lastly, sum of IPTAT and ICTAT will result to IZTAT which dictates the drain current of
    the MOS current mirror. This also includes value R3 as voltage reference output.

    Figure 2.2 shows how the group modeled the PNP Transistor. The group implemented
    the design with an OTA having a common mode signal of 500mV. This value is used as the
    voltage source for characterizing the PNP Transistor which gives the I PTAT. Since the model BJT
    is fixed for the whole design, a constant I PTAT can be obtained by keeping the common mode
    signal constant(Vout).
    Figure 2.2 IPTAT Characterization

    Since IPTAT is already determined, R1 can be defined by Equation 2.1. For a ratio of 8:1
    PNP, Vy node voltage is observed by Figure 2.3. This voltage drop is needed to determine
    value of R1 for 8 paralleled PNP.

    Equation 2.1 Equation for R1

    V x V y
    R 1=
    I PTAT
    Figure 2.3 Modelling R1

    After finding the needed parameters for PNP and resistors, the group then
    implemented the design using an ideal current source as shown in Figure 2.4. This supply
    will determine the behavior of OTA when operating in an ideal current condition. On the
    other hand, current source will be transformed to PMOS transistor. This characterization is
    portrayed in Figure 2.5 to complete the BVR. All the MOS transistors are current mirrors.
    Thus, all of which has the same aspect ratios and sizes.
    Figure 2.4 OTAs Output with Ideal Current Source

    Figure 2.5 BVR without Startup Circuit

    Design of Startup Circuit


    There are initial conditions needed to satisfy the operating condition of BVR.
    At time 0, there is a need for another circuitry to drive the device. Figure 2.6 shows
    an inverter with output connected to an NMOS Transistor. When Vref logic level is 0,
    the inverter will output logic 1 and will continue to supply the BVR. Yet, when Vref
    logic level is 1, NMOS will no longer conduct and will remain idle after driving BVR. All
    MOS transistors for this device is set to be at specific aspect ratio as per described in
    designing an inverter. PMOS is set to be at 1/40 while NMOS at 10/.6. However,
    adjustments are made based on the output waveform. Figure 2.7 shows the complete
    BVR with Startup Circuit.

    Figure 2.6 Inverter used as Startup Circuit

    Figure 2.7 Complete Schematic of BVR with Startup


    Bandgap Voltage Reference Layout

    From schematic design of the study, the group made a basic layout of the design.
    Figure 2.8 shows the OTA Layout of the study. Total size of the layout is 550.5 x 275.5.

    Figure 2.8 OTA Layout

    On the other hand, the complete layout of BVR is shown on Figure 2.9. In this case,
    total area is 6957.5x4078.5. The large area is due to large value of resistors.
    Figure 2.9 BVR Layout

    Small part of the layout of BVR are the BJTs used including the MOS Transistors. Figure
    2.9 shows its layout.

    Figure 2.10 BJT and MOS including Resistors Layout

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