Understanding Design Capacity in Hardware Emulators
Understanding Design Capacity in Hardware Emulators
Understanding Design Capacity in Hardware Emulators
Verification Consultant Lauro Rizzatti explains that the three different types of hardware
emulator offer different design capacities, thereby giving users more options.
Description Language
SystemVerilog, SystemC,
Electronic Sysytem Level
C++
Register Transfer Level
SystemVerilog, Verilog, VHDL
Gate Level
Verilog Netlist, EDIF Netlist
Transistor Level
SPICE Netlist
ProcessorCustom
Standard
based
FPGA-based FPGA-based
72MG
256MG
300MG
2.3BG w/
32 boxes
2BG w/
8 boxes
3BG w/
10 boxes
70MG/
hour
35MG/hour
5MG/hour