GM76C256C Series

32Kx8bit CMOS SRAM

Document Title
32K x8 bit 5.0V Low Power CMOS slow SRAM

Revision History
Revision No 00 History Revision History Insert Revised - Datasheet format change - PDIP package type insert - Pin configuration change Revised - tWP Value Change @55ns : 45ns -> 40ns Marking Information Add Revised - AC Test Condition Add : 5pF Test Load - tCLZ Value Change : 5ns - > 10ns Changed Logo - HYUNDAI -> hynix Draft Date Jul.07.2000 Remark Final

01 02

Nov.28.2000 Dec.04.2000

Final Final

03

Apr.30.2001

Final

This document is a general product description and is subject to change without notice. Hynix responsibility for use of circuits described. No patent licenses are implied. Rev 03 / Apr. 2001

Electronics does not

assume any

Hynix Semiconductor

GM76C256C Series

DESCRIPTION
The GM76C256C is a high-speed, low power and 32,786 X 8-bits CMOS Static Random Access Memory fabricated using Hynix's high performance CMOS process technology. It is suitable for use in low voltage operation and battery back-up application. This device has a data retention mode that guarantees data to remain valid at the minimum power supply voltage of 2.0 volt.

FEATURES
Fully static operation and Tri-state output TTL compatible inputs and outputs Low power consumption Battery backup(L/LL-part) - 2.0V(min.) data retention Standard pin configuration - 28 pin 600mil PDIP - 28 pin 330mil SOP - 28 pin 8x13.4 mm TSOP-I (Standard) Standby Current(uA) L LL 40 20 60 30 Temperature (C) 0~70(Normal) -25~85(Extended)

Product Voltage Speed No. (V) (ns) GM76C256C 5.0 55/70/85 GM76C256CE 5.0 55/70/85 Note 1. Current value is max.

Operation Current(mA) 10 10

PIN CONNECTION
A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O1 I/O2 I/O3 Vss 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 Vcc /WE A13 A8 A9 A11 /OE A10 /CS I/O8 I/O7 I/O6 I/O5 I/O4

A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O1 I/O2 I/O3 Vss

1 2 3 4 5 6 7 8 9 10 11 12 13 14

28 27 26 25 24 23 22 21 20 19 18 17 16 15

Vcc /WE A13 A8 A9 A11 /OE A10 /CS I/O8 I/O7 I/O6 I/O5 I/O4

/OE A11 A9 A8 A13 /WE Vcc A14 A12 A7 A6 A5 A4 A3

1 2 3 4 5 6 7 8 9 10 11 12 13 14

28 27 26 25 24 23 22 21 20 19 18 17 16 15

A10 /CS I/O8 I/O7 I/O6 I/O5 I/O4 Vss I/O3 I/O2 I/O1 A0 A1 A2

PDIP

SOP

TSOP-I(Standard)

PIN DESCRIPTION
Pin Name /CS /WE /OE A0 ~ A14 I/O1 ~ I/O8 Vcc Vss Pin Function Chip Select Write Enable Output Enable Address Inputs Data Input/Output Power(+5.0V) Ground
A0

BLOCK DIAGRAM
SENSE AMP ROW DECODER ADD INPUT BUFFER I/O1 OUTPUT BUFFER I/O8

COLUMN DECODER

A14 /CS /OE /WE

Rev 03 / Apr. 2000

CONTROL LOGIC

WRITE DRIVER

MEMORY ARRAY 512x512

GM76C256C Series

ORDERING INFORMATION
Part No. GM76C256CL GM76C256CLL GM76C256CLE GM76C256CLLE GM76C256CLFW GM76C256CLLFW GM76C256CLEFW GM76C256CLLEFW GM76C256CLT GM76C256CLLT GM76C256CLET GM76C256CLLET Speed 55/70/85 55/70/85 55/70/85 55/70/85 55/70/85 55/70/85 55/70/85 55/70/85 55/70/85 55/70/85 55/70/85 55/70/85 Power L-part LL-part L-part LL-part L-part LL-part L-part LL-part L-part LL-part L-part LL-part Temp 0 to 70C 0 to 70C -25 to 85C -25 to 85C 0 to 70C 0 to 70C -25 to 85C -25 to 85C 0 to 70C 0 to 70C -25 to 85C -25 to 85C Package PDIP PDIP PDIP PDIP SOP SOP SOP SOP TSOP-I Standard TSOP-I Standard TSOP-I Standard TSOP-I Standard

ABSOLUTE MAXIMUM RATING (1)

Symbol Vcc, VIN, VOUT TA Parameter Power Supply, Input/Output Voltage Operating Temperature GM76C256C GM76C256CE Storage Temperature Power Dissipation Data Output Current Lead Soldering Temperature & Time Rating -0.3 to 7.0 0 to 70 -25 to 85 -65 to 150 1.0 50 260 10 Unit V C C C W mA Csec

TSTG PD IOUT TSOLDER Note 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is stress rating only and the functional operation of the device under these or any other conditions above those indicated in the operation of this specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect reliability.

RECOMMENDED DC OPERATING CONDITIONS

Symbol Parameter Min. Vcc Power Supply Voltage 4.5 Vss Ground 0 VIH Input High Voltage 2.2 VIL Input Low Voltage -0.3(1) Note 1. VIL = -3.0V for pulse width less than 50ns Typ. 5.0 0 Max. 5.5 0 Vcc+0.3 0.8 Unit V V V V

TRUTH TABLE
/CS /WE /OE Mode H X X Standby L H H Output Disabled L H L Read L L X Write Note 1. H=VIH, L=VIL, X=Don't Care I/O Operation High-Z High-Z Data Out Data In

Rev 03 / Apr. 2000

GM76C256C Series

DC CHARACTERISTICS
Vcc = 5V 10%, TA = 0C to 70C (Normal)/-25C to 85C (Extended), unless otherwise specified. Parameter Test Condition Min. Typ. Max. Symbol ILI Input Leakage Current Vss < VIN < Vcc -1 1 ILO Output Leakage Current Vss < VOUT < Vcc, /CS = VIH or -1 1 /OE = VIH or /WE = VIL Icc Operating Power Supply /CS = VIL, VIN = VIH or VIL, 10 Current VIN = VIH or VIL, II/O = 0mA ICC1 Average Operating Current /CS = VIL, VIN = VIH or VIL, 70 Min. Duty Cycle = 100%, II/O = 0mA ISB TTL Standby Current /CS= VIH 1 (TTL Inputs) VIN = VIH or VIL ISB1 CMOS Standby Current /CS > Vcc - 0.2V, L 40 (CMOS Inputs) VIN > Vcc - 0.2V or LL 20 VIN < Vss + 0.2V LE 60 LLE 30 VOL Output Low Voltage IOL = 2.1mA 0.4 VOH Output High Voltage IOH = -1.0mA 2.4 Note : Typical values are at Vcc =5.0V, TA = 25C Unit uA uA mA mA mA uA uA uA uA V V

AC CHARACTERISTICS(I)
Vcc = 5V 10%, TA = 0C to 70C (Normal) / -25C to 85C (Extended) unless otherwise specified. -55 -70 -85 # Symbol Parameter Min. Max. Min. Max. Min Max. READ CYCLE 1 tRC Read Cycle Time 55 70 85 2 tAA Address Access Time 55 70 85 3 tACS Chip Select Access Time 55 70 85 4 tOE Output Enable to Output Valid 30 35 45 5 tCLZ Chip Select to Output in Low Z 10 10 10 6 tOLZ Output Enable to Output in Low Z 5 5 5 7 tCHZ Chip Disable to Output in High Z 0 20 0 30 0 30 8 tOHZ Out Disable to Output in High Z 0 20 0 30 0 30 9 tOH Output Hold from Address Change 5 5 5 WRITE CYCLE 10 tWC Write Cycle Time 55 70 85 11 tCW Chip Selection to End of Write 50 65 75 12 tAW Address Valid to End of Write 50 65 75 13 tAS Address Set-up Time 0 0 0 14 tWP Write Pulse Width 40 50 60 15 tWR Write Recovery Time 0 0 0 16 tWHZ Write to Output in High Z 0 20 0 25 0 30 17 tDW Data to Write Time Overlap 25 30 40 18 tDH Data Hold from Write Time 0 0 0 19 tOW Output Active from End of Write 5 5 5 -

Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns

Rev 03 / Apr. 2000

GM76C256C Series

AC TEST CONDITIONS
TA = 0C to 70C (Normal) / -25C to 85C (Extended) unless otherwise specified. Parameter Value Input Pulse Level 0.8V to 2.4V Input Rise and Fall Time 5ns Input and Output Timing Reference Level 1.5V Output Load tCLZ,tOLZ,tCHZ,tOHZ,tWHZ,tOW CL = 5pF + 1TTL Load Others CL = 100pF + 1TTL Load

AC TEST LOADS
TTL

CL(1)

Note : Including jig and scope capacitance

CAPACITANCE
TA = 25C, f = 1.0MHz Symbol Parameter CIN Input Capacitance CI/O Input /Output Capacitance Condition VIN = 0V VI/O = 0V Max. 6 8 Unit pF pF

Note : These parameters are sampled and not 100% tested

Rev 03 / Apr. 2000

GM76C256C Series

TIMING DIAGRAM
READ CYCLE 1
tRC ADDR tAA OE tOE tOLZ CS tACS tCLZ Data Out High-Z Data Valid tOHZ tCHZ tOH

Note(READ CYCLE): 1. tCHZ and tOHZ are defined as the time at which the outputs achieve the open circuit conditions and arenot referenced to output voltage levels. 2. At any given temperature and voltage condition, tCHZ max. is less than tCLZ min. both for a given device and from device to device. 3. /WE is high for the read cycle.

READ CYCLE 2
tRC ADDR tAA tOH Data Out Previous Data Data Valid tOH

Note(READ CYCLE): 1. /WE is high for the read cycle. 2. Device is continuously selected /CS= VIL. 3. /OE =VIL.

Rev 03 / Apr. 2000

GM76C256C Series

WRITE CYCLE 1(/OE Clocked)

tWC ADDR

OE tAW tCW CS tAS WE tDW Data In tOHZ

Data Out

tWP

tWR

tDH Data Valid

WRITE CYCLE 2 (/OE Low Fixed)

tWC ADDR tAW tCW CS tAS WE tDW Data In tWHZ Data Out tDH Data Valid tOW (7) (8) tWP tWR

Rev 03 / Apr. 2000

GM76C256C Series

Notes(WRITE CYCLE): 1. A write occurs during the overlap of a low /CS and a low /WE. A write begins at the latest transition among /CS going low and /WE going low: A write ends at the earliest transition among /CS going high and /WE going high. tWP is measured from the beginning of write to the end of write. 2. tCW is measured from the later of /CS going low to the end of write . 3. tAS is measured from the address valid to the beginning of write. 4. tWR is measured from the end of write to the address change. tWR is applied in case a write ends as /CS, or /WE going high. 5. If /OE and /WE are in the read mode during this period, and the I/O pins are in the output low-Z state, input of opposite phase of the output must not be applied because bus contention can occur. 6. If /CS goes low simultaneously with /WE going low, or after /WE going low, the outputs remain in high impedance state. 7. DOUT is the same phase of the latest written data in this write cycle. 8. DOUT is the read data of the new address.

DATA RETENTION CHARACTERISTIC

TA = 0C to 70C (Normal) / -25C to 85C (Extended) unless otherwise specified. Symbol Parameter Test Condition Min VDR Vcc for Data Retention CS>Vcc-0.2V, 2.0 VIN > Vcc - 0.2V or VIN < Vss + 0.2V ICCDR Data Retention Current Vcc=3.0V, L /CS>Vcc - 0.2V, LL VIN > Vcc - 0.2V or LE VIN < Vss + 0.2V LLE tCDR Chip Deselect to Data See Data Retention 0 Retention Time tR Operating Recovery Time Timing Diagram tRC(2) Notes 1. Typical values are under the condition of TA = 25 C. 2. tRC is read cycle time. Typ 1 0.5 1 0.5 Max 15 7 20 10 Unit V uA uA uA uA ns ns

DATA RETENTION TIMING DIAGRAM

VCC 4.5V tCDR DATA RETENTION MODE tR

2.2V VDR CS>VCC-0.2V CS VSS

Rev 03 / Apr. 2000

GM76C256C Series

PACKAGE INFORMATION
28pin 600mil Dual In-Line Package(Blank)

UNIT : INCH(mm)

MAX. MIN.

1.467(37.262) 1.447(36.754) 0.600(15.240)BSC 0.090(2.286) 0.070(1.778) 0.065(1.650) 0.050(1.270) 0.155(3.937) 0.145(3.683) 0.035(0.889) 0.020(0.508) 0.550(13.970) 0.530(13.462)

0.140(3.556) 0.021(0.533) 0.100(2.54)BSC 0.015(0.381) 0.120(3.048)

3 deg 11 deg

0.014(0.356) 0.008(0.200)

28pin 330mil Small O utline Package(FW)

0.346(8.788) 0.338(8.585) 0.480(12.192) 0.460(11.684)

UNIT : INCH(mm)

MAX . MIN.

0.728(18.491) 0.720(18.288)

0.110(2.794) 0.094(2.388) 0.014(0.356) 0.002(0.051) 0.012(0.305) 0.008(0.203) 0.050(1.270) 0.030(0.762)

0.050(1.270)BSC

0.020(0.508) 0.014(0.356)

Rev 03 / Apr. 2000

GM76C256C Series

28pin 8x13.4mm Thin Small Outline Package Standard(T)

UNIT : INCH(mm)

MAX. MIN.

0.468(11.9) 0.460(11.7) 0.536(13.6) 0.520(13.2)

0.319(8.1) 0.311(7.9)

0.040(1.02) 0.036(0.91) 0.008(0.20) 0.002(0.05)

0.027(0.7) 0.012(0.3)

0.008(0.2) 0.004(0.1)

0.022(0.55 BSC)

Rev 03 / Apr. 2000

GM76C256C Series

MARKING INFORMATION

Package
H Y M y U 7 w N 6 w

Marking Example
D C A 2 I 5 6 C c c K O s R s E t A

PDIP

G y

Y M y

U 7 w

N 6 w

D C

A 2 K

I 5 O 6 R C E c A c F W s s t

SOP

G y

Y M y

U 7 w

N 6 w

D C

A 2 K

I 5 O 6 R C E c A c T s s t

TSOP-I

G y

Index
HYUNDAI KOREA GM76C256C cc : Hynix Logo : Origin Country : Part Name : Power Consumption -L : Low Power - LL : Low Low Power : Package Type - Blank : DIP - FW : SOP -T : TSOP-I : Speed - 55 : 55ns - 70 : 70ns : Temperature - Blank : Commercial ( 0 ~ 70 C ) -E : Extended ( -25 ~ 85 C ) : Year ( ex : 00 = year 2000, 01 = year 2001 ) : Work Week ( ex : 12 = ww12 )

Blank / FW / T

ss

yy ww Note - Capital Letter - Small Letter

: Fixed Item : Non-fixed Item

Rev 03 / Apr. 2000

10