LT Spice
LT Spice
LT Spice
LTSpice
LTSpice is a free circuit simulator based on Berkeleys SPICE 3 program available for download from http://www.linear.com. This document describes some of the features used in EE105. Additional information is available from the tools built-in help command and tutorials available on the web.
Schematic diagram To enter the schematic select the resistor and ground symbol from the tools menu and the transistor and voltage sources by clicking and then choosing npn and voltage in the dialog that opens. Set all device parameters (e.g. resistor value) by right-clicking on the component and entering the desired value(s) in the dialog box that opens. Connect the devices with the wiring tool . Label nets with the tool and drag components to make she schematic look pretty with . The larger hand, , also moves components but detaches them from their nets (wires). To enter the .model and .dc statements, choose EditSPICE Directive from the menu and enter the text in the dialog box. The .model statement defines a custom npn transistor with name npn105 and Is=10fA, =100, and Early voltage VA=100V. Set the model parameter of Q1 to the name of the custom model (npn105), as shown in the example on the right. Verify that your schematic looks just like the one shown above and that you have entered all component values. Rser is the series resistance of source Vi and limits the current flowing into the base of Q1. An alternative would be to reduce the maximum value of the DC sweep to less than 5V.
DC Analysis
Clicking runs the simulation. Since you have entered the analysis statement (.dc) in schematic, LTSpice knows that you want to perform a DC analysis. Otherwise a dialog box opens letting you choose the analysis to run. Plot Vout by clicking on its net or label in the schematic. EE 105 LTSpice Page 1
Plotting the Voltage Gain Use expressions to plot the voltage gain of the circuit. Right-click on V(vout) in the plot window and change the text in the dialog box to V(vout)/Vi. This plots the large-signal gain of the circuit shown on the right. Although we can compute and plot it, the large-signal gain of a common-emitter amplifier is not very meaningful. To plot the small-signal gain -av = -dVout/dVi, change the plot expression to -d(V(vout)). As expected, the circuit has gain over a narrow range of input voltages. Frequently it is more meaningful to plot av as a function of the output voltage Vout, rather than Vi. Click on the horizontal axis (e.g. on 2.6V) and enter V(Vout) for Quantity Plotted. The plot changes to the one shown at the right, now indicating that that values on the horizontal axis are for Vout, rather than the analysis sweep variable, Vi. As we can see, the circuit has gain over a wide range of Vout. At low Vout, the gain drops as Q1 enters saturation. For large Vout, the bias current IC drops (a result of the decreased voltage across R1), lowering the transconductance gm of Q1.
Simulating over Temperature LTSpice has quite powerful features. Lets simulate the gain variation as a function of temperature. Change the .dc analysis statement as shown on the right and add the new SPICE directive .step temp 0 70 35 to instruct SPICE to perform simulations between 0C and 70C in steps of 35C (i.e. to simulate at 0C, 35C, and 70C). Rerun the simulation and configure the plot to show the small-signal gain as a function of Vi for the three different temperatures. Which trace corresponds to which temperature? EE 105 LTSpice Page 2
Small-signal gain versus Vin for temperatures 0C, 35C, and 70C. Change the horizontal axis to Vout. Apparently the circuit gain only weakly depends on temperature. However, the bias point, i.e. the value of Vin for which the circuit has high gain, changes as a function of temperature. This is to be expected as VBE(on) decreases -2mV/C, shifting the -av plot to the left as the temperature increases.
Small-signal gain versus Vout for temperatures 0C, 35C, and 70C. EE 105 LTSpice Page 3
Output from the operating point analysis. Always perform this simulation to check the bias point of the circuit. In this case, IC = 50A and VO = 2.5V, as desired.
EE 105 LTSpice
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Output from the DC transfer function analysis. The simulated gain, -19.6, is close to the calculated value -20 which ignored the effect of ro and made other simplifications. Same for the input and output resistance of the circuit.
AC Analysis
The figure shows an example for an ac analysis. Determine the parameters in the .model statement from the transistor specifications. Definitions:
k p Cox , tox
Cgso Cgdo Col . Use an LTSpice nmos4 device for the transistor and specify the model name, length,
and width in the parameter dialog. Note: Spice will report an error that W and L are smaller than recommended for level 1 models. This warning refers to the fact that the simple square law models used in class are inaccurate for transistors with channel length less than about 2m. In actual design you would have to use more accurate (and complicated) models. Next you need to specify an input. Use an LTSpice voltage component and determine and enter the bias voltage by running a DC analysis. Click on the advanced tab in the parameter section and enter AC Amplitude 1.
The figure below shows the output (magnitude and phase) from the ac analysis. Always annotate SPICE output.
EE 105 LTSpice
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