Neuron Chip

Local Operating Network LSIs

TMPN3150/3120

Neuron Chip Now Available from Toshiba

Local Operating Network(LON) are low cost, reliable, intelligent local network systems that facilitate communication between sensors and actuators (among a maximum of 32,385 nodes) (see Figure 1). LonWorks technology does not require the dedicated communications networking technology nor special communications protocols of LANs. In contrast, LonWorks can be developed into high-level networks simply by defining the functions to be performed at each node. Moreover, the special architecture of LonWorks systems means that, when reconfiguring an existing network or even changing its functions, the network itself can be used to modify the configuration data or to load programs, etc. Nodes can also be added or removed as required. Figure 2 shows the typical structure of a LonWorks node.

TMPN3150B1AF (QFP64)

TMPN3120B1AM (SOP32)

TMPN3120E1M (SOP32)

TMPN3120FE3M (SOP32)

TMPN3120FE5M* (SOP32)

TMPN3120A20M* (SOP32)

TMPN3120A20U* (QFP44)
* : Under development

Light

Wall controller

Motor

Neuron

Neuron

Neuron

r eu

on

Remote control

Power lines Router

Neuron

Neuron
Router RF

Thermal sensor

Air conditioner

Breaker

Alarm

Neuron

Neuron

Neuron

Neuron

Power line transceiver

Twisted-pair cable transceiver

RF transceiver

Figure 1. Example of LonWorks System Configuration

Sensor or actuator

Crystal oscillator Power supply I/O port Communications port

+5 V

For example, motors, valves, encoders, switches, etc.

Neuron chip (TMPN3150)

I/O interface circuit Transceiver

16K to 58K EPROM/ROM/RAM

Networking medium (twisted-pair cable, RF, power lines, etc.)

Figure 2. Typical structure of LonWorks node with the TMPN3150

(The TMPN3120 does not require external memory. This chip has 10 KB or 16 KB of ROM buit in for the LonTalk protocol and I/O function programs.)

LonWorks System Features

LonWorks technology is a completely new network control system concept developed by Echelon Corporation, USA. The key feature of LonWorks technology is the incorporation of the communications programs in the LonWorks LSI (Neuron Chip) as firmware (internal LonTalk). This means that, by using LonWorks, the programs to handle the communication protolcol in communication network systems no longer need be provided by the user. Refer to pages 8 and 9 for details of the LonTalk protocol. A special version of the C programming language (Neuron C) is used to reduce the load involved in developing application programs. See page 5 for the features of Neuron C. The Neuron Chip has eleven I/O ports which are equipped with the firmware programmable function I/O facility. For example, available features include measurement of an input signal on time (Ontime input) or Triac output suitable for adjusting the intensity of an electric light (see Table 1 to 5). Users can avoid complex program development by selecting the appropriate function I/O facility for each node.

I/O Functions
Table 1. Summary of Direct I/O Mode
Object Bit input/output Byte input/output Leveldetect input Nibble input/output Touch I/O Applicable I/O pins IO0 to IO10 IO0 to IO7 IO0 to IO7 Any adjacent 4 in IO0 to IO7 IO0 to IO7 Input/Output Value 0, 1 binary data 0 to 255 binary data Falling edge detection 0 to 15 binary data Interface to Dallas Semiconductor Corp. Touch Memory (TM) standard

Table 2. Summary of Parallel I/O Mode

Object Muxbus I/O Parallel I/O Applicable I/O pins IO0 to IO10 IO0 to IO10 Input/Output Value Parallel bidirectional port using multiplexed address technique Parallel bidirectional handshaking port

Table 3. Summary of Serial I/O Mode

Object Magcard input Bitshift input/output Neurowire I/O Serial input Serial output I 2 C I/O Magtrack1 input Wiegand input Applicable I/O pins IO8 (CLK), IO9 (Data) and any of IO0 to IO7 Any adjacent pins IO8 (CLK), IO9 (Data out), IO10 (Data in) and any of IO0 to IO7 IO8 IO10 IO8 (CLK) and IO9 (Data) IO8 (CLK), IO9 (Data) and any of IO0 to IO7 Any two adjacent 2 in IO0 to IO6 Input/Output Value Encoded ISO7811 track 2 data stream from magnetic card reader Up to 16 bits of clocked data Up to 255 bits of bidirectonal serial data 8-bit characters at 600, 1200, 2400, 4800 or 9600*1 baud (255 bytes max) 8-bit characters at 600, 1200, 2400, 4800 or 9600*1 baud (255 bytes max) Inter-Integrated Circuit bus protocol (usage must be licensed by Philips Electronics) For encoding data (ISO3554) from magnetic card reader For encoding data (Wiegand standard) from magnetic card reader

Table 4. Summary of Timer/Counter Input Objects

Object Dualslope input Edgelog input Infrared input Ontime input Period input Pulsecount input Quadrature input Totalcount input Edgedivide output Applicable I/O pins IO0, IO1 and IO4 to IO7 IO4 Any of pins IO4 to IO7 Any of pins IO4 to IO7 Any of pins IO4 to IO7 Any of pins IO4 to IO7 IO4 and IO5, IO6 and IO7 Any of pins IO4 to IO7 IO0, IO1 and any of pins IO4 to IO7 Input/Output Value Analog input from external operating amp (integrator) A stream of input transitions Encoding of data stream from an infrared demodulator Pulse width of 0.2 s to 1.678 s Signal period of 0.2 s to 1.678 s 0.839 s input pulse count (0 to 65,535) Binary grey code change count (16,383 max) Input pulse count (0 to 65,535) 2n division of input pulse frequency (where n = 0 to 65,535)

Table 5. Summary of Timer/Counter Output Objects

Object Frequency output Oneshot output Pulsecount output Pulsewidth output Triac output Triggeredcount output Applicable I/O pins IO0, IO1 IO0, IO1 IO0, IO1 IO0, IO1 IO0, IO1 and any of pins IO4 to IO7 IO0, IO1 and any of pins IO4 to IO7 Input/Output Value Square wave of 0.3 Hz to 2.5 MHz Pulse of duration 0.2 s to 1.678 s 0 to 65,535 pulses 0 to 100% duty cycle pulse train Delay of output pulse with respect to "w", "r" and "t" input edge Output pulse controlled by counting input edges
Note) Speeds and times given in Tables 1 to 5 are those for a 10-MHz input clock. *1 These values apply only to products for which a 20-MHz input clock is available.

Neuron C Programming
The "Neuron C" version of the C programming language is used to develop application programs for the Neuron Chip. Neuron C is based on ANSI C, but has added functions for LonWorks technology. The major changes are as follows:

1. Objects for I/O functions

All I/O functions can be used simply by selecting the desired I/O object (see Table on page 4) and declaring the object for the I/O pin to be used. Example: To use pin IO0 for bit input, make the following declaration: IO_0 input bit Switch; You can also use the io_in( ) and io_out( ) functions in programs.

2. Automation of network communication protocol (network variables)

To expedite packet communications, Neuron C includes special network variables. As with normal variables, type declaration (int, or unsigned long, etc.) is required, but input or output is specified at the same time. Example: To declare an int type output network variable, declare the following: network output int NV_switch_state; The processing associated with this communications protocol is in firmware and no special code needs to be included in the application program. Messages can be automatically output to the network by assigning a value to a declared output network variable in the application program. Also, if you receive a message, the value of the declared input network variable is automatically updated. the nv_update_occurs( ) event is provided for checking for the automatic updating of input network variables.

3. Event driven scheduler

There is an inbuilt round-robin type scheduler (which does not use the main( ) function) which immediately executes the appropriate task when an event occurs. The event is evaluated in the when clause, and the appropriate task is then executed.

When (event) { task } When (event) { task } When (event) { task }

Round-robin

An example program listing is shown on next page.

5

Example of Program
This program uses pin IO5 at the switch node to measure how long a switch is depressed, then sends the time as data to the speaker node, which determines the pitch according to the data and outputs the corresponding frequency to pin IO0.
I/O object Speaker node IO0 IO0 output frequency ALARM; network input unsigned long Tin; 2 when(nvupdateoccurs (Tin))

{
io out (ALARM, Tin);

Network variable I/O object Switch node IO5 IO5 input ontime SW; network output unsigned long Tout; 1 when (ioupdateoccurs (SW))

{
Tout = inputvalue;

Unsigned long-type data is output

Network variable
1: Changes to TRUE when the switch turns OFF 2: Changes to TRUE on receipt of network variable (nv)

Example of Using Internal -type A/D Block Diagram

-type A/D Block Diagram
analog input DI4 enable

Example of Program
#define A2D_CTRL *(int *)0xFFA8 /* control reg. 0xFFA8 */ /* status reg. 0xFFA8*/

Neuron Chip
clk[2:0] max[1:0] 3 fast clk 8 control

#define A2D_STS *(int *)0xFFA8

#define A2D_DATA *(unsigned long *)0xFFA9 /* data reg. 0xFFA9, 0xFFAA */ #define A2D_ENABL *(int *)0xFFAB #define a2d_enable(clk, mask) A2D_CTRL = (A2D_STS&0x03) | ((clk)<<2) | 0x40; A2D_ENABL = (mask) #define a2d_disable() A2D_CTRL = A2D_STS&0x1F #define a2d_done() A/D Logic DI6 enable #define a2d_mux(mux) #define a2d_read() Counter I0_3 output bit i03; ((A2D_STS&0x80) !=0) A2D_CTRL = (A2D_STS&0x5C) | (mux) A2D_DATA // enable I0_3 driver IO4 DI5 enable

IO5

comp.

#pragma ignore_notused i03 IO6 DI7 enable Vref cmp enable status Latch[15:8] Latch[7:0] unsigned long analog_data;

when( reset ) { a2d_mux( 0 ); // I0_4 select

a2d_enable( 0,9 ); // clk 0 select, I0_4,7 DI disable IO7 analog buffer IO3 }

when(a2d_done()){ analog_data = a2d_read();

Standard Network Variable Types (SNVTs)

For overall network program development, it is worthwhile considering the function to be performed at each individual node's I/O ports. For this reason, data required form the network can be logically connected to the network simply by issuing an input command with a network variable (see Table 6). If transmission across the network of data or information read form the I/O port is required, it can be logically connected to the network simply be issuing an output command with a network variable (SNVTs). These logical connections can be performed by binding across the network after the node has been configured. Optional data other than network variables can also be transmitted in packets. A maximum of 228 bytes per packet can be inserted and manipulated by the user as required. Consequently, in a LonWorks system, individual nodes can be developed using object-oriented programming and expanded to form a network with high overall performance.

Table 6. Example of Standard Network Variable Types (SNVTs)

Name Measurement Unit Range Resolution SNVT#

SNVTlength

Length

0 to 6,553.5

0.1 m

17

SNVTlength kilo

Length

km

0 to 6,553.5

0.1 km

18

SNVTtemp

Temperature

274 to 6,279.5

0.1 C

39

SNVTvolt

Voltage

3,276.8 to 3,276.7

0.1 volt

44

SNVTcount

Count, event

counts

0 to 65,535

1 count

SNVTflow

Flow

liters/second

0 to 65,534

1 /s

15

SNVTelec kwh

Energy, elec

kilowatt-hour

0 to 65,535

1 kWh

13

SNVTlev cont

Level, continuous

0 to 100

0. 5 %

21

OFF LOW SNVTlevdisc Level, discrete MED HIGH ON "Null State (U0)" not in use "Call Initiated (U1)" "Overlap Sending (U2)" "Outgoing Call Proceeding (U3)" "Call Delivered (U4)" hearing ringback

0 1 2 3 4 0 1 2 3 4 38 22

SNVTtelcom

Phone state

The LonTalk Protocol

The LonTalk protocol, which supports a wide range of applications, is designed to support all communications on the LonWorks network. Examples include electronic home appliances, factory automation equipment, motor vehicle control equipment, building control equipment, and home automation equipment. The LonTalk is a full 7-layer protocol as defined by the Open Systems Interconnection (OSI) reference model of the International Standards Organization (ISO) (see Table 7). Compatible with other LonWorks-based products. Communications data is transferred in relatively small packets, increasing network efficiency. Compatible with multiple media.

Table 7. LonTalk Protocol Layers

OSI layer 7 6 5 4 3 2 1 Purpose Services provided Network variable: Recognition of types and standardization. Network variables, foreign frame transmission Request/response, authentication, network management Acknowledged and unacknowledged, unicast and multicast authentication, common ordering, duplicate detection Addressing, routing information Framing, data encoding, CRC error checking, predictive CSMA, collision avoidance, priority, collision detection. Media-specific interfaces and modulation schemes General-purpose message functions Application Application compatibility Presentation Data interprotation Session Transport Network Link Physical Remote actions End-to-end reliability Destination addressing Media access and framing Electrical interconnect

LonTalk Protocol Features

The following media are supproted by the LonTalk protocol: Twisted pair (TP) Power line (PL) Radio frequency (RF) Infrared (IR) Coaxial cable (CX) Optical fiber (OF) The specifications of the LonWorks transceivers that connect these media include transmission distance and data rate topology. Transceivers matching the required specifications enable interconnectivity with the LonWorks network. Table 8 lists the transceivers defined to date. Multiple Media Support

Table 8. Example of Transceiver Specifications

Medium Power line (PL) Data rate 10 kbps 39 kbps 78 kbps Twisted pair 1.25 Mbps 78 kbps 78 kbps According to setup condition Less than 1.2 km for 32 nodes (using a RS-485 line transceiver IC) Less than 2 km for 64 nodes (using a communications pulse transformer) Less than 500 m for 64 nodes (using a communications pulse transformer) Less than 500 m for 64 nodes (using free topology transceiver) Less than 500 m for 64 nodes (when using link power transceiver) Free topology Free topology Power supply can be linked to twisted-pair cable. The above transceiver modules are marketed by Echelon Corp. Range Remarks Using the modified direct sequence spectrum modulator LSI form Echelon Corporation

With both ends of the twisted-pair cable terminated

A channel consists of one transmission medium block (see Figure 3). Support for Multiple Communications Channels A network consists of multiple channels. The interconnection of these channels is supported by devices called bridges and routers.
Node Domain Router Subnet Bridge Group member Bridge

Figure 3. Group Example of Network Topology

8

Bridge: A bridge transfers all packets input from one channel to another channel. Router: A router determines the destination node address for a packet on a channel and decides whether or not to transfer the packet to a different channel. The intelligent router improves the communications efficiency of a medium.

Improved Communications Response Times The LonTalk protocol uses a unique collision avoidance algorithm. The collision avoidance algorithm allows a channel to manifest its maximum transmission throughput without any deterioration due to excessive collision. In addition, collision detection is supported as an option for particular media, including twisted pair. Collision detection further improves the response time in the event of a collision. The LonTalk protocol can support more than 500 transactions per second (in the case of 12 byte length), when the transmission rate is 1.25 Mbps using twisted pair. Although it may not be possible to slow down transmission for certain node applications, the LonTalk protocol supports media access in which a priority rating can be set for each node (priority mode). Immediate access to the medium is guaranteed when the end of communication on that medium is detected at a node for which a priority rating has been established.

Improved Communications Reliability The LonTalk protocol supports an end-to end communications acknowledge mode auto with retry function. When a node sends a message in this mode to another node or a group node, the receiving node sends an acknowledgment to the sender when the message is received. If the sender does not receive the acknowledgment within a set time, it automatically resends the message. The number of retries can also be set. The "Request/Response" mode is an even more reliable communications mode. When a sending node requests a certain process to be performed by another node, the receiving node executes the process and returns the result to the sending node.

Improved Security The LonTalk protocol includes an "Authentication mode". In this mode, authentication is carried out between the nodes that are to communicate without complex encryption being performed. This mode prevents unauthorized network access without any reduction throughout.

Communications Compatibility of LON Products Products that use the LonTalk protocol are designed for mutual communications control even with the products of other manufacturers. The Standard Network Variable Type (SNVTs) declaration statement in the LonTalk protocol firmware defines the format of data transmitted by the communications packet and, by using the variable types of the particular network, enables communications with other products using the same declaration statement without the tedium of developing communications protocols.

Network Management Service

The LonTalk network management service is the heart of the LonTalk protocol. Support for this service is built into every LonWorks node. Thus, irrespective of its location, every node can respond to LonTalk commands from nodes that have been specified for executing the network management function. The following lists some of the services supported by network management messages. Find unconfigured nodes and download network address Modify network variable configuration table. Stop, start, and reset node applications The table contains information on the protocol Access node communications statistics service type used for sending the network Configure routers and bridges variables and whether the authentication service Download new application programs is in use or to send the variables to a priority slot. Extract topology of active network To ensure security, authoriy can be specilied as a condition for network management messages irrespective of application messages.
9

Neuron Chip Communication Ports

The TMPN3150 and TMPN3120 have five dedicated communication ports, allowing them to be configured for communications with each type of medium. Table 9 shows the communication port conditions.

Table 9. Communication Port Pin Functions

Pin name CP.0 CP.1 CP.2 40 CP.3 CP.4 1. 4 TX(out) Up to CDet(in)
This can be set by using option.

Currency consum (mA) 1. 4

Differential mode RX+(in) RX(in) TX+(out)

Single-ended mode RX(in) TX(out) TX enable(out) Up to Sleep(out)

Special-Purpose mode

Bit Clock(out) Up to Sleep(out) or Wake-up(in) Frame Clock(out)

RX: Receive TX: Transmit CDet: Collision Detection

1. Differential Mode
102

Figure 4 shows a simple connection example using differential mode.

Example of twisted-pair direct connection (Conditions) Wire: Twisted pair (22 AWG) Bus length: 30 m max Stub length: 30 cm max Number of nodes: 64 max/channel Communication rates: 1.25 Mbps

+5 V Neuron Chip TMPN 3150 or TMPN 3120 CP0 CP1 CP2 CP3 CP4 2 k 2 k 51 51

Node #1

2 k +5 V

Figure 5 shows an example of the output waveforms in differential mode. A transformer can also be used for isolation from the media.
Example of transformer connection (1) (Conditions) Wire: Twisted pair (22 AWG) Bus length: 500 m max (typical) Stub length: 30 cm max Number of nodes: 64 max/channel Communication speed: 1.25 Mbps Example of transformer connection (2) (Conditions) Wire: Twisted pair (22 AWG) Bus length: 2000 m max (typical) Stub length: 3 m max Number of nodes: 64 max/channel Communication speed: 78 kbps

+5 V Neuron Chip TMPN 3150 or TMPN 3120 CP0 CP1 CP2 CP3 CP4 2 k 2 k 51 51

Node #64

2 k +5 V

102

(All resistors are metal film 1%, 1/8 W)

*All Neuron chips need common ground level.

Figure 4. Example of Differential Mode, Twisted-Pair Direct Connection

T
1 CP2 (Output) CP0 (Input) +Data CP3 (Output) Data CP1 (Input) 1 1 0 1 1 0 0 0

Bit Sync. Preamble

Byte Sync.

Data+16 bit CRC

Line-Code Beta 1 Beta 2 Violation

Figure 5. Example of Output Waveforms in Differential Mode (T: 800 ns, 1.25 Mbit/s)
10

2. Single-Ended Mode
120

+5 V
Neuron CP0 Chip CP1 TMPN CP2 3150 CP3 or CP4 TMPN 3120

Figure 6 shows a connection example for a RS-485 transceiver using single-ended mode. In this example, both ends are terminated with 120 . The maximum network bus length is 1200 m.
Node #1

RS-485 2 k

10 k

(Conditions)

+5 V

Wire: Twisted pair (22 AWG) Stub length: 0 cm Number of nodes: 32 max/channel Communication speed: 39 kbps

RS-485
Neuron CP0 Chip CP1 TMPN CP2 3150 CP3 or CP4 TMPN 3120

+5 V

Node #32 2 k 10 k 120 (All resistors are metal film 5%, 1/8 W)

Figure 7 shows an example of the output waveforms in single-ended mode.

+5 V

*All chips ground level must be within 7 V.

Figure 6. Example of Single-Ended Mode RS-485

T
CP1(Output) CP0(Input) CP2(Output) Data Transmit Enable 1 1 1 0 1 1 0 0 0

Bit Sync. Preamble

Byte Sync.

Data+16 bit CRC

Line-Code Beta 1 Beta 2 Violation

Figure 7. Example of Output Waveforms in Single-Ended Mode (T: 25.6 s, 39 kbit/s)

3. Special-Purpose Mode
Figure 8 shows an example of the communication waveforms in special-purpose mode. This mode allows more complex data trunsfer between the Neuron Chip and transceiver. It is used with transceivers such as electric power line trunsceivers.
MSB
RX Input CP0

Bit Cloock Output CP2

Frame Clock Output CP4

STATUS

LSB MSB

DATA

LSB

1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6
MSB STATUS LSB MSB DATA LSB

TX Output CP1

1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6

Figure 8. Example of Input and Output Waveforms in Special-Purpose Mode

11

Neuron Chip Family

The neuron chip family provided by Toshiba consists of the TMPN3150B1AF and TMPN3120B1AM/E1M/A20M/ A20U/FE3M/FE5M. A block diagram of the TMPN3150B1AF is shown as following. The main hardware components of the TMPN3150B1AF and TMPN3120B1AM/E1M/A20M/A20U/FE3M/FE5M are the same unless noted in Table 10. TMPN3150B1AF Block Digram
Vss VDD 5 V 10%

Memory expansion bus

2 EEPROM (512 Bytes) RAM (2 KBytes) CPU 1 CPU 2 CPU 3

Internal 16-bit address bus

Internal 8-bit data bus

Timing and control

Control

V Ref

Clock and Timers

Application I/O block

With 16-bit load registers, counters, latches, scaled clock source, 20-mA sink current, programmable pull-ups (IO4 to 7), etc.

Network communication port (transceiver)

Low-voltage detector reset circuit

~ reset ~ service

Clock

IO0 to IO7

IO8

IO9

IO10

CP0 to CP4

Standard clock input: 10 MHz, 5 MHz, 2.5 MHz, 1.25 MHz, 625 kHz

Table 10. Comparison of TOSHIBA Neuron Chip

Product No. TMPN3150B1AF TMPN3120B1AM TMPN3120E1M * TMPN3120A20U 1K * TMPN3120A20M 20 TMPN3120FE3M * TMPN3150FE5M * Under development 2K 3K 2K 4K 16K 16K 3 3 No No 2 ch 2 ch 3 ch 1K 16K 3 No 2 ch 3 ch EEPROM (in bytes) 512 512 1K RAM (in bytes) 2K 1K 1K ROM (in bytes) No 10K 10K 8-bit CPU 3 3 3 External memory I/F Available No No 16-bit timer/ A/D operation counter CONVERTER Frequency
(MHz) Maximum

Package QFP64-P-1414 0.80A SOP32-P-525 1.27 SOP32-P525 1.27 QFP44-P-1010 0.80 SOP32-P-525 1.27 SOP32-P-525 1.27 SOP32-P-525 1.27

2 ch 2 ch 2 ch

10

12

Features of Neuron Chip Hardware

1 2 3 4 5 6 7 8

Incorporates there high performance, 8-bit pipelined CPUs. The eleven application I/O pins can be used in a variety of combinations.

Two of the three CPUs perform LonTalk protocol processing. The third CPU is used for user applications. Individually configurable digital I/O. Can be used as a parallel interface to an external microprocessor with eight data lines and three control lines.

Incorporates two 16-bit programmable counter/timers.

Each device has a unique 48-bit ID number.

Uses 6 bytes of E PROM.

A service pin is provided for efficient network installation.

Refer to page 17.

Five LonTalk network interface pins

Connects to a baseband medium such as twisted-pair cable via simple components or an externally-mounted LonTalk transceiver.

Supports sleep mode for low power consumption. For storage of network parameters and application programs. 2 The TMPN3120E1M/A20M/A20U have 1-KB E PROM. 2 The TMPN3120FE3M has 2-KB E PROM. 2 The TMPN3120FE5M has 3-KB E PROM. 2 Other neuron chips have 512-bytes E PROM. Prevents incorrect operation or erroneous E PROM writers if the supplied voltage is less than a specified voltage. Built-in 3-channel -type A/D converter TMPN3120A20M/A20U and TMPN3120FE5M.
2

Internal E PROM

9 10

Low-Voltage Reset Circuit

Built-in AD converter

The TMPN3120B1AM/E1M have 10 Kbytes and the TMPN3120A20M/A20U/FE3M/FE5M has 16 Kbytes of incorporate ROM enabling the construction of single chip systems. This ROM is preloaded with firmware such as the protocol and application library, supporting many kinds of applications. The TMPN3150B1AF does not incorporate ROM and is configured to access external memory (58 Kbytes max of which 42 Kbytes can be used for application programs). This makes the TMPN3150B1AF suitable for more complex applications. Through the combination of its unique hardware and firmware, the Neuron Chip contains all the key functions required for a LonWorks node. Processes all LonTalk protocol messages. Includes input pin functions for detection and output pin functions for detailed operation of output devices. Includes a library of application functions (see Tables 1 to 5). Installation parameters are stored in non-volatile memory. These functions minimize the number of external components required to construct a LonWorks network, resulting in a low overall cost. Figures 9, 10 and 11 show the pin assignment of TOSHIBA Neuron Chip.

13

Neuron Chip Family

Pin Assignments (Top View)

NC A15 ~E R/ ~ W VDD D0 D1 VDD VDD VSS D2 D3 D4 D5 D6 D7

IO10

CP4

CP3

VDD

VSS

IO7

IO8

IO9

NC

NC

NC A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

48 49

33 32

Neuron CHIP TMPN3150 B1AF

64 1

17 16

CP4 CP3 CP2 CP1 CP0 NC VDD VSS CLK1 CLK2 VDD VSS VDD VSS NC ~ SERVICE

~ RESET VDD IO4 IO3 IO2 IO1 IO0 ~ SERVICE VSS VSS VDD VDD VSS CLK2 CLK1 VSS

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17

Neuron CHIP TMPN3120 B1AM / E1M / A20M / FE3M / FE5M

VDD VSS IO5 IO6 IO7 IO8 IO9 VDD IO10 VSS CP4 CP3 CP1 CP0 VDD CP2

NC IO6 IO5 VSS VDD NC ~ RESET VDDin IO4 IO3 NC

33 34

23 22

NC

NC CP1 CP0 VDD

Neuron Chip TMPN3120A20U

CP2 NC VSS CLK1 CLK2 VSS

44 1

12 11

NC

IO2

IO1

IO0

~ SERVICE

VDD

VDD

NC

NC

VSS

Figure 9. TMPN3150B1AF 64-pin QFP

NC IO0 IO1 IO2 IO3 ~ RESET VDD VSS VSS IO4 IO5 IO6 IO7 IO8 IO9 IO10

Figure 10. TMPN3120B1AM/E1M/A20M/FE3M/FE5M 32-pin SOP

Figure 11. TMPN3120A20U 44-pin QFP

Pin Functions
Pin Name CLK1 CLK2 ~ RESET ~ SERVICE IO0 to IO3 Input Output I/O(built-in pull-up) I/O(built-in configurable pull-up) I/O I/O (built-in configurable pull-up) I/O I/O Pin Function Oscillator connection. Or external clock input. Oscillator connection. Leave open when external clock is input to CLK1. Reset pin (active low). Service pin. Indicator output during operation. Large-current sink capacity (20 mA). General I/O port. General I/O port. One of IO4 to IO7 can be specified as No.1 timer/counter input. Output signal can be output to IO0. IO4 can be used as the No.2 timer/counter input with IO1 as output. General I/O port. Can be used for serial communication with other devices. Memory expansion data bus Read/write control output port for memory expansion Control output port for memory expansion Address output port for memory expansion Power input (5.0 V typ.) Power input (0 V GND) Not connected. Leave open. Bidirectional port for communications. Supports several communications protocols by specifying mode.
Notes:

TMPN3150B1AF /E1M/A20M/FE3M TMPN3120A20U

Pin No. 24 23 6 17 2 to 5
/FE5M
Pin No.

TMPN3120B1AM

VSS

NC

Pin No. 15 14 40 5 4, 3, 2, 43

15 14 1 8 7 to 4

IO4 to IO7

10 to 13

3, 30 to 28

42, 36, 35, 32

IO8 to IO10

14 to 16 43, 42, 38 to 33 45 46 47, 50 to 64

27, 26, 24

31, 30, 27

D0, D1, D2 to D7 I/O R/ ~ W ~E A15, A14 to A0 VDD VSS NC CP0 to CP4 Output Output Output Input Input I/O

7, 20, 22, 26, 40, 41, 44 2, 11, 12, 18, 25, 32 9, 10, 19, 29, 38, 41 8, 9, 19, 21, 25, 39 9, 10, 13, 16, 23, 31 7, 8, 13, 16, 26, 37 1, 18, 27, 48, 49 28 to 32 19, 20, 17, 21, 22
1, 6, 11, 12, 17, 22, 23, 28, 33, 34, 39, 44

20, 21, 18, 24, 25

~ SERVICE and IO4 to IO7 have configurable pull-up. All VDD Pins must be connected together externally. All VSS Pins must be connected together externally.

14

Electrical Characteristics (TMPN3150B1AF)

For a description of the electrical characteristics of other Neuron chips, please refer to the datasheets for the chips in question.
1

Maximum Ratings (VSS = 0 V, VSS (typ.))

Item Symbol VDD VIN PD Tstg Rating 0.3 to 7.0 0.3 to VDD + 0.3 800 65 to 150 Unit V V mW C

Power supply voltage Input voltage Power dissipation Storage temperature

Operating Conditions
Item Symbol VDD VIH(1) VIL(1) VIH(2) VIL(2) fosc Topr Min 4.5 2.0 VSS VDD 0.8 VSS 0. 625 40 Typ. 5.0 Max 5.5 VDD 0.8 VDD 0.8 10 +85 Unit V V V V V MHz C

Operating voltage Input voltage (TTL) Input voltage (CMOS) Operating frequency Operating temperature

DC Characteristics (VDD = 5.0 V 10%, VSS = 0 V, Ta = 40 to +85C)

(Operating conditions in item 2 above apply unless otherwise stated.)

Item Low output voltage (1)

Symbol VOL(1)

Pins IO0 to IO3

Test conditions IOL = 20 mA IOL = 10 mA

Min 0 0 0 0 0 0 VDD 0.4 VDD 0.4 VDD 1.0 VDD 0.4 10

Max 0.8 0.4 0.8 0.4 1.0 0.4 VDD VDD VDD VDD +10

Unit V V V V V V V V V V A

Low output voltage (2) Low output voltage (3) Low output voltage (4) High output voltage (1) High output voltage (2) High output voltage (3) High output voltage (4) Input current

VOL(2) VOL(3) VOL(4) VOH(1) VOH(2) VOH(3) VOH(4) IIN

~ SERVICE CP2, CP3 Misc.*1 IO0 to IO3 ~ SERVICE CP2, CP3 Misc.*1 *2 *3 IO4 to IO7 ~ SERVICE ~ RESET VDD VDD VDD

duty cycle = 50%

IOL = 20 mA IOL = 10 mA

IOL = 40 mA IOL = 1.4 mA IOH = 1.4 mA IOH = 1.4 mA IOH = 40 mA IOH = 1.4 mA VIN = VSS to VDD

Pull-up current

IPU

VIN = 0 V

30

300

Current (operating) Current (SLEEP mode) Low-voltage detection level

IDD(1) IDD(2) VLVD

VDD = 5.5 V (no load) VDD = 5.5 V (no load) 3.8

30 0.1 4.4

mA mA V

*1. Output voltage characteristics exclude the ~ RESET pin and CLK2 pin. *2. Excludes pull-up input pins. *3. The IO4 to IO7 and ~ SERVICE pins have programmable pull-ups. The ~ RESET pin has a fixed pull-up.

15

Neuron Chip Family

Package Dimensions
TMPN3120A20U QFP44-P-1010-0.80
Unit : mm

TMPN3150B1AF QFP64-P-1414-0.80A

Unit : mm

17.2 0.2 12.2 0.3 1.0 typ. 10.0 0.2 33 34 23 22 14.0 0.2 64 0.16
M

1.0 typ.

14.0 0.2 48 49 33 32

10.0 0.2

44 1 1.0 typ. 0.8 0.35 0.1 11

12 17 1 1.0 typ. 0.8 1.5 0.2 1.9 max 0.35 0.1 16 3.10 max 0.16
M

12.2 0.3

+0.1 0.15 0.05

2.7 0.2

17.2 0.2

0.1+0.1 0.05

0.1+0.15 0.1

+0.1 0.15 0.05

0.1 0.78 0.2 15.6 0.2

0 to 10 0.8 0.2

TMPN3120B1AM/E1M/A20M/FE3M/FE5M SOP32-P-525-1.27

Unit : mm

32

17

10.7 0.2

14.13 0.3

1 0.775 typ. 1.27 21.1 max 20.6 0.2 0.3 0.1

16 0.25
M

2.8 max

2.4 0.2

+0.1 0.15 0.05

0.1

16

0.19 0.1

(525 mil) 0.8 0.2

13.335

Service Pin
The service pin supports the following functions, convenient for network installation and maintenance. Setting the service pin low transmits the Neuron ID and program name on the network. That information is used at the following times.
To communicate with a node that does not have network configuration information. To find out the program name.

An LED can be connected to the service pin to indicate the status of the node.
Lit: The node has no valid application code. Blinks at 1/2 Hz rate: The node has application code but no network configuration information. Not lit: The node has both application code and network configuration information.

To access these input/output functions, the service pin is multiplexed between input and output by turning the N-ch open drain output ON/OFF at 76 Hz with a 50% duty cycle.

Output state ~ Service (Switch open and LED ON)

Active low

Tristate

Active low

Tristate

Active low

Tristate

Input Sampling VDD LED ~ SERVICE

Input Sampling

Input Sampling

Pull-up enable signal

Service pin input signal

Indicator signal

Figure 12. Input/Output Waveforms and Circuit for Service Pin

Reset Pin
The Neuron chip incorporates a low-voltage detector circuit. When using this circuit in conjunction with an external circuit, the external circuit may require an open-collector or open-drain low-voltage detector circuit. The external LVD must be used if Neuron chip operated at 20MHz. The reset pin has an open-drain output with an activelow input, and an internal pull-up resistor. When the reset pin is held at 0.8 V or below for at least 20 ns, the reset operation begins. The reset pin can be activated by a software reset or by output from a watchdog timer. Accordingly, this reset pin can be also reset external circuits such as a transceiver.
VDD 100 pF Reset switch ~ RESET 100 pF

Figure 13. Typical Reset Circuit

VDD

External device Typical low-voltage detector ~ RESET

Vref +

Ce: optional

Figure 14. External Reset Circuit with Low-Voltage Detector

Typical low-voltage detectors are the Mitsumi PST5xx series,the Dallas DS1xxx series and the Motorola MC3xxx series.

17

LonWorks System Development Environment

The LonWorks system can be developed using the LonBuilder dedicated development tool and a host computer (IBM PC/AT or compatible) (see Figure 15). Insert the LonBuilder dedicated I/F adapter card into the host computer for high-speed communications between the host computer and LonBuilder.

Hardware and Software for LonWorks System Development

Host computer conditions
Processor: 486 or better (Pentium recommended) Bus: 8-bit or 16-bit ISA bus-compatible Memory: At least 8 MB (at least 16 MB for Windows 95) Floppy drive: 3.5-inch 1.44-MB Hard disk capacity: At least 10 MB available space Graphics adapter: Windows-compatible Mouse: Windows-compatible OS: MS-DOS version 3.3 or later (version 6.2 or 7.0 recommended)

LonBuilder Development Tools

LonBuilder development environment (Echelon Corp.) The development environment requires combining one control processor board (with network manager and protocol analyzer functions) with at least one emulator board and router board. The development software is an integrated development environment set containing the Neuron C compiler and debugger.

LonBuilder Hardware

FTT transceiver Linked power transceiver Power line transceiver Twisted-pair transceiver I/O evaluation board

LonBuilder router
Two Neuron 3150 chips Memory Two optional transceivers

LonBuilder control processor

Two Neuron 3150 chips Network manager Protocol analyzer

Neuron emulator
Neuron 3150 chip Memory Optional transceiver Optional I/O Debugger support

LonBuilder interface adapter

LonBuilder

PC/AT-compatible machine (able to support tp to 24 emulators)

Figure 15. LonBuilder Development Environment

18

LonBuilder Software

Integrated Development Environment

Application programming tools

LonBuilder network management tools

Project manager
Uses information to manage object database node configuration and to configure application.

Program editor
Integrated editor combining the Neuron C compiler and project manager

Neuron C compiler
Neuron C cross compiler

Neuron C debugger
Neuron C cross debugger

Network manager
Manages LonWorks nodes and the network.

Protocol analyzer
Monitors the network traffic and performance and collects that information.

Miscellaneous
PROM writer with serial transfer function This is used to write to external ROM for the TMPN3150. And, when Echelon control module products are used, adaptors are needed for changing a connection from DIP package to PLCC package. because Echelon's products can support only PLCC-type EPROM or OTP (one-time PROM). Neuron 3120 programmer device (made by Echelon Corp.) The programmer device marketed by Echelon is convenient for writing application programs to the TMPN3120. Control module (made by Echelon Corp.) This is used to evaluate application programs developed on LonBuilder by writing programs to EPROM or OTP then inserting this board into the actual module.

Echelon, Neuron, LON, LonTalk, LonBuilder, LonWorks, 3150, 3120, and LonManager are registered tradmarks of Echelon Corp. Neuron Chip products are manufactured by Toshiba under licence from Echelon Corp. A "LonWorks OEM Licence Contract" must be signed by the customer and Echelon Corp. in order to purchase these Neuron Chip products. The Toshiba IC (TMPN3150/3120) is covered by a patent agreement between Toshiba Corp. and Bull CP8 Corp. and cannot be used in any "portable device" (defined below) such as an IC card. Portable Device ( ) A portable device that is within 10 mm of the width and within 3 mm of the length of devices defined in ISO 7816. ( ) A portable device that conforms to the arrangement and form of electrical contacts stipulated in Part 2 of ISO 7816. ( ) A protable, pocket-size device for identifying the person carrying the device or identifying the device itself, or for storing data on the history of the carrier or the device. BULL CP8 patent: US No. 4,382,279 Please note the following warning from Echelon Corp. when using I2C I/O objects:

PATENT NOTICE Echelon's delivery to you of the "I2C Library" does not convey nor imply a right under any I2C patent rights of Philips Electronics N.V. ("Philips") to make, use or sell any product employing such patent rights. Please refer all questions with respect to I2C patents and licenses to Philips at: Mr. H. B. Schoonheijm Corporate Patents and Trademarks Philips International B.V. P. O. Box 220 5600 MD Eindhoven The Netherlands Telephone +31 40 743479 Facsimile +31 40 743489

19

OVERSEAS SUBSIDIARIES AND AFFILIATES

Toshiba America Electronic Components, Inc.
Headquarters-Irvine, CA
9775 Toledo Way, Irvine, CA 92618, U.S.A. Tel: (949)455-2000 Fax: (949)859-3963

990219 (A)

Toshiba Electronics Europe GmbH

Dsseldorf Head Office
Hansaallee 181, D-40549 Dsseldorf Germany Tel: (0211)5296-0 Fax: (0211)5296-400

Toshiba Electronics Asia, Ltd.

Hong Kong Head Office
Level 11, Top Glory Insurance Building, Grand Century Place, No.193, Prince Edward Road West, Mong Kok, Kowloon, Hong Kong Tel: 2375-6111 Fax: 2375-0969

Altamonte Springs, FL(Orland)

600 S, North Lake Blvd., Suite 250, Altamonte Springs, FL 32701, U.S.A. Tel: (407)332-0966 Fax: (407)339-3777

Mnchen Office
Bro Mnchen Hofmannstrasse 52, D-81378, Mnchen, Germany Tel: (089)748595-0 Fax: (089)748595-42

Seoul Branch
14/F, KEC B/D, 257-7 Yangjae-dong, Seocho-ku, Seoul, Korea Tel: (02)589-4334 Fax: (02)589-4302

Deerfield, IL(Chicago)
One Pkwy., North, Suite 500, Deerfield, IL 60015-2547, U.S.A. Tel: (847)945-1500 Fax: (847)945-1044

Toshiba Electronics France SARL

Immeuble Robert Schumann 3 Rue de Rome, F-93561, Rosny-Sous-Bois, Cedex, France Tel: (1)48-12-48-12 Fax: (1)48-94-51-15

Seoul Branch, Gumi Office

6/F, Ssangyong Investment Securities B/D, 56 Songjung-Dong, Gumi City Kyeongbuk, Korea Tel: (0645)456-7613-6 Fax: (0546)456-7617

Denver, CO
8400 E, Prentice Englewood, CO 80111, U.S.A. Tel: (303)220-9848 Fax: (303)220-9856

Toshiba Electronics Italiana S.R.L.

Centro Direzionale Colleoni Palazzo Perseo Ingr. 2-Piano 6, Via Paracelso n.12, 1-20041 Agrate Brianza Milan, Italy Tel: (039)68701 Fax:(039)6870205

Beijing Office
Rm 714, Beijing Fortune Building, No.5 Dong San Huan Bei-Lu, Chao Yang District, Beijing, 100004, China Tel: (010)6590-8795 Fax: (010)6590-8791

Edison, NJ
2035 Lincoln Hwy. Ste. #3000, Edison NJ 08817, U.S.A. Tel: (908)248-8070 Fax: (908)248-8030

Irvine, CA
2 Venture Plaza, Suite 500, Irvine, CA 92718, U.S.A. Tel: (714)453-0224 Fax: (714)453-0125

Toshiba Electronics Espaa, S.A.

Parque Empresarial San Fernando Edificio Europa, a 1 Planta, ES-28831 Madrid, Spain Tel: (91)660-6700 Fax:(91)660-6799

Chengdu Office
Unit F, 18/F, 42 Wenwu Road Xinhua Avenue, Chengdu, 610017, China Tel: (028)675-1773 Fax: (028)675-1065

Microelectronics Center-Sunnyvale, CA
1220 Midas Way, Sunnyvale, CA 94088-3509, U.S.A. Tel: (408)739-0560 Fax: (408)746-0577

Shenzhen Office Toshiba Electronics(UK) Limited

Riverside Way, Camberley Surrey, GU15 3YA, U.K. Tel: (01276)69-4600 Fax: (01276)69-4800 Rm 3010-3012, Office Tower Shun Hing Square, Di Wang Commercial Centre, 333 ShenNan East Road, Shenzhen, 518008, China Tel: (0755)246-1582 Fax: (0755)246-1581

Norcross, GA(Atlanta)
655 Engineering Dr. #160, Norcross, GA 30092, U.S.A. Tel: (404)368-0203 Fax: (404)368-0075

Toshiba Electronics Scandinavia AB

Gustavslundsvgen 12, 2nd Floor S-161 15 Bromma, Sweden Tel: (08)704-0900 Fax: (08)80-8459

Toshiba Technology Development (Shanghai) Co., Ltd.

23F, Shanghai Senmao International Building, 101 Yin Cheng East Road, Pudong New Area, Shanghai, 200120, China Tel: (021)6841-0666 Fax: (021)6841-5002

Richardson, TX(Dallas)
777 East Campbell Rd., Suite 650, Richardson, TX 75081, U.S.A. Tel: (214)480-0470 Fax: (214)235-4114

Toshiba Electronics Asia (Singapore) Pte. Ltd.

Singapore Head Office
438B Alexandra Road, #06-08/12 Alexandra Technopark, Singapore 119968 Tel: (278)5252 Fax: (271)5155, (270)6056

Tsurong Xiamen Xiangyu Trading Co., Ltd.

8N, Xiamen SEZ Bonded Goods Market Building, Xiamen, Fujian, 361006, China Tel: (0592)562-3798 Fax: (0592)562-3799

Wakefield, MA(Boston)
401 Edgewater Place, Suite #360, Wakefield, Essex, MA 01880-6229, U.S.A. Tel: (617)224-0074 Fax:(617)224-1095

San Jose Engineering Center, CA

1060 Rincon Circle, San Jose, CA 95131, U.S.A. Tel: (408)456-8900 Fax: (408)456-8910

Bangkok Office
135 Moo 5 Bangkadi Industrial Park, Tivanon Rd., Bangkadi Amphur Muang Pathumthani 12000, Thailand Tel: (2)501-1635 Fax: (2)501-1638

Toshiba Electronics Taiwan Corporation

Taipei Head Office
17F, Union Enterprise Plaza Bldg. 109 Min Sheng East Rd., Section 3, 0446 Taipei, Taiwan R.O.C. Tel: (02)514-9988 Fax: (02)514-7892

Toshiba Electronics Trading (Malaysia)Sdn. Bhd.

Kuala Lumpur Head Office
Suite W1203, Wisma Consplant, No.2, Jalan SS 16/4, Subang Jaya, 47500 Petaling Jaya, Selangor Darul Ehsan, Malaysia Tel: (3)731-6311 Fax: (3)731-6307

Kaohsiung Office
16F-A, Chung-Cheng Bldg., Chung-Cheng 3Rd., 80027, Kaohsiung, Taiwan R.O.C. Tel: (07)222-0826 Fax: (07)223-0046

Penang Office
Suite 13-1, 13th Floor, Menard Penang Garden, 42-A, Jalan Sultan Ahmad Shah, 100 50 Penang, Malaysia Tel: 4-226-8523 Fax: 4-226-8515
The information contained herein is subject to change without notice. The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of TOSHIBA or others. TOSHIBA is continually working to improve the quality and the reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to observe standards of safety, and to avoid situations in which a malfunction or failure of a TOSHIBA product could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent products specifications. Also, please keep in mind the precautions and conditions set forth in the TOSHIBA Semiconductor Reliability Handbook. The products described in this document are subject to the foreign exchange and foreign trade laws.

Toshiba Display Devices (Thailand) Co., Ltd.

142 Moo 5, Bangkadi Industrial Park, Tivanon Rd., Pathumthani 12000, Thailand Tel: (2)501-1200 Fax: (2)501-1209

Electronic Devices Sales & Marketing Group

1-1, Shibaura 1-chome, Minato-ku, Tokyo, 105-8001, Japan Tel: (03)3457-3405 Fax: (03)5444-9324

Website: http://doc.semicon.toshiba.co.jp/indexus.htm
1999 TOSHIBA CORPORATION Printed in Japan