INSTITUTE OF TECHNOLOGY DEPARTMENT OF ELECTRICAL

OF CAMBODIA AND ENERGY ENGINEERING

DIGITAL ELECTRONIC
GROUP: I3-GEE-C (2)

TP 05: “Encoder/Decoder & Implementation Decoder FPGA Board”

LECTUREED BY: Mrs. SENG DARARAKSMEY

Student name and ID:

1. SENG SOMAKARIN e20200450
2. SEUM PUTHEA RA e20200087
3. SOCHEA LYOUY e20200224
4. SENG VEASNA e20200712
5. SENG SAMNEANG e20201051

DEPARTMENT OF ELECTRONIC AND ENERGY ENGINEERING

INSTITUTE OF TECHNOLOGY OF CAMBODIA

PHNOM PENH

Academic Year 2022-2023

LAB 5: ENCODER/DECODER
& IMPLEMENTATION
DECODER FPGA BOARD
1.OBJECTIVE
After completing this laboratory, students should be able to:
➢ Know the basic operation of the decoder
➢ Design a logic circuit to decode any combination of bits
➢ Understand the operation of the binary-to-decimal decoder
➢ Understand the operation of the BCD-to-decimal decoder
➢ Understand the operation of the BCD-to-7-Segment decoder
➢ Understand the operation of the Decimal-to-BCD decoder
➢ The objective of the Laboratory is to introduce students to the way to program
their project on the FPGA board.

2.DECODER
A decoder is a digital circuit that detects the presence of a specified combination of
bits (code) on its inputs and indicates the presence of that code by the specified
output level. An example of the basic binary encoder is explained as follows.

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Suppose you need to determine when the binary 1001 occurs on the inputs of a
digital circuit. You can represent this output which indicates the truth condition
when inputs are 1001 as “X”. We got the relation between inputs and output as
shown in the figure below (Suppose X is active-HIGH output).

2.1The 4-bit binary-to-decimal decoder

To decode all possible combinations of 4 bits, 16 decoding gates are required.
This type of decoder is commonly called a 4-line-to-16-line decoder because there
are 4 inputs and 16 outputs or a 1-of-16 decoder because, for any given code for
the inputs, one of the 16 outputs is activated. The decoding function and truth table
for this kind of decoder with active-Low output are shown in the below table.

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FIGURE 1: BINARY-TO-DECIMAL DECODER WITH ACTIVE-LOW OUTPUTS

Practice
a. Explain the differences between the active-LOW and active-HIGH outputs of
the decoder.
The main difference between active-LOW and active-HIGH outputs of a
decoder is the logic level that indicates that the output is active. In an active-LOW

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decoder, the output is active when it is at a logic LOW level. This means that the
output will be high when the input is low, and low when the input is high. In an
active-HIGH decoder, the output is active when it is at a logic HIGH level. This
means that the output will be low when the input is low, and high when the input is
high.
b. Implementing and simulate the decoder above in the software Quartus Prime.

FIGURE 2:CONNETING BLOCK BINARY TO DECIMAL DECODER

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FIGURE 3:WAVEFORM’S 4-BIT BINARY-TO-DECIMAL DECODER

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2.2The BCD-to-Decimal Decoder
The BCD-to-decimal decoder converts each BCD code (8421 code) into one of ten
possible decimal digit indications. It is frequently referred to as a 4-line-to-10-line
decoder or 1-of-10 decoder.

Practice
a. Implement the BCD-to-Decimal decoder in Quartus Prime and verify with the
input waveform below.

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FIGURE 4:CONNETING LOGIC CIRCUIT OF BCD-TO-DECIMAL DECODER

FIGURE 6: WAVEFORM’S BCD-TO-DECIMAL

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The BCD-to-7-Segment Decoder
The BCD-to-7-Segment decoder accepts the BCD code on its input and provides
outputs to drive 7-segment display devices to produce a decimal readout. The logic
diagram for a basic 7-segment decoder is shown in Figure below

Practice
a.

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b. Make a truth table for the operation of the BCD-to-7-segment decoder with
common anode 7-Segment display as shown in Figure above.
Decimal A0 A1 A2 A3 a b c d e f g Display
Digital
0 0 0 0 0 1 1 1 1 1 1 0 0
1 0 0 0 1 0 1 1 0 0 0 0 1
2 0 0 1 0 1 1 0 1 1 0 1 2
3 0 0 1 1 1 1 1 1 0 0 1 3
4 0 1 0 0 0 1 1 0 0 1 1 4
5 0 1 0 1 1 0 1 1 0 1 1 5
6 0 1 1 0 1 0 1 1 1 1 1 6
7 0 1 1 1 1 1 1 0 0 0 0 7
8 1 0 0 0 1 1 1 1 1 1 1 8
9 1 0 0 1 1 1 1 1 0 1 1 9

c. Implement and simulate using Quartus Prime.

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3. Encoder
An Encoder is a combinational logic circuit that essentially performs a “reverse”
decoder function. An encoder accepts an active level on one of its inputs
representing a digit, such as a decimal or octal digit, and converts it to a coded output,
such as BCD or binary. Encoder can also be devised to encode various symbols and
alphabetic characters. The process of converting from familiar symbols or numbers
to a coded format is called encoding

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The Decimal-to-BCD Encoder
This type of encoder has 10 inputs, one for each decimal digit, and 4 outputs
corresponding to the BCD code. This is called a 10-line-to-4-line decoder

Practice
a. Implement and simulate the Decimal-to-BCD encoder using Quartus Prime

FIGURE 5:BLOCK DECIMAL-TO-BCD ENCODER

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Discussion: The waveform shows a decimal-to-BCD encoder implemented. The
encoder has 10 input lines, one for each decimal digit, and 4 output lines, which
correspond to the BCD code for the decimal digit. The waveform shows the output
of the encoder for the decimal 11 digits 0 to 9. For example, when the input is 0, the
output of the encoder is 0000. When the input is 1, the output of the encoder is 0001,
and so on..
4. Implementation Decoder
FPGA Board a. Component
The following component will be used:
➢ Breadboard
➢ Male-to-female jumper wires
➢ ALTERA Cyclone IV board (EP4CE22F17C6)
Process A 4-bit adder will be used as an example.
Step 1: Board setup (Install the driver and establish a connection)
This step is only needed the first time you connect the FPGA board to your PC.
You need to:

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Right-click on Alter USB-Blaster and Choose Update.

After drivers are updated, the connection will be established between the PC and
the board.
Note: Driver location depends on the location of your installed software.
Step 2: Device selection In this step, you need to open your project which is
already simulated (Project Adder).

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Right-click on the name of the device (Ex: Cyclone V) and then change it to the
kind of board you need to use.

Choose “Cyclone IV E” in the Family device. And Write “EP4CE22F17C6”

(Lowercase is also OK) in the Name filter in order to filter your specific device
which needed to use.
Step 3: Pin assignment
In this step, you need to know the location of each pin that connected any
input/output or LED on the board. You need to read the User manual of this board
(DE0_Nano_User_Manual.pdf) to find all port need to be used.

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Step 4: Compiling the project Go to Processing → Start Compilation. And wait until you got as
in the figure below.

Practice: a. Implement BCD-to-7-Segment decoder on Altera FPGA board by

using 4 GPIO as inputs and 7 GPIO as outputs which are connected to 7 inputs of
7-Segment display.

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 5. CONCLUSION
after completed the experiment it shown that encoders and decoders are important
components in many electronic systems and he implementation of the decoders on FPGA boards
is a relatively straightforward process and can be used to improve the reliability of transmission
data.

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