Kaduna State University

Department of Computer Science

CSC 205: Computer Architecture and Organization

by

Dr. Muhammad Aminu Ahmad

Aliyu Uba Taura

© 2021
 Basic Concepts and Computer Evolution
Organization and Architecture
The study of Computer Architecture is the study of the organization and
interconnection of components of computer systems. Computer architects
construct computers from basic buildings blocks such as memories, arithmetic
units and buses.
Ø Computer Architecture refers to those attributes of a system that have a
direct impact on the logical execution of a program. Examples:
– Control signals
– the instruction set
– the number of bits used to represent various data types
– I/O mechanisms
– memory addressing techniques
Ø Computer Organization refers to the operational units and their
interconnections that realize the architectural specifications. Examples are
things that are transparent to the programmer:
– Control signals
– Interfaces between computer and peripherals
– The memory technology being used
Structure and Function
We begin with the major components of a computer, describing their structure
and function, and proceed to successively lower layers of the hierarchy. The
remainder of this section provides a very brief overview of this plan of attack.

Function: The operation of each individual component as part of the structure.

Both the structure and functioning of a computer are, in essence, simple. In general
terms, there are only four basic functions that a computer can perform:
▪ Data processing
▪ Data storage
▪ Data movement
▪ Control
Structure:The way in which the components are interrelated.
We now look in a general way at the internal structure of a computer. We begin
with a traditional computer with a single processor that employs a micro
programmed control unit, then examine a typical multicore structure. SIMPLE
SINGLE-PROCESSOR COMPUTER Figure 1 provides a hierarchical view of the
internal structure of a traditional single-processor computer. There are four main
structural components:

Figure 1 The Computer: Top-Level Structure

Central processing unit (CPU): Controls the operation of the computer and
performs its data processing functions; often simply referred to as processor.
Main memory: Stores data.
I/O: Moves data between the computer and its external environment.
System interconnection: Some mechanism that provides for communication
among CPU, main memory, and I/O. A common example of system
interconnection is by means of a system bus, consisting of a number of
conducting wires to which all the other components attach.
Control unit: Controls the operation of the CPU and hence the computer.
Arithmetic and logic unit (ALU): Performs the computer’s data processing
functions.
Registers: Provides storage internal to the CPU.
CPU interconnection: Some mechanism that provides for communication
among the control unit, ALU, and registers.
The First Generation Computer: Vacuum Tubes

The first generation of computers used vacuum tubes for digital logic elements
and memory. A number of research and then commercial computers were built
using vacuum tubes. For our purposes, it will be instructive to examine perhaps
the most famous first-generation computer, known as the IAS computer.

A fundamental design approach first implemented in the IAS computer is known

as the stored-program concept. This idea is usually attributed to the
mathematician John von Neumann. Alan Turing developed the idea at about the
same time. The first publication of the idea was in a 1945 proposal by von
Neumann for a new computer, the EDVAC (Electronic Discrete Variable
Computer).

In 1946, von Neumann and his colleagues began the design of a new stored-
program computer, referred to as the IAS computer, at the Princeton Institute for
Advanced Studies. The IAS computer, although not completed until 1952, is the
prototype of all subsequent general-purpose computers.

A conventional computer, traditionally called a von Neumann machine, consists

of an ALU—where numbers are operated on a control unit, responsible for
instruction fetch and execute, and a memory— arranged as a linear array of fixed-
size cells or words—where data and instructions are stored.

Data and instructions are stored in a single read-write memory.

The contents of this memory are addressable by location, without regard to the
type of data contained there.

Execution occurs in a sequential fashion (unless explicitly modified) from one

instruction to the next.

With rare exceptions, all of today’s computers have this same general structure
and function and are thus referred to as von Neumann machines.

Thus, it is worthwhile at this point to describe briefly the operation of the IAS
computer. the terminology and notation of von Neumann are changed in the
following to conform more closely with modern usage.

The memory of the IAS consists of 1000 storage locations, called words, of 40
binary digits (bits) each. Both data and instructions are stored there. Numbers are
represented in binary form, and each instruction is a binary code. A word may
also contain two 20-bit instructions, with each instruction consisting of an 8- bit
operation code (opcode) specifying the operation to be performed and a 12-bit
address designating one of the words in memory (numbered from 0 to 999).

Figure 2 Von Neumann Machine

The control unit operates the IAS by fetching instructions from memory and
executing them one at a time. the control unit and the ALU contain storage
locations, called registers, defined as follows:
 Figure 3 IAS Structure

Memory buffer register (MBR): Contains a word to be stored in memory or

sent to the I/O unit, or is used to receive a word from memory or from the I/O
unit.

Memory address register (MAR): Specifies the address in memory of the word
to be written from or read into the MBR.

Instruction register (IR): Contains the 8-bit opcode instruction being executed.

Instruction buffer register (IBR): Employed to hold temporarily the right hand
instruction from a word in memory.

Program counter (PC): Contains the address of the next instruction-pair to be

fetched from memory.

Accumulator (AC) and multiplier quotient (MQ): Employed to hold

temporarily operands and results of ALU operations. For example, the of
multiplying two 40-bit numbers is an 80-bit number; the most significant 40 bits
are stored in the AC and the least significant in the MQ.

The IAS computer had a total of 21 instructions, which are listed in Table 1
below. These can be grouped as follows:

Data transfer: Move data between memory and ALU registers or between two
ALU registers.

Unconditional branch: Normally, the control unit executes instructions in

sequence from memory. This sequence can be changed by a branch instruction,
which facilitates repetitive operations.

Conditional branch: The branch can be made dependent on a condition, thus

allowing decision points.

Arithmetic: Operations performed by the ALU.

Address modify: Permits addresses to be computed in the ALU and then inserted
into instructions stored in memory. This allows a program considerable
addressing flexibility.
 Table 1 The IAS Instruction Set

The Second Generation: Transistors

The first major change in the electronic computer came with the replacement of
the vacuum tube by the transistor. The transistor, which is smaller, cheaper, and
generates less heat than a vacuum tube, can be used in the same way as a vacuum
tube to construct computers. Unlike the vacuum tube, which requires wires, metal
plates, a glass capsule, and a vacuum, the transistor is a solid-state device, made
from silicon.

The Third Generation: Integrated Circuits

A single, self-contained transistor is called a discrete component. Throughout the

1950s and early 1960s, electronic equipment was composed largely of discrete
components—transistors, resistors, capacitors, and so on. Discrete components
were manufactured separately, packaged in their own containers, and soldered or
wired together onto Masonite-like circuit boards, which were then installed in
computers, oscilloscopes, and other electronic equipment.

Later Generations

Beyond the third generation there is less general agreement on defining

generations of computers. Table 2 suggests that there have been a number of later
generations, based on advances in integrated circuit technology. With the
introduction of large- scale integration (LSI), more than 1,000 components can
be placed on a single integrated circuit chip. Very-large-scale integration (VLSI)
achieved more than 10,000 components per chip, while current ultra-large-scale
integration (ULSI) chips can contain more than one billion components.

Table 2 Computer Generations

Embedded Systems: The term embedded system refers to the use of electronics
and software within a product, as opposed to a general-purpose computer, such
as a laptop or desktop system. Types of devices with embedded systems are
almost too numerous to list. Examples include cell phones, digital cameras, video
cameras, calculators, micro- wave ovens, home security systems, washing
machines, lighting systems, thermostats, printers, various automotive systems
(e.g., transmission control, cruise control, fuel injection, anti-lock brakes, and
suspension systems), tennis rackets, toothbrushes, and numerous types of sensors
and actuators in automated systems.
Figure 4 Organization of an Embedded System
 Computer System
At a top level, a computer consists of CPU (central processing unit), memory,
and I/O components, with one or more modules of each type. These components
are interconnected in some fashion to achieve the basic function of the computer,
which is to execute programs. Thus, at a top level, we can characterize a computer
system by describing (1) the external behavior of each component, that is, the
data and control signals that it exchanges with other components, and (2) the
interconnection structure and the controls required to manage the use of the
interconnection structure.

Bus Interconnection
A bus is a communication pathway connecting two or more devices. A key
characteristic of a bus is that it is a shared transmission medium. Multiple devices
connect to the bus, and a signal transmitted by any one device is available for
reception by all other devices attached to the bus. If two devices transmit during
the same time period, their signals will overlap and become garbled. Thus, only
one device at a time can successfully transmit. Typically, a bus consists of
multiple communication pathways, or lines. Each line is capable of transmitting
signals representing binary 1 and binary 0. Over time, a sequence of binary digits
can be transmitted across a single line.

Data lines provide a path for moving data among system modules. These lines,
collectively, are called the data bus.

Address lines are used to designate the source or destination of the data on the
data bus. For example, if the processor wishes to read a word (8, 16, or 32 bits)
of data from memory, it puts the address of the desired word on the address lines.
Clearly, the width of the address bus determines the maximum possible memory
capac- ity of the system.

Control lines are used to control the access to and the use of the data and address
lines. Because the data and address lines are shared by all components, there must
be a means of controlling their use. Control signals transmit both com- mand and
timing information among system modules. Timing signals indicate the validity
of data and address information. Command signals specify operations to be
performed. Typical control lines include:

▪ Memory write: causes data on the bus to be written into the addressed
location.
▪ Memory read: causes data from the addressed location to be placed on the
bus.
▪ I/O write: causes data on the bus to be output to the addressed I/O port.
▪ I/O read: causes data from the addressed I/O port to be placed on the bus.
▪ Transfer ACK: indicates that data have been accepted from or placed on the
bus.
▪ Bus request: indicates that a module needs to gain control of the bus.
▪ Bus grant: indicates that a requesting module has been granted control of the
bus.
▪ Interrupt request: indicates that an interrupt is pending.
▪ Interrupt ACK: acknowledges that the pending interrupt has been recognized.

▪ Clock: is used to synchronize operations.

▪ Reset: initializes all modules.

Figure 5 Bus Interconnection Scheme

Peripheral Component Inter-connect (PCI) is a popular high-bandwidth,

processor-independent bus that can function as a mezzanine or peripheral bus.
Compared with other common bus specifications, PCI delivers better system
performance for high-speed I/O subsystems (e.g., graphic display adapters,
network inter- face controllers, and disk controllers).

PCI Express, abbreviated to PCIe, is a bi-directional differential signaling

serial bus used primarily to connect communication endpoints on computer
motherboards. PCIe performance is expressed in billions of transfers per
second, or GT/s. One "transfer" is a single bit propagated across the bus from
transmitter to receiver.
 Table 3 PCI Express generations

Serial AT Attachment (SATA) : is a bi-directional serial interface standard for

connecting computer motherboards to storage devices. The "AT" in SATA refers
to the original IBM PC AT. Similar to a single PCIe lane, SATA contains two
differential signaling pairs of conductors, with one pair carrying data in each
direction. Unlike PCIe, SATA is intended for operation over cables rather than
using signal traces on motherboards.

Universal Serial Bus (USB) : interface provides a simple (from the user's
viewpoint) interface for connecting a wide variety of peripheral devices to a
computer system. USB cables have easily identifiable connector types and
support hot-plugging (plugging devices together while powered on). USB devices
are self-configuring, and, in most cases, users do not need to concern themselves
with installing device drivers when attaching a new device to a computer with a
USB cable.

Table 4 USB generations

Thunderbolt : is a collection of high-speed serial interface standards introduced

in 2011. The original Thunderbolt interface combined PCIe and DisplayPort
signal transmission using two serial Thunderbolt lanes.