TTI2D3 CLO2 M9 M10 Combinational Logic-HBL

Teknik Digital
Instructor : Team Teaching

Course Number : TTI2D3
As Taught In : 4th semester
Level : Undergraduate
see.telkomuniversity.ac.id
Course Description
• Students learn logic function and how to simplify it using Boolean Algebra and K-
Map;
• Students able to design combinational logic and how to simplify;
• Students learn binary numeric system and its arithmetic operation;
• Students able to analyze and design a sequential machine;
• Students able to use application tool to design logic circuit.
→ Divided into 2 CLOs (Course Learning Objective)
Course Objectives
CLO#1 Student have the knowledge to design combinational logic and how to simplify
it
• Understand logic function
• Understand Boolean Algebra
• Understand K-Map
• Understand arithmetic operation using binary system
CLO#2 Student have the knowledge to design finite state machine

• Understand special function combinational logic
• Understand flip-flop as memory
• Understand Finite State Machine
Outline
Understand how to use special function

combinational logic:
• Adder
• Multiplexer – demultiplexer
• Encoder – decoder
Logic Circuit
Logic Circuit
Combinational Sequential
Synchronous (clock) Asynchronous
Fundamental Pulse mode
Combinational Logic
• In combinational logic, the value of the output depends only with the input (no
feedback)
• Input change → output change (after some delay)
BLOCK DIAGRAM :
I0 Y0
I1 Y1
Rangkaian In-1 – I0 Rangkaian
I2 Logika Y2 Logika Ym-1 – Y0
. Kombinasional . n Kombinasional m
. .
. .
In-1 Ym-1
a. Complete I/O notation b. Abridged I/O notation
Combinational Logic
• Analysis
– Given the circuit, we can determine the function
– Function can be explained using: A
B
C
F1
?
• Boolean approach
A
B
C
A
B
A
?
• Truth Table approach
F2
C
B
C
• Design/Synthesis
– Given the function, we can determine the circuit
– Function can be explained using:
• Boolean approach ?
7
Analysis Procedure
• Boolean Approach
A
B
F1
C T2=ABC
A T1=A+B+C
B T3=AB'C'+A'BC'+A'B'C
C
A
B F’2=(A’+B’)(A’+C’)(B’+C’)
A
F2
C
F2=AB+AC+BC
B F1=AB'C'+A'BC'+A'B'C+ABC
C
F2=AB+AC+BC
8
Analysis Procedure
A =0 0
B =0 0
F1 A B C F1 F2
C =0
0 0 0 0 0
A =0 0
B =0 0
C =0
1
A =0 0
B =0
A =0 0 0
F2
C =0
B =0 0
C =0
9
Analysis Procedure
A =0 0
B =0 1
F1 A B C F1 F2
C =1
0 0 0 0 0
A =0 1
B =0 1 0 0 1 1 0
C =1
1
A =0 0
B =0
A =0 0 0
F2
C =1
B =0 0
C =1
10
Analysis Procedure
A =0 0
B =1 1
F1 A B C F1 F2
C =0
0 0 0 0 0
A =0 1
B =1 1 0 0 1 1 0
C =0 0 1 0 1 0
1
A =0 0
B =1
A =0 0 0
F2
C =0
B =1 0
C =0
11
Analysis Procedure
A =0 0 0
B =1
F1 A B C F1 F2
C =1
0 0 0 0 0
A =0 1
B =1 0 0 0 1 1 0
C =1 0 1 0 1 0
0
A =0 0 0 1 1 0 1
B =1
A =0 0 1
F2
C =1
B =1 1
C =1
12
Analysis Procedure
A =1 0
B =0 1
F1 A B C F1 F2
C =0
0 0 0 0 0
A =1 1
B =0 1 0 0 1 1 0
C =0 0 1 0 1 0
1
A =1 0 0 1 1 0 1
B =0
1 0 0 1 0
A =1 0 0
F2
C =0
B =0 0
C =0
13
Analysis Procedure
A =1 0
B =0 0
F1 A B C F1 F2
C =1
0 0 0 0 0
A =1 1
B =0 0 0 0 1 1 0
C =1 0 1 0 1 0
0
A =1 0 0 1 1 0 1
B =0
1 0 0 1 0
A =1 1 1
C =1
F2 1 0 1 0 1
B =0 0
C =1
14
Analysis Procedure
A =1 0 0
B =1
F1 A B C F1 F2
C =0
0 0 0 0 0
A =1 1
B =1 0 0 0 1 1 0
C =0 0 1 0 1 0
0
A =1 1 0 1 1 0 1
B =1
1 0 0 1 0
A =1 0 1
C =0
F2 1 0 1 0 1
1 1 0 0 1
B =1 0
C =0
15
Analysis Procedure
• Truth Table approach A B C F1 F2
A =1 0 0 0 0 0
1 1
B =1 0 0 1 1 0
F1
C =1
A =1
0 1 0 1 0
1 0
B =1 0 1 1 0 1
C =1 1 0 0 1 0
0
A =1 1
B =1
1 0 1 0 1
1 1 0 0 1
A =1 1 1
C =1
F2 1 1 1 1 1
B =1 1 F BC BC
C =1
00 01 11 10 00 01 11 10
A A
0 1 0 1 0 0 0 1 0
0
1 1 0 1 0 1 0 1 1 1
F1=AB'C'+A'BC'+A'B'C+ABC F2=AB+AC+BC
16
Design Procedure
1. Determine input and output
2. Determine the function
3. Create Truth Table
4. Simplify (using Boolean Algebra or K-Map)
5. Determine the simple function
6. Create the logical circuit
17
Half Adder
half adder (HA), add 2 bits A and B to create sum and
carry. Carry represent overflow of the addition
A B Carry Sum
0 0 0 0
0 1 0 1
1 0 0 1
1 1 1 0
Carry Sum A
Sum Carry Carry
B B B
A 0 1 A 0 1
0 0 0 0 0 1
Sum
1 0 1 1 1 0
Sum = A . B Carry = AB + AB 18
Full Adder
Sum
A B Cin Sum Cout AB
Cin 00 01 11 10
0 0 0 0 0
0 0 1 0 1
0 0 1 1 0
1 1 0 1 0
0 1 0 1 0
0 1 1 0 1 Cout Sum = A  B  Cin
AB
1 0 0 1 0 Cin 00 01 11 10
1 0 1 0 1 0 0 0 1 0
1 1 0 0 1 1 0 1 1 1
1 1 1 1 1
Cout = AB + ACin + BCin
19
Binary Adder
x3x2x1x0 y3y2y1y0
c3 c2 c1 .
+ x3 x2 x1 x0
+ y3 y2 y1 y0
Cy Binary Adder C0 ────────
Carry Cy => S3 S2 S1 S0
Propagate
S3S2S1S0 Addition
x3 x2 x1 x0
y3 y2 y1 y0
0
FA FA FA FA
C4 C3 C2 C1
S3 S2 S1 S0
Multiplexer
• Multiplexer has several inputs, selector, and only 1 output

• Multiplexer forward one specific input to output based on the
value of the selector
21
Multiplexer
• The value of “y” correspond to a specific “x” (x0

... x7) based on the value of selector (s0 ... s2)
22
Demultiplexer
• Is the opposite of multiplexer, has only 1 input, selector, and

several outputs
• Place the value of input to a specific output, based on the value of
the selector
23
Demultiplekser
• Input a is placed to a specific “y” (y0 ... y3)

based on the selector’s value (s0 and s1)
24
Decoder
• Decoder has input(s) and output(s)
• Is to transform a specific input code into a
specific output code
X Y
X = (x1, x2, …. xm) , Y = (y1, y2, … yn) ; usually m<n
25
Example: Binary Decoder (m to 2m)
• Input is read as binary

• One specific output is on based on the value of
input Only one output
is active at one
time
26
Encoder
• Encoder has input(s) and output(s)
• Is to transform a specific input code into a
specific output code
X Y
X = (x1, x2, …. xm) , Y = (y1, y2, … yn) ; usually m>n
27
Example: Binary Encoder (2n ke n)
• Binary encoder from one specific input to

binary version for the output
Only one input is
active at one time
28
LED 7 Segment
• Every input (a, b, c, d, e, f, g) control only 1 LED

• Has 128 combinations but only 10 symbols used (0 ... 9)
• Has 2 types: Common Anode (CA) and Common Cathode (CC)
Task: explain the benefit of each CA and CC

29
BCD to Seven Segment Decoder
3 State Output
Has 3 possiblity output state
• HIGH Vout ~ 5 volt
• LOW Vout ~ 0 volt
• OPEN (high impedance) Vout = floating
A Y
Logic 1 Logic 0 Logic ?

31
3 State Buffer
• Input “select”
activates all
gates
32
Bidirectional 3 State Buffer
• Input
“direction”
determines
either:
A → B or
B→A
33
See You on Next Class

TTI2D3 CLO2 M9 M10 Combinational Logic-HBL

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Teknik Digital

Instructor : Team Teaching

→ Divided into 2 CLOs (Course Learning Objective)

CLO#2 Student have the knowledge to design finite state machine

Understand how to use special function

Synchronous (clock) Asynchronous

Fundamental Pulse mode

a. Complete I/O notation b. Abridged I/O notation

• Multiplexer has several inputs, selector, and only 1 output

• The value of “y” correspond to a specific “x” (x0

• Is the opposite of multiplexer, has only 1 input, selector, and

• Input a is placed to a specific “y” (y0 ... y3)

X = (x1, x2, …. xm) , Y = (y1, y2, … yn) ; usually m<n

• Input is read as binary

X = (x1, x2, …. xm) , Y = (y1, y2, … yn) ; usually m>n

• Binary encoder from one specific input to

• Every input (a, b, c, d, e, f, g) control only 1 LED

Task: explain the benefit of each CA and CC

Logic 1 Logic 0 Logic ?

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