8086 Register Organization

RISC vs CISC
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Architecture
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Bus Interface Unit (BIU)
BIU fetches instructions, reads data from memory and I/O ports, writes data to
memory and I/ O ports.
Execution Unit (EU)

EU executes instructions that have already been fetched by the BIU.
BIU and EU functions separately.
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Register Organization of 8086
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8086 Microprocessor Architecture Execution Unit (EU)
EU Accumulator Register (AX)

Registers
Consists of two 8-bit registers AL and AH, which can be
combined together and used as a 16-bit register AX.
AL in this case contains the low order byte of the word,

and AH contains the high-order byte.
The I/O instructions use the AX or AL for inputting /

outputting 16 or 8 bit data to or from an I/O port.
Multiplication and Division instructions also use the AX or

AL.
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EU Base Register (BX)

Registers
Consists of two 8-bit registers BL and BH, which can be
combined together and used as a 16-bit register BX.
BL in this case contains the low-order byte of the word,

and BH contains the high-order byte.
This is the only general purpose register whose contents

can be used for addressing the 8086 memory.
All memory references utilizing this register content for

addressing use DS as the default segment register.
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EU Counter Register (CX)

Registers
Consists of two 8-bit registers CL and CH, which can be
combined together and used as a 16-bit register CX.
When combined, CL register contains the low order byte of

the word, and CH contains the high-order byte.
Instructions such as SHIFT, ROTATE and LOOP use the

contents of CX as a counter.
Example:
The instruction LOOP START automatically decrements

CX by 1 without affecting flags and will check if [CX] =
0.
If it is zero, 8086 executes the next instruction;

otherwise the 8086 branches to the label START.
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EU
Registers
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Auxiliary Carry Flag Carry Flag
This is set, if there is a carry from the
Flag Register lowest nibble, i.e, bit three during
This flag is set, when there is a
carry out of MSB in case of
addition, or borrow for the lowest nibble, addition or a borrow in case of
i.e, bit three, during subtraction. subtraction.
Sign Flag Zero Flag Parity Flag
This flag is set, when the This flag is set, if the result of This flag is set to 1, if the lower
result of any computation the computation or comparison byte of the result contains even
is negative performed by an instruction is number of 1’s ; for odd number
zero of 1’s set to zero.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
OF DF IF TF SF ZF AF PF CF
Over flow Flag Tarp Flag

This flag is set, if an overflow occurs, i.e, if the result of a signed If this flag is set, the processor enters
operation is large enough to accommodate in a destination register. The the single step execution mode by
result is of more than 7-bits in size in case of 8-bit signed operation and generating internal interrupts after
more than 15-bits in size in case of 16-bit sign operations, then the the execution of each instruction
overflow will be set.
Direction Flag Interrupt Flag
This is used by string manipulation instructions. If this flag bit is ‘0’, the Causes the 8086 to recognize external
string is processed beginning from the lowest address to the highest address, mask interrupts; clearing IF disables
i.e., auto incrementing mode. Otherwise, the string is processed from the these interrupts.
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highest address towards the lowest address, i.e., auto incrementing mode.
8086 Microprocessor Architecture
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
OF DF IF TF SF ZF AF PF CF
Sl.No. Type Register width Name of register

1 General purpose register 16 bit AX, BX, CX, DX
8 bit AL, AH, BL, BH, CL, CH, DL, DH
2 Pointer register 16 bit SP, BP
3 Index register 16 bit SI, DI
4 Instruction Pointer 16 bit IP
5 Segment register 16 bit CS, DS, SS, ES
6 Flag (PSW) 16 bit Flag register

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8086 Microprocessor Architecture Registers and Special Functions
Register Name of the Register Special Function
AX 16-bit Accumulator Stores the 16-bit results of arithmetic and logic operations
AL 8-bit Accumulator Stores the 8-bit results of arithmetic and logic operations
BX Base register Used to hold base value in base addressing mode to access
memory data
CX Count Register Used to hold the count value in SHIFT, ROTATE and LOOP
instructions
DX Data Register Used to hold data for multiplication and division operations
SP Stack Pointer Used to hold the offset address of top stack memory
BP Base Pointer Used to hold the base value in base addressing using SS register to
access data from stack memory
SI Source Index Used to hold index value of source operand (data) for string
instructions
DI Data Index Used to hold the index value of destination operand (data) for
string operations 14

8086 Register Organization

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RISC vs CISC

Execution Unit (EU)

BIU and EU functions separately.

EU Accumulator Register (AX)

AL in this case contains the low order byte of the word,

The I/O instructions use the AX or AL for inputting /

Multiplication and Division instructions also use the AX or

EU Base Register (BX)

BL in this case contains the low-order byte of the word,

This is the only general purpose register whose contents

All memory references utilizing this register content for

EU Counter Register (CX)

When combined, CL register contains the low order byte of

Instructions such as SHIFT, ROTATE and LOOP use the

The instruction LOOP START automatically decrements

If it is zero, 8086 executes the next instruction;

Over flow Flag Tarp Flag

Sl.No. Type Register width Name of register

8 bit AL, AH, BL, BH, CL, CH, DL, DH

2 Pointer register 16 bit SP, BP

3 Index register 16 bit SI, DI

4 Instruction Pointer 16 bit IP

5 Segment register 16 bit CS, DS, SS, ES

6 Flag (PSW) 16 bit Flag register

Register Name of the Register Special Function

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