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March 2008 Paper 2

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MARCH 2008, DIGITAL ELECTRONICS, PAPER 2

Ques 1 (A): Select correct alternative and rewrite the following sub question – (4 Marks)
a) The equivalent decimal number of a maximum highest binary number of length one byte is
______
(i) 128 (ii) 127 (iii) 255 (iv) 256

b) An AND gate in positive logic becomes ________ gate in negative logic.


(i) OR (ii) NOR (iii) NOT (iv) NAND

c) Shift Register belongs to the class of __________________


Combinational logic Sequential logic
(i) (ii) (iii) Both i) and ii) (iv) None of the above
circuit circuit

d) In a _________ type ADC, more than one comparators are used.


Successive
(i) (ii) Simultaneous (iii) Counter (iv) None of the above
Approximation

Ques 1 (B): Attempt any TWO of the following – (6 Marks)


a) Subtract the following numbers by using 2s complement method :
o m
i) (11011)2 – (011)2
b) Convert the following :
i) (11011)2 = (?)10
ii) (10111)2 – (110001)2

ii) (F6.C9)16 = (?)2


s . c
iii) (110 110 110. 110)2 = (?)16
Ques 2 (A): Attempt any TWO of the following –

p l u (6 Marks)

only?
s h
a) What are Universal Building Blocks ? How the basic gates are constructed using NOR gates

expression.
. a
b) Simplify the following: Y = ABC + ABC +ABC, Draw the logic diagram for simplified

y
c) Explain the working of clocked SR flip-flop using NAND gates.

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Ques 2 (B): Attempt any ONE of the following – (4 Marks)

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a) Define radix or base of a number system. Explain with suitable example Hex-dabble method
used for converting decimal number to hexadecimal number.
b) What are the various codes used in digital system?
What is their necessity? How many possible combinations are there in each code?

Ques 3 (A): Attempt any TWO of the following – (6 Marks)


a) Explain the following parameters of digital ICs:
i) Propagation delay ii) Fan out iii) Figure of merit.
b) Explain the working of CMOS NOR gate with diagram.
c) Explain the working 1:4 demultiplexer using logic gates.
Ques 3 (B): Attempt any ONE of the following – (4 Marks)
a) State and prove De Morgan’s Theorems.
b) Define full adder. Draw a logic diagram of full adder. Write its Boolean equations and truth table

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Ques 4 (A): Attempt any TWO of the following – (6 Marks)
a) What is a Multiplexer? Design a 4:1 multiplexer using 2:1 multiplexers.
b) What is a Decoder? Explain BCD to Decimal decoder using appropriate logic gate.
c) Explain the need of Multiplexing and Demultiplexing.
Ques 4 (B): Attempt any ONE of the following – (4 Marks)
a) Draw a well labeled diagram of digital computer. Explain the function of each block.
b) Name various input and output devices used in computer.
Ques 5 (A): Attempt any TWO of the following – (6 Marks)
a) Explain J-K flip-flop with the help of logic diagram.
b) Draw circuit diagram of weighted resistor type DAC. Explain its working.
c) Explain working of T flip-flop with suitable diagram.
Ques 5 (B): Attempt any ONE of the following – (4 Marks)
a) Explain the working of TTL NAND with open collector output.
b) What will be the output voltage of a 4 bit R-2R ladder, corresponding to the binary. Given: Logic
0 corresponds to 0 volts and logic 1 corresponds to 8 volts.
OR
Ques 5 (A): Attempt any TWO of the following –
a) Explain the working of counter type ADC.
o m (6 Marks)

b) Explain the working of right shift register using D flip-flops.


c) Explain the working of Decimal of BCD encoder using OR gates.
s . c
Ques 5 (B): Attempt any ONE of the following –

p l u
a) Draw a neat block diagram of asynchronous decade counter. Explain its working.
(4 Marks)

circuit.
s h
b) Implement the following multi-output combinational logic circuit using a 4 : 16 line decoder

y
F1 = m(1,2,4,7,8,11,12,13)
F2 = m(2,3,9,11)
. a
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F3 = m(10,12,13,14)

__________________
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