Department

PROF RAM of Computer

MEGHE COLLEGE Science & Engineering
OF ENGINEERING & MANAGEMENT

Scheme:

Course Outcomes (CO’s): On completion of the course, the students will be able to:
1. Explain basic concepts of semiconductor devices and its applications
2. Compare different Number System and basics of conversion of number systems
3. Realize different minimization technique to obtain minimized expression.
4. Design Combinational circuits
5. Design and Develop Sequential circuits
Course Pre-requisite:
Basic Physics

Course Objectives:
Throughout the course, students will be expected to demonstrate their understanding of
Analog and Digital Electronics by being able to do each of the following:
 To get introductory knowledge of PN junction diode, Bipolar Junction Transistor,
Field Effect Transistor
 To understand number systems and conversion between different number systems
 To get basic knowledge about ICs and Digital systems
 To study the design of Combinational circuits and Sequential circuits

Syllabus
ANALOG AND DIGITAL ELECTRONICS 1
 Department
PROF RAM of Computer
MEGHE COLLEGE Science & Engineering
OF ENGINEERING & MANAGEMENT

Unit I: Diode and Transistor: (Hours: 07)

PN-Junction Diode, Characteristics and Parameters, BJT operation, BJT Voltages and
Currents, BJT Amplification: Current and Voltage, BJT Switching, Common-Base
Characteristics, Common-Emitter Characteristics, Common- Collector Characteristics.

Unit II:Transistors: (Hours: 07)

Junction Field Effect Transistors, n-Channel and p-Channel JFET, JFET Characteristics,
JFET Parameters, FET Amplifications and Switching, MOSFETs: Enhancement
MOSFET, Depletion Enhancement MOSFET, Comparison of p-channel and n-channel
FETs, Introduction to CMOS.

Unit III: Number System: (Hours: 06)

Binary Number System, Signed and unsigned Number, Octal Number System,
Hexadecimal Number System, Conversions between Number Systems, r’s and (r-1)’s
Complements Representation, Subtraction using 1’s and 2’s Complements, BCD, Gray
Code, Excess 3 Code and Alpha numeric codes.

Unit IV: Minimization Techniques: (Hours: 07)

Logic Gates, Boolean Algebra, Logic Operation, Axioms and Laws of Boolean Algebra,
Reducing Boolean Expression, Boolean Functions and their representation, SOP Form,
POS Form,
Karnaugh Map (up to 5 variable), Limitation of Karnaugh Map, Quine- McCluskey
Minimization Technique (up to 5 variable).

Unit V: Combinational Circuit: (Hours: 07)

Introduction, Design Procedure, Adders, Subtractors, Binary Parallel Adder, 4 Bit Parallel
Subtractor, Look-ahead-carry Adder, BCD adder, BCD Subtractor, Multiplexer, De-
multiplexer, Decoder, Encoder, Comparator, Parity bit Generator/Checkers, Boolean
Expression Implementation using these ICs.

Unit VI: Sequential Circuit: (Hours: 06)

Flip-flops: S-R, J-K, Master slave J-K, D-type, T-type, Flip flop Excitation Table,
Conversion of Flip Flops, Registers: SISO, SIPO, PISO, PIPO, Universal Shift Register.
Counters: Asynchronous and Synchronous counter, Up/Down counter, MOD-N counter,
Ring counter, Johnson counter.

Text Books:
1. David A. Bell : “Electronic Devices & Circuits” 5th Edition, Oxford University Press
2. Jain R. P. “Modern Digital Electronics”, 3rd Edition , TMH F.

Reference Books:
1. Millman&Halkies : Electronic Devices & Circuits”, 2nd Edition, McGraw Hill
2. Sedra & Smith : “Microelectronics Circuits” , 5th Edition Oxford University Press

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 Department
PROF RAM of Computer
MEGHE COLLEGE Science & Engineering
OF ENGINEERING & MANAGEMENT

3. Anand Kumar : “Switching Theory and Logic Design”, 3rd Edition PHI Learning
Private Limited
4. Wakerly, “ Digital Design: Prinicples and Practices”, 3rd Edition, Pearson Education,
2004

Question Bank

ANALOG AND DIGITAL ELECTRONICS 3

 Department
PROF RAM of Computer
MEGHE COLLEGE Science & Engineering
OF ENGINEERING & MANAGEMENT

Unit I:
1. Explain the operation of NPN transistor when Emitter base junction is forward
biased and the Collector base junction is reverse biased. Also define leakage
current in transistor.
2. Explain the operation of PN junction diode OR With the help of characteristics,
explain the operation of PN junction diode
3. Explain Cut in voltage in diode.
4. What are the effects of temperature on PN junction diode?
5. The reverse saturation current for PN junction diode is 1 Micro ampere at K.
Calculate its ac resistances at 250 mV forward bias.
6. Find the PN junction diode current for a forward bias of 0.22 V at room
temperature C with reverse saturation current of 2mA. Assume  =1 (Ge)
7. Compare common base & common collector configuration.
8. Explain the concept of leakage currents ICBO & ICEO. How they are related with
each other.
9. Explain the I/P & O/P characteristics of a transistor in CB configuration. Also
explain different regions in it.
10. A transistor has IB = 15 μA and IC = 2.45mA. Determine
i) β of the transistor, ii) Emitter current IE
11. Why is the base of the transistor is made thin & is lightly doped? Explain.
12. Explain the mechanism of current flow in a PNP & NPN transistor.
13. Explain the PN junction diode theory in detail
14. Explain diode parameters.
15. Explain Following terms: Cut in voltage, Depletion layer, Avalanche breakdown
16. Explain Common emitter configuration in detail. Explain its input and output
characteristics with graph.
17. explain the following terms:
a) Current amplification factor
b) Relation between  and 
c) Expression for Collector current
18. Give the comparison of transistor on the basis of connection.

Unit II:
1. Draw & explain the construction & working of n channel JFET?
2. Draw & explain the construction & working of n-channel enhancement type
MOSFET.
3. Draw & explain the construction & working of n-channel depletion type MOSFET.
4. Draw & explain drain & transfer characteristics of n-channel JFET.
5. Draw & explain the drain characteristics of n-channel depletion type MOSFET.
6. FET is a voltage operated device. Explain.
7. For JFET, if IDSS = 16 mA, VGS(off) = -4V , and gmo = 4 ms. Determine
transconductance for VGS = -3V and find ID at this point.
8. Compare between JFET & MOSFET.
9. Data sheet of JFET indicates that IDSS = 12 mA and VGS(off) = -4V. Determine
the drain cCurrent for VGS = -2V.
10. Explain the advantages and disadvantages of FET over conventional transistor.
11. Compare p-channel and n-channel field effect transistor.
12. Explain amplification and switching of FET.

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 Department
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MEGHE COLLEGE Science & Engineering
OF ENGINEERING & MANAGEMENT

13. Explain working of depletion MOSFET

14. What is Enhancement MOSFET. Explain the characteristics.
15. Compare between JFET & DMOSFET.
16. Compare between EMOSFET & DMOSFET
17. Explain CMOS characteristics.

Question Bank

UNIT III:
1. Convert following numbers to their decimal equivalent:
a) (475)8 = ( )10 b) (9B2.1A)H = ( )10
c) (310)8 = ( )10 d) (11110010)2 = ( )10
2. Convert following numbers to their respective equivalent:
a) (1762.47)8 = ( )H b) (172)H = ( )2
c) (123)10 = ( )2 d) (31021)H = ( )2
3. Convert following numbers to their decimal equivalent
a) (1762.48)8 = ( )H b) (172)H = ( )2
c) (123)10 = ( )2 d) (31021)H = ( )2
4. Given binary numbers M = 1010100. N = 1000100. Perform subtraction.
i) M-N
ii) N-M by using 2's complement
5. Explain following code with examples.
i) Gray code
ii) Excess-3 code.
6. Convert following decimal numbers to gray code.
i) 29 ii) 13 iii) 77 iv) 24
7. Convert following numbers to their decimal equivalent:
i) (F216.ABCD)16 = ( )8
ii) (6327.4051)8 = ( )10
iii) (736)8 = ( )2
iv) (2F9A)16 = ( )2
8. Determine decimal number represented by following binary numbers.
i) 110101 ii) 101101 iii) 1100.1011 iv) 0.10101
9. Use the 8's complement method of subtraction to compute (516)8 - (413)8
10. Convert the following hexadecimal numbers into their equivalent octal and binary
numbers. i)A72E, ii)0.BF85
11. Convert 0.640625 decimal numbers to its octal equivalent.
12. What do you understand by alphanumeric code? Explain any one alphanumeric
code you know. List its advantages and disadvantages.
13. Perform the following subtraction operation using 2's complement method
(76.5)10 – (82.75)10
14. Convert the following binary numbers into gray codes.
i)1010110101, ii)1101100101.
15. Convert the following numbers:
i) (287)10 = ( )8 ii) (1762.48)8 = ( )16
16. Perform the following subtraction operation using 2's complement method
i) (111001)2 - (101011)2 ii) (1100100.10)2 - (0110010.11)2
17. Perform the following conversions:

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 Department
PROF RAM of Computer
MEGHE COLLEGE Science & Engineering
OF ENGINEERING & MANAGEMENT

i) (225.225)10 = ( )2 ii) (11010111.110)2 = ( )8 iii) (8.36)10 = ( )2 iv)

(623.77)8 = ( )16 v) (11100110)gray = ( )2

18. Explain the following codes in detail:

a) Excess -3 Code b) BCD Code
c) Grey Code d) Alphanumeric Code
19. Find out the output of the following:
a) 1’s Complement of 11000000010101
b) 2’s Complement of 10101010001010
c) 2’s Complement of (523)10
20. Explain Gray code and Excess-3 code with example. Give application of gray code

UNIT IV:
1. Minimize the following expressions using K-map:
i) f = ∑m(2, 5, 6, 9, 12, 13)
ii) f = ∑m(0, 1, 4, 5, 8, 9, 10, 11, 14, 15)
iii) Y = ∑m(0, 1, 2, 3, 5, 7, 8, 9, 11, 14)
2. Three square waves A, B, C of frequency 1, 2 and 4 KHz respectively are to be (i)
ANDed, (ii) OR ed. Draw the resultant waveforms in each case.
3. What are alphanumeric codes? What is its need?
4. Solve the equation using K-map technique in POS format:

Y = ΠM(5, 7, 8, 9, 10, 11, 14, 15) . d(0,1)

5. Three square waves X, Y & Z of frequency 2,4 and 8kHz respectively are to be:
i) Anded ii)ORed iii)XORed
Draw the resultant waveforms in each case.
6. A staircase light is controlled by two switches, one at the bottom of the bottom of
the stairs and another at the top.
i) Make a truth table of this system
ii) Write the logical equation in SOP form.
iii) Realize the circuit using AND-OR gates.
iv) Realize the circuit using Nand gates only.
7. Reduce the following Boolean function using K map:
i) F(A,B,C,D) = A'B'D + ABC'D' + A'BD + ABCD'
ii) F(A,B,C) = (A+B+C')(A+B'+C')(A'+B'+C')(A'+B+C)(A+B+C)
8. Simplify following Boolean function by using tabulation method.
F(A, B, C, D) = ∑m(0, 1, 2, 3, 5, 7, 8, 9, 11, 14)
9. Implement following Boolean function with NOR-NOR logic.
i) Y = AC + BC + AB + D
ii) F(A, B, C) = ΠM(0, 2, 4, 5, 6)
10. Simplify following three variable expression using Boolean function
i) F = ∑m(1, 3, 5, 7)
ii) G = ∑m(0, 1, 2, 4, 6)
11. Minimize equation using POS form:
i) Y = ΠM(0, 2, 3, 5, 7, 8, 10, 11, 14, 15)
12. Simplify the function f(w, x, y, z) = ∑m(2, 3, 12, 13, 14, 15)using tabular method
and implement the simplified function using gates.
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13. Minimize equation using SOP method:

i) Y = ∑m(0, 2, 4, 5, 8, 14, 15) + d(7, 10, 13)
14. Minimize the following boolean function using Mapping F(P Q R ) =
∑m(0,1,3,4,5,7) and implement it with AOI Logic
15. Map F(X1 X2 X3 X4) = ∑m(0,1,2,4,5,6,8,9,12,13) and implement it with AOI as
well as NAND logic gate
16. Simplify the following Boolean function using Quine McCluskey Method
F(A B C D ) = ∑m(0,1,2,3,5,7,8,9,11,14)
17. Minimize the following boolean function using Karnaugh Map F(X1 X2 X3 X4) =
∑m(0,1,2,4,5,6,8,9,12,13) and implement it with AOI as well as NAND logic gate
18. Simplify following Boolean function by using tabulation method and implement it
with AOI Logic F(A, B, C, D) = ∑m(0, 1, 2, 3, 5, 7, 8, 9, 11, 14)

Question Bank

UNIT V:
1. What is the need of a comparator? Design a 4 bit comparator using Logic Gates.
Draw the PPP data frame format
2. What is an adder? Can you perform subtraction using adder? Given an algorithm
for performing subtraction using adder. Also explain n-bit substracter circuit using
n-bit adders.
3. What is full subtractor? Draw the circuit for full subtractor using gates and give its
truth table.
4. What is BCD adder? Draw the diagram of BCD adder and explain its operation.
5. Implement and Design 8:1 multiplexer.
6. Design 8:1 multiplexer with the help of 4:1 multiplexer and 2:1 multiplexer.
7. What is full adder? Give the truth table for it. Realize the full adder using minimum
number of NAND gates.
8. What is decode? Draw the circuit for 3 to 8 decoder using gates and explain its
operation.
9. What is parallel binary adder? Draw the circuit for 4 bit binary parallel adder using
full adder and explain its operation.
10. What is BCD adder? Draw the circuit of BCD adder & explain its operation.
11. Differentiate between Encoder & Decoder. With suitable truth table explain Octal
to Binary decoder.
12. What is Binary Parallel adder? Explain in detail.
13. What is BCD adder? Draw the circuit of BCD adder & explain its operation.
14. What is the need of a comparator? Explain 2 Bit Comparator in detail

UNIT VI:
1. Draw and explain the operation of a 4-bit Bidirectional shift register.
2. What is Race around condition in JK flip flop? Explain how it can be overcome.
OR What is Race Around Condition? Suggest suitable method to eliminate it and

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MEGHE COLLEGE Science & Engineering
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explain the same. OR What is race around condition? How does it get eliminated
in Master Slave J-K Flip Flop? Explain (This is the most important question)
3. Sketch and explain operation of J-K Flip flop with its output waveform. (IMP)
4. Sketch and explain operation of D Flip flop with its output waveform.
5. Sketch and explain operation of S-R Flip flop with its output waveform.(IMP)
6. Sketch and explain operation of T Flip flop with its output waveform.
7. Design a 3 bit Asynchronous Up Counter OR
8. Design the circuit of 3 bit ripple up counter along with the timing diagram.
9. Design a 3 bit synchronous counter using J-K Flip fop
10. Design a 4 bit synchronous up counter (MOD-16 Synchronous UP counter)
11. Explain what is 3 bit UP/Down Counter.
12. Explain what is 4 bit Up/Down Counter.
13. List the various applications of flip flops. Also explain operations of D flip flop and
T flip flop using its truth table, with its logic symbols.
14. With the help of neat diagram, explain the working of 4 bit ring counter, also give
the timing diagram.
15. Draw the circuit for serial in serial out shift register and explain its operation with
example.
16. Design 4 bit ripple counter and explain its operation.
17. 16.State the difference between synchronous and asynchronous counting. Which is
faster in speed of operation and why?
18. Design and implement B.C.D. counter with T flip-flop.
19. Design and implement B.C.D. counter with JK flip-flop.
20. How will you convert JK flip-flop into D flip-flop? Explain with the help of truth
table and block diagram.
21. Draw and explain J-k flip flop using NAND gates. What is Race around condition
& how it can be overcome? Explain.
22. Explain the working of a 4 bit ring counter with the timing diagram.
23. Draw and explain the working of the following flip flop. Also give their excitation
table and characteristics equation : RS f/f and T f/f
24. What is Johnson counter? Explain the working of 4 bit Johnson counter with neat
diagram.
25. Design synchronous Mod-6 counter using clocked D- flip flop
26. Design and implement a Mod-5 Synchronous counter using T flip flop.
27. What is the shift register? What are its applications?
28. If a serial in serial out shift register has N stages and if the clock frequency is f,
what will be the time delay between input and output.
29. What is clock? What are different types of Clock signals? What is the use of
PRESET and CLEAR input in Flip-flop? What do you mean by active low input?
Practical
Course Outcomes (CO’s): On completion of the course, the students will be able to:
1. Apply practically the concepts of Analog and Digital Electronics.

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2. Explain the operation and characteristics of semiconductor devices.

3. Illustrate the operation of various logic gates and their implementation using digital
IC’s.
4. Design and implement various combinational logic circuits.
5. Design and implement various sequential logic circuits

Course Pre-requisite:
Basic Physics

Course Objectives:
On completion of the course, the students will be able to:
 To impart the concepts of Analog and Digital Electronics practically.
 To provide students basic experimental experiences in the operation of semiconductor
device and Digital ICs.
 To learn the operation of various logic gates and their implementation using digital
IC’s.
 To learn the realization of various combinational and sequential circuits.
List of Experiments:
This is a sample list of Experiments; minimum 10 experiments are to be performed
covering the entire syllabus. At least two experiments should be beyond syllabi based on
learning of syllabi

1. To study V-I characteristics of a PN Junction diode in Forward and Reverse bias.

2. To Sketch and Study the input and output characteristics of transistor connected in
Common Emitter (CE) configuration..
3. To Sketch and Study the input and output characteristics of transistor connected
in Common Base (CB) configuration
4. To Sketch and Study the input and output characteristics of transistor connected
in Common Collector (CC) configuration.
5. To plot static characteristics of FET & calculate its parameters g m , r and µ.
6. To implement Logic gates using TTL ICs (7400, 7402, 7404, 7408, 7410, 7411, 7420,
7427, 7432, d 7486).
7. Study and verify the truth table of half adder and full adder using logic gates.
8. Study and verify the truth table of half subtractor and full subtractor using logic gates
9. To compare two 4 bits number and verify the output using 4-bit comparator IC 7485.
10. Implementation of 4×1 multiplexer using logic gates.
11. Implementation and verification of Demultiplexer and Encoder using logic gates.
12. Implementation of 4bit parallel adder using 7483 IC.
13. Design and verify the 4 bit synchronous counter.
14. Design and verify the 4 bit asynchronous counter.
15. Verification of truth table of SR, JK, T and D Flip Flops.

List of Experiments beyond syllabus:

1. Design and Implementation of Op-amp as an inverting amplifier.
2. Design and Implementation of Op-amp as a non-inverting amplifier.
3. To design and find frequency of A stable multi-vibrator using IC 555.

Question Bank for Viva Voce

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 Department
PROF RAM of Computer
MEGHE COLLEGE Science & Engineering
OF ENGINEERING & MANAGEMENT

1. How PN junction is formed?

2. What is PN Junction without Bias?
3. What is need of biasing?
4. Methods of biasing, Elaborate
5. What is Cut- In voltage?
6. Cut in Voltage for Silicon and Germanium diode?
7. Which diode is widely used in applications and why?
8. What is effect of temperature on diode?
9. What is depletion region?
10. What is barrier potential?
11. What is resistance in diode?
12. What is leakage current?
13. Why leakage current exist?
14. What is static and Dynamic Resistance?
15. What is breakdown voltage?
16. What is avalanche breakdown?
17. How terminals of diode are identified?
18. How diode is tested with multi-meter?
19. What are applications of diode?
20. What is forward biasing?
21. What is Zener Breakdown?
22. What is the aim of experiment?
23. Define multiplexer.
24. What is the IC no. of 8:1 MUX
25. We also called multiplexer as----------
26. What is the use of select inputs in MUX?
27. What is the IC no. of 1:8 DMUX
28. What is the relation between i/p lines & select lines in MUX.
29. How multiplexer works?
30. In 8:1 MUX how many I/P signal lines, output signal lines and select lines?
31. In 4:1 MUX how many I/P signal lines, output signal lines and select lines?
32. Define DMUX
33. If n is select lines in the DMUX, then how many output signal in DMUX?
34. How many I/P lines in DMUX?
35. How many select lines In 1:8 DMUX ?
36. How many O/P lines In 1:8 DMUX ?
37. How many select lines and O/P lines In 1:4 DMUX ?
38. State Applications of multiplexer and demultiplexer.
39. Compare MUX and DMUX.
40. Draw functional diagram of general multiplexer.
41. Draw functional diagram of general demultiplexer.
42. Define digital comparator?
43. What is the function of n bit comparator?
44. State the IC no. of 4 bit comparator.
45. How many I/Ps in IC 7485?
46. What is the use of cascading I/Ps?
47. How many O/P s in IC 7485?
48. State the block diagram of 4 bit comparator.
49. How we design 5 bit comparator by using single IC 7485?

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50. State truth table of Ex-nor gate.

51. How many 7485 comparator IC required to design 24 bit comparator?
52. Draw functional Block diagram of n bit comparator.
53. What is the IC no. of BCD to seven segment decoder?
54. IC 7448 is ------------
55. IC 7447 is ---------
56. How many I/P lines in BCD to seven segment driver circuit?
57. How many O/P lines in BCD to seven segment driver circuit ?
58. What are the applications of seven segment display?
59. On which concept , seven segment display works?
60. State the pin configurations of IC 7447.
61. What is natural BCD?
62. BCD code is also known as ------
63. Why we also called BCD code as 8-4-2-1?
64. State one disadvantage of BCD code over binary code.
65. How BCD code requires more number of bits than binary?
66. State IC no. of BCD to decimal driver/decoder upto (0 to 9 decimal).
67. Define code.
68. Define encoding.
69. Define decoding.
70. Define nibble.
71. Define Byte.
72. What is least significant bit?
73. What is most significant bit?
74. Convert following decimal number into BCD.
10 = (00010000)
15 = (00010101)
20 =(00100000)
22 =(00100010)
75. Convert following BCD into decimal.

01110000 =70
00000010 =02
01000100 =44

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