8085 Expts
8085 Expts
8085 Expts
MICROPROCESSORS AND
MICROCONTROLLERS LAB
(2019 Scheme)
8085 Microprocessor Experiments
EXPERIMENT-3
STUDY OF 8085 MICROPROCESSOR KIT
INTRODUCTION
An 8-bit register, A called the Accumulator is the primary source and destination for one-
byte and two-byte instructions. All data transfers between the CPU and I/O devices are performed
through the accumulator. All arithmetic and Boolean instructions take one of the operands from
the accumulator and return the result to the accumulator. Apart from the accumulator, 8085 has
six general purpose registers viz., B, C, D, E, H and L to store 8-bit data. These registers can be
combined as register pairs- BC, DE and HL to perform 16-bit operations.
Hardware Specifications
2) Memory:
Note: The RAM area from 4000 – 40FF should not be accessed by the user since it is used as
scratch pad by the Monitor program.
3) Display:
Six digit, 7 segment red LED display. The first four digits are for address display and the
remaining two digits are for data display.
4) Keyboard:
Twenty-one key soft keyboard including command keys and hexadecimal keys.
5) Battery Backup:
Input : 230 V AC @ 50 Hz
Output : + 5V @ 3A
: +12 V @ 250 mA
: -12 V @ 250 mA
Software Specifications
Out of the 21 keys in the keyboard, 16 are hexadecimal keys and the remaining are standalone
keys. The following is a simple description of the key functions.
RES Allows the user to terminate any present activity and return the microprocessor
to an initialized state
EXEC Execute a particular program after selecting the address through GO command
(i) It functions as a Hex key entry when an address or data entry is required.
To enter data at memory locations, SUB keyboard command is used. For example, to enter data starting
from memory location 4100H, the following key sequence has to be used.
RES→ SUB→4100→ NEXT
The data field is displayed where 8-bit data can be entered. Press NEXT again to access the
succeeding memory location (4101H).
Note: Pressing NEXT after entry of desired data will put the entered data to the memory location
displayed then.
To examine memory locations, SUB keyboard command is used. To examine the contents of the location
for 4500H, the following key sequence has to be used.
RES→ SUB→4500→ NEXT
To view the content of the next location 4501H, press NEXT. The address is changed to 4501H
and the corresponding content is displayed.
To execute a program:
In order to execute a program, the following key sequence has to be entered. For example, to
execute a program stored at location 4100H (starting address).
RES → GO → 4100 →EXECUTE
Now “E” is displayed in the status field and control is transferred to the address entered. To check
the result at a particular location, use SUB command again. To exit from the execution, press the
RESET (RES) key.
CONCLUSION
The internal architecture as well as the hardware and software specifications of MICRO-85 EB
are detailed.
EXPERIMENT-4
AIM:
4107 3A,51,41 LDA 4151H Load A with direct data of 4151H i.e., 63H
PROCEDURE
(i) Key in the opcodes from the address shown into the trainer kit.
(ii) Enter the data at 4150H and 4151H.
(iii) Single step the program and check the register contents at every point.
(iv) Ensure that the registers contain the data as specified.
PROCEDURE
(i) Key in the opcodes from the address specified.
(ii) Enter the data at 4150H.
(iii) Execute the program and check for result at 4160H.
4103 2A,50,41 LHLD 4150H Load direct data 9977 to HL. (L) =99, (H)=77
4107 22,60,41 SHLD 4160H Store direct data from HL to memory. (4160)=5B,
(4161) =00
410A 76 HLT End of the program
PROCEDURE
(i) Key in the opcodes from the address specified.
(ii) Enter the data at 4150H and 4151H.
(iii) Execute the program and check for results at 4160H and 4161H.
Ten data bytes are stored in memory locations from 4500H to 4509H. This block of data is to be
transferred to memory locations from 4700H to 4709H. The HL register pair is used as a pointer
for the source memory and DE pair as pointer for the destination memory. A counter is set up using
the register C. Initially, the first number from the source is moved to the accumulator. The data in
the accumulator is then moved to the first location of destination. The address pointers are
subsequently incremented to point to the next source and destination locations and the counter is
decremented to indicate that one byte is transferred. If the counter is not zero, the above process
will continue. If the counter is zero, it implies that all the ten bytes are transferred from the source
to the destination.
410D C2,08,41 JNZ NEXT Jump to transfer the next data if count is
non-zero
4110 76 HLT End the program
DATA 4500 4501 4502 4503 4504 4505 4506 4507 4508 4509
22 A5 B2 99 7F 37 14 05 C2 42
RESULT 4700 4701 4702 4703 4704 4705 4706 4707 4708 4709
22 A5 B2 99 7F 37 14 05 C2 42
RESULT
(i) Data transfer operations are illustrated using various addressing modes of 8085.
(ii) Assembly language program for block data transfer is developed and executed using
the 8085 kit.
EXPERIMENT-5
410C 32,03,45 AHEAD: STA 4503H Store the result (sum) available in the
accumulator to the location 4503H
410F 79 MOV A, C Move content of register C to the
accumulator
4110 32,04,45 STA 4504H Store carry in the next location 4504H
Note: For BCD addition of two 8-bit binary numbers, the DAA instruction is used after ADD
instruction in the above program to convert the result to BCD format.
Theory:
The 8-bit binary numbers are stored in locations 4501H and 4502H. Initially register C is cleared
to store carry (borrow), if any. The result obtained after subtraction of data bytes is available in
the accumulator. The 2’s complement of the result is determined before storing it in the location
4503H. The borrow is stored in 4504H.
Algorithm:
1. Initialize address pointer. Get the first number in the accumulator.
2. Increment address pointer to get the second number and clear carry register.
3. Subtract the second number from the first.
410E 32,03,45 AHEAD: STA 4503H Store the result available in the
accumulator to the location 4503H
4111 79 MOV A, C Move content of register C to the
accumulator
4112 32,04,45 STA 4504H Store borrow in the next location 4504H
Theory:
The size of the array is specified in the memory location 4500H. The data bytes are available from
locations 4501H onwards. Initially, the accumulator and register B are cleared to store
respectively, the sum and carry. Register C is set up as a counter. The LSB of the result (sum) is
stored in 4700H and MSB (carry) in 4701H.
Algorithm:
1. Initialize address pointer and set up a counter.
2. Initialize registers to save sum and carry.
3. Add a byte in the memory with the accumulator content.
4. If a carry is generated, increment the carry register.
5. Increment address pointer and decrement the counter. If counter is zero, stop. Otherwise,
repeat step 3 until all bytes are added.
6. Store the results in specified memory locations.
Addition of an array of 8-bit binary numbers
Memory Machine Label Mnemonics Comments
Address Code
4100 21,00,45 LXI H, 4500H Load the address of count in HL pair
410D C2,06,41 JNZ LOOP Is the counter zero? If no, then repeat to
fetch the next number
4110 32,00,47 STA 4700H If yes, store the result in 4700H
Theory:
The first 16-bit number is stored in memory locations 4501H and 4502H. The second 16-bit
number is stored in locations 4503H and 4504H. Register C is used to store the carry resulting
from the addition of data bytes. The result available in HL register pair is transferred to memory
locations 4505H and 4506H. The carry is stored in 4507H.
Algorithm:
1. Initialize memory pointers to get the address of the first (multiplicand) and second
numbers (multiplier). Move the numbers to registers.
4. Decrement counter. If counter is zero, stop. Otherwise, repeat the previous step.
4112 32,03,45 STA 4503H Store the result in the location 4503H
Enter the machine codes corresponding to each program from memory locations starting at 4100H.
Enter the data at the memory locations 4501H and 4502H. Execute each program and verify the
results at 4503H and 4504H.
Enter the machine codes from memory locations starting at 4100H. Specify the array size at
4500H. Enter the data from the memory location starting at 4501H. Execute the program and
verify the results at 4700H and 4701H.
Enter the machine codes from memory locations starting at 4100H. Enter the first 16-bit number
at locations 4501Hand 4502H. Enter the second 16-bit number at 4503H and 4504H. Execute the
program and verify the results at 4505H, 4506H and 4507H.
RESULT
The assembly language programs for addition, subtraction and multiplication of data bytes were
developed and executed using the 8085 microprocessor kit.
EXPERIMENT-6
AIM
To write and execute assembly language programs using 8085 to:
(i) sort an array of ten 8-bit numbers in ascending (descending) order
(ii) convert a BCD number to its binary equivalent
(iii) convert a binary number to its BCD equivalent
Theory:
Bubble sort algorithm is used to sort the given data. The algorithm makes repeated comparisons
of adjacent data bytes and pushes the higher value down the array. i.e., In this type of sorting, the
first and second bytes are compared and the larger of the two numbers is kept in the second address.
Then second and third bytes are compared and the larger is kept in the third address and so on.
After one cycle (i.e., N-1 comparisons, where N is the number of data bytes), the largest number
will be in the last address. In the second cycle of bubble sort (i.e., N-2 comparisons), the second
largest number will be stored in the last but one memory location Thus, the processor goes through
several cycles and arranges the numbers in ascending order. Both the number of passes and the
number of comparisons will be less than the number of data in the array by one.
Algorithm:
1. Set the cycle counter at N-1, where N is the length of the array.
2. Copy the content of cycle counter to comparison counter. Take the first data to the
accumulator.
3. Compare with the next number. If next number is larger than the next, go to the next step.
Otherwise, swap the contents of consecutive memory locations.
4. Decrement comparison counter. If it is not zero, go to Step 3.
5. Decrement cycle counter. If it is zero, stop. Otherwise go to Step 2.
Program 1: Sorting an array in ascending order
Memory Machine Label Mnemonics Comments
Address Code
4100 OE, 09 MVI C, 09H Set cycle counter to N-1 where N is the
array size
4102 51 BACK: MOV D,C Set comparison counter to N-1
4103 21,01,45 LXI H, 4501H Load starting address of the array
Note: To sort the array in descending order, the mnemonic JC NEXT corresponding to
memory location 4109 is changed to JNC AHEAD. The opcode at location 4109 is changed
from DA to D2.
2. BCD to Binary conversion
Theory:
BCD stands for Binary Coded Decimal. It is a system that represents numbers in a format similar
to decimal. Only 10 valid BCD digits are present i.e., 0 to 9. A BCD byte can store values from 00
to 99. The conversion of a BCD number into its binary equivalent employs the principle of
positional weighting in a given number. In order to convert a 2-digit BCD number into its binary
equivalent, first the digits are separated and each digit is multiplied by its position and added
together. The required steps are as follows:
(i) Load the BCD number in the accumulator.
(ii) Unpack the 2-digit BCD number into two separate digits. Let the left digit be BCD 2
and the right one BCD1.
(iii) Multiply BCD2 by 10 and add BCD1 to it.
Algorithm:
(i) Separate BCD1 of the BCD number by ANDing the number with 0FH and store it in a
register.
(ii) Separate BCD2 by ANDing the number with F0H and shift the bits to the right four
times. Multiply BCD2by 10.
(iii) Add the product with BCD1.
RESULT
The following assembly language programs are developed and executed using the 8085
microprocessor kit.
(i) Sorting an array of ten numbers in ascending and descending order.
(ii) Converting a BCD number to its binary equivalent and vice-versa.
EXPERIMENT-7
AIM
To write and execute assembly language programs to generate the following waveforms:
(i) Sawtooth wave
(ii) Triangular wave
(iii) Square wave with equal and unequal delay
PRINCIPLE
In order to generate waveforms using a microprocessor, it must have input-output (I/O)
ports interfaced to it. IC 8255 is a Programmable Peripheral Interface that operates on +5V DC
supply. It has three 8-bit ports- Port A, Port B and Port C, the functions of which are defined by
writing a control word in a Control Register. The output from the microprocessor is in digital
format whereas the waveforms to be generated are analog signals. Hence, a Digital-to-Analog
Converter (DAC) is required for the conversion. The DAC is connected to Port A of the 8255.
IC 8255 needs to be initialized before use. Initialization includes setting the mode of
operation and framing an appropriate control word. Here, 8255 is set up in I/O mode with all ports
as output ports. The corresponding control word is 80H, which is written onto the control register
whose address is 03H. The data sent out from the microprocessor can be directed to any port of
8255. Each Port has a unique 8-bit address. The address of Port A is 00H, Port B is 01H and that
of Port C is 02H.
Delay calculation:
Time delay subroutines load a hexadecimal value as a count in a register or register pair.
The value is decremented until it reaches zero. For generation of time delay using a register pair,
Total T-states = 24N + 17 (N is the count)
Clock frequency of the system, f =3.172 MHz
Time for one T-state, T = 1/f = 320 ns
Time delay = Total T-states x Time for one T-state
= (24 N + 17) x 320 x 10-9
For a delay of 30 ms,
30 x 10-3 = (24 N + 17) x 320 x 10-9
N = 3905 = 0F41H
For a delay of 20 ms,
20 x 10-3 = (24 N + 17) x 320 x 10-9
N = 2603 = 0A2BH
8006 D3,00 LOOP: OUT 00H Send the value to Port A of 8255
8006 D3,00 LOOP 1: OUT 00H Send the value to Port A of 8255
PROGRAM III: Square wave with unequal on and off time period (T ON =30 ms and TOFF =
20 ms)
Memory Machine Label Mnemonics Comments
Address Code
8000 3E,80 MVI A, 80H Load the control word in the
accumulator.
OUT 03H Move the control word to the control
8002 D3,03 register
8004 3E,00 LOOP : MVI A,00H Load 00H in the accumulator
8050 11,41,0F LXI D, 0F41H Load DE register pair with the delay
count
8053 1B LOOP 1: DCX D Decrement DE register pair
8070 11,2B,0A LXI D, 0A2BH Load DE register pair with the delay
count
8073 1B LOOP 2: DCX D Decrement DE register pair
Note: For square wave with equal delay (say, TON = TOFF = 30 ms), Delay I has to be called twice
in the above program.
PROCEDURE
Enter each program from memory location 8000H onwards. The assembler will assemble
the 8085 instructions in machine code. Connect the interfacing module cable from 8255-1
connector to the DAC module. Connect +12V, -12V and GND to the module. Execute the
programs and observe the corresponding output waveforms on channel 1 or channel 2 of the CRO
through the Xout and GND pins of the DAC.
RESULT
The following waveforms are generated using 8085 microprocessor kit and interfacing
devices:
(i) Sawtooth wave
(ii) Triangular wave
(iii) Square wave with equal and unequal delay.