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Essential Characteristics of Memristors For Neuromorphic Computing

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Essential Characteristics of Memristors for Neuromorphic


Computing
Wenbin Chen, Lekai Song, Shengbo Wang, Zhiyuan Zhang, Guanyu Wang, Guohua Hu,
and Shuo Gao*

increasingly problematic. Unlike the


The memristor is a resistive switch where its resistive state is programable Von Neumann computing platform, the
based on the applied voltage or current. Memristive devices are thus capable of human brain relies on neurons and syn-
storing and computing information simultaneously, breaking the Von Neumann apses for storage and computation, which
do not have clear boundaries between
bottleneck. Since the first nanomemristor made by Hewlett-Packard in 2008, them. Therefore, nanodevices that mimic
advances so far have enabled nanostructured, low-power, high-durability devices synapses, for high-efficiency computing,
that exhibit superior performance over conventional CMOS devices. Herein, have been investigated; among these nan-
the development of memristors based on different physical mechanisms is odevices, memristors have attracted most
reviewed. In particular, device stability, integration density, power consumption, attention because of their low power con-
sumption, high integration density, and
switching speed, retention, and endurance of memristors, that are crucial for
the ability to simulate synaptic plasticity,
neuromorphic computing, are discussed in detail. An overview of various neural which meet the standards of neuromor-
networks with a focus on building a memristor-based spike neural network phic computing.[4]
neuromorphic computing system is then provided. Finally, the existing issues The first report on the resistive
and challenges in implementing such neuromorphic computing systems are switching phenomenon dates back to the
analyzed, and an outlook for brain-like computing is proposed. 1960s;[5] since early theories were insuffi-
cient to explain this phenomenon, research
had been done on it. It was not until the
1. Introduction memristor was theoretically proposed in 1971, that the mecha-
nisms underpinning the resistive switching became abundant.[6]
As CMOS devices continue to shrink in size and approach their The first memristor was manufactured by Hewlett-Packard
physical limits, the continuation of Moore’s Law faces difficult in 2008.[7] Since then, memristors made of diverse materials
challenges.[1] At the same time, the trend of big data and deep have been successfully studied, including conductive filament
learning technologies has put forward higher requirements for memristors, magnetic tunnel junctions, ferroelectric tunnel
the computing power of traditional mainstream hardware plat- junctions, phase-change memristors, and so on (Figure 1).
forms.[2] In a traditional Von Neumann computing structure, These devices have been used for storage and computing
the computing and storage units are separated, and the speed purposes.[8,9]
mismatch between them leads to the Von Neumann bottle- In recent years, there have been many reviews investigating
neck.[3] The issue of low CPU efficiency and high energy con- neuromorphic computing from the perspectives of device elec-
sumption are both caused by this bottleneck; and it is becoming trical properties,[9,10] resistive switching materials,[11,12] mem-
ristive synapses and neurons,[13] algorithm optimization,[14]
and circuit design.[15] Different from the existing literature, we
W. Chen, S. Wang, Z. Zhang, G. Wang, S. Gao
School of Instrumentation and Optoelectronic Engineering
discuss the possibility of achieving brain-like computing from
Beihang University the perspective of memristor technology and review the estab-
Beijing 100191, China lishment of spiking neural network neuromorphic computing
E-mail: shuo_gao@buaa.edu.cn systems. In this article, we first review the resistive switching
L. Song, G. Hu mechanisms of different types of memristors and focus on fac-
Department of Electronic Engineering tors, which affect device stability and the corresponding optimi-
The Chinese University of Hong Kong
Shatin, Hong Kong SAR 999077, China zation measures that have been applied. Furthermore, we study
the stochasticity, power consumption, switching speed, reten-
The ORCID identification number(s) for the author(s) of this article tion, endurance, and other properties of memristors, which
can be found under https://doi.org/10.1002/aelm.202200833.
are the basis for neuromorphic computing implementations.
© 2022 The Authors. Advanced Electronic Materials published by Wiley- We then review various memristor-based neural networks and
VCH GmbH. This is an open access article under the terms of the Creative the building of spike neural network neuromorphic computing
Commons Attribution License, which permits use, distribution and
reproduction in any medium, provided the original work is properly cited.
systems. Finally, we shed light upon the major challenges and
offer our perspectives and opinions for memristor-based brain-
DOI: 10.1002/aelm.202200833 like computing systems.

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Figure 1. Summary of commonly resistive switching mechanisms and related device optimization methods. From the top center-right picture, in the
clockwise order: a mushroom structure of PCM. Reproduced under the terms of the CC-BY license.[16] Copyright 2022, Springer Nature. A Sb2Te3-based
phase-change memory. Reproduced with permission.[17] Copyright 2021, Elsevier. A GST-based memristor in the trench structure. Reproduced with
permission.[18] Copyright 2004, IEEE. Raman measurements of the lateral phase-change memory. Reproduced under the terms of the CC-BY license.[19]
Copyright 2017, Springer Nature. Schematic illustration of an NSTO/SBFO/Pt FTJ. Reproduced under the terms of the CC-BY license.[20] Copyright 2016,
Nature. Structure of the SOT-MTJ cell. Reproduced under the terms of the CC-BY license.[21] Copyright 2021, Springer Nature. Structure illustration of
the PMN-PT (011). Reproduced under the terms of the CC-BY license.[22] Copyright 2019, Springer Nature. The structure of the nanorods-based device.
Reproduced with permission.[23] Copyright 2018, Elsevier. The structure of a TaOx-based device. Reproduced under the terms of the CC-BY license.[24]
Copyright 2015, Springer Nature. A SrVOx-based memory. Reproduced under the terms of the CC-BY license.[25] Copyright 2020, Springer Nature. A
HfOx-based memory driven by the conductive filaments. Reproduced under the terms of the CC-BY license.[26] Copyright 2020, Springer Nature.

2. Memristor Switching Mechanisms electronic effect memristors, and phase-change memory to


simplify the discussion of device performance.
The switching characteristics of memristors are critical for
neuromorphic computing implementation, and govern the
computing efficiency. Memristors in general can be classified 2.1. Conductive Filament Memristors
into conductive filament memristors, electronic effect memris-
tors, and phase-change memory (and some others) according to Anions (such as O2−, Cl−) or metal cations (such as Ag+, Cu2+)
their distinctly different switching mechanisms. In this section, migrate in the functional layer material and form metal or non-
we review these memristor technologies, laying the foundation metallic filaments under the action of redox reactions. The forma-
of our further discussion on their switching characteristics and tion and fracture of conductive filaments enable the memristor to
performance for neuromorphic computing. switch between a high-resistance state (HRS) and a low-resistance
Memristors can be classified according to the switching state (LRS). This process is widely believed to involve three mech-
mechanisms. In this section, we divide the devices into the anisms: electrochemical metallization (ECM), valence change
following three categories: conductive filament memristors, mechanism (VCM), and thermochemical mechanism (TCM).

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2.1.1. Electrochemical Metallization graphene, realizing the world’s first highly robust memristor
based on fully 2D materials (Figure 2b).[28] The device has excel-
ECM cells usually adopt the MIM structure of “active electrode/ lent durability (≈107) and a 100 ns switching. Its high performing
solid electrolyte/inert electrode”. The active electrode is often temperature (340 °C) is the highest available. ECM devices have
Ag or Cu, and the inert electrode is often Pt, Ir, and TiN.[10] come a long way in recent decades. However, the switching
Solid electrolyte materials such as chalcogenide are often used instability severely limits the application of the devices.
as functional layer materials.[27] The formation and dissolution The instability issue of ECM devices is mainly caused by the
of Ag filaments is shown in Figure 2a. Under the action of for- drift of metal cations. During electrode deposition, the active
warding voltage, the active electrode Ag can be oxidized into metal electrode diffuses into the dielectric layer, leading to
Ag+ and move to the inert electrode. In the process of moving, the uncontrollable drift of some metal ions, which aggravates the
the active electrode Ag is gradually reduced, and the metal con- switching instability of the device. The switching stability can
ductive wire is finally generated in the functional layer material be improved through two methods. The first method is realized
so that the memristor changes from an HRS to an LRS. Under through optimizing the device structure, such as by applying
the reverse voltage, the conductive wire will fuse, returning the nanorod structures.[33] In recent years, an increasing number
cell to a high-resistance state. of experiments have applied nanorods to ECM devices with
As early as 1976, Hirose and Hirose reported that it was the thorough study of nanotechnology. Nanorods have resistive
the formation and dissolution of silver dendrites that caused switching characteristics, which can effectively control the dif-
the resistance switches in Ag/Ag–AS2S3/Au devices.[32] Lee fusion of metal cations and improve the switching stability of
et al. observed different states of conductive filaments in the devices (Figure 2e).[30] Using ZnO-nanorods (ZnO-NRs), Sun
Ag/CrPS4/Au device and proved that device switching is et al. introduced oxygen vacancy layers into Au/ZnO-NRs/AZO
caused by the formation and dissolution of the Ag filament structure, which effectively improved the Ron/Roff ratio (from
(Figure 2d).[29] Wang et al. fabricated a sandwich van der Waals ≈10 to ≈104) and switching stability (Figure 2f).[31] Compared
heterojunction using 2D layered molybdenum oxide (MoS2) and with the traditional structure, ZnO-NRs have a higher contact

Figure 2. a) Schematic diagram of the switching of ECM devices. b) The structure of graphene/MoS2-xOx/graphene memory. Reproduced with
permission.[28] Copyright 2018, Springer Nature. c) I–V curves of pure ZnO-nanorods, 1.5, 2.5, and 3.5 at% Ga-doped ZnO-nanorods devices.
Reproduced with permission.[23] Copyright 2018, Elsevier. d) The images of the Ag filament in the pristine, LRS, and HRS. Reproduced under the
terms of the CC-BY license.[29] Copyright 2020, Springer Nature. e) The structures of Cu/nanorod/ZnO/ITO and Cu/ZnO/ITO devices. Reproduced
with permission.[30] Copyright 2017, IOP. f ) An Au/ZnO-nanorods/Al-doped ZnO device. Reproduced with permission.[31] Copyright 2015, ACS.

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surface area and more oxygen vacancies, which is condu- functional layer materials and changes in the valence of metal
cive to fast carrier transport and exchange. Although diverse elements. Meanwhile, the arrangement of oxygen vacancies will
approaches have been adopted to enhance the device properties form nonmetallic conductive filaments, causing the device to
using nanorods, ECM devices still suffer from large switching exhibit the switching behavior of conductive filaments.
instability. To further boost the switching stability of ECM cells, The performance of VCM cells is in relation to intermediate
the heat conduction layer and the barrier layer are often added dielectric materials and electrode materials. To implement a
to the structure. By adding a nanorod-based TiW isolation memristive device, the selected materials must at least con-
layer, Panda et al. successfully inhibited the drift of metal ions, tain conductive and insulating phases. To reduce the influence
achieving a larger resistance ratio and greater durability.[34] of Joule heating, good thermal stability at high temperatures is
Doping suitable metal ions into the solid electrolyte mate- required while no chemical reaction is allowed to exist between
rial layer (usually copper or silver ions) is also efficient to opti- two phases. Transition metal oxides are commonly used as
mize stability. Figure 2c shows the properties of GZO-NRs cells dielectric layers for VCM devices. The numerous oxygen vacan-
with different at% Ga.[23] Singh et al. studied the impact of Ga cies and defects in them can not only expedite the migration of
doping on the switching of memristors based on ZnO-NRs and anions (mainly oxygen ions) and redox reactions but also enhance
reported the 1.5 at% Ga-doped device with good retention(104 s) the stability of metal cations.[45] In the past few decades, many
and a high ON/OFF ratio (≈30).[23] By diffusing Ag into binary oxides, such as HfO2, Ta2O5, and AlOx, have proven to be
Ge–Se-based glass to form an excellent Ag–Ge–Se solid electro- the most promising resistive materials. HfOx-based materials are
lyte layer, Kozicki et al. achieved a decrease in the write bias traditional high-K dielectric materials, which can be used as high-
(from 0.5 to 0.2 V) and fast switching (<100 ns).[27] When Ag performance MOSFET gate insulation layer material.[46] If the
is doped below 2 at% in the Ge–Se array, almost all Ag will defect concentration is high, the materials will show good resist-
migrate in Ge–Se in the form of silver ions. When the doping ance conversion performance. He et al. reported a Pt/HfO2−x/Ti
concentration reaches 40 at%, Ag+ will react with Se2− to gen- memory with excellent stability (>104 s) and 10 ns fast switching
erate Ag2Se particles and disperse them in the array. In that (Figure 3e).[42] Chen et al. demonstrated a TiN/Ti/HfOx/TiN cell
case, Ag ions only need to form conductive filaments between showing 10 ns switching, a large HRS/LRS ratio (>100), great
Ag2Se particles rather than in the entire electrolyte layer, which endurance (>106 cycles), and high device yield (≈100%).[47] Zhang
reduces the voltage and time required for filament formation et al. reported a HfO2-based device with a large ON/OFF ratio
and improves the performance of the device. and observed the formation and breakage of conductive fila-
Many ECM-based memristors have been proven to perform ments in the HfO2 layer (Figure 3g).[44] Due to the wide bandgap
various synaptic functions, such as spike-timing-dependent plas- of AlOx (≈8.9 eV), the AlOx-based memristor usually has a small
ticity (STDP), short-term plasticity (STP), long-term potentia- reset current. Kim et al. realized a reset current even lower than
tion (LTP), and long-term depression (LTD). Liu et al. reported a 100 nA with an N-doped AlOx layer.[48] AlOx can also be stacked
Cu/GeTeOx/TiN ECM device.[35] By applying different modes of with other materials to improve the switching consistency
AC and DC voltages, the excitation and inhibition of biological of devices. An Al2O3/NbxOy-based memristor was recently
synapses are simulated. STDP learning rules can also be real- reported.[41] Here, amorphous Al2O3 acts as a tunnel barrier to
ized when applying an appropriate pulse sequence. Ohno et al. restrict electron tunneling. NbxOy acts as an ionic conductor to
successfully achieved the synaptic plasticity of STP and LTP restrict oxygen ion vacancy migration (Figure 3d). Therefore, a
using an Ag2S inorganic synapse.[36] The device enables dynamic mild interfacial transition and precise conductivity control were
memory of a single synapse, demonstrating a breakthrough in achieved. TaOx memory has been given serious attention for
the development of artificial synapses. Inspired by the reversible its excellent switching resistance. TaOx usually consists of two
modulation effect of MoS2, Zhu et al. reported a MoS2-based syn- phases, and oxygen migrates between the conductive TaO2 phase
aptic device that realized synaptic competition and cooperation, and the insulating Ta2O5 phase during switching.[49] With the high
providing a potential option for future neuromorphic systems.[37] erasable times (109–1012), it can satisfy embedded applications and
may change the hierarchical memory system in the future.[50]
Choi et al reported a nanoporous (NP) TaOx-based device dem-
2.1.2. Valence Change Mechanism onstrating basic synaptic function, including STDP, STP, and
LTP (Figure 3c).[40] Except for metal oxides, nonoxide insulators
VCM can be theoretically classified into filament switches and (such as AlN[45] and organometal trihalide perovskite[43]) have
interface switches. Reports on interface switches appeared as been proven to enable resistive switches. Semiconductor nitrides
early as 2008, but the research on this mechanism is so far are more stable than oxides as switching materials, which can
immature.[38] Therefore, we focus on the former here. effectively avoid the chemical reaction between electrode nitride
In many memristors based on transition metal oxides and and switching oxide interface and improve the thermal stability.[51]
perovskite structure oxide materials, if inactive electrodes are In 2016, Xiao and Huang reported an OTP synaptic device
used, the higher mobility of the oxygen ions makes them the (Figure 3f).[43] It exhibited various functions of biological syn-
dominant factor in the switching effect of the device. To sim- apses, including STDP, SRDP, forgetting, and learning.
plify the conduction model, positively charged oxygen vacan- The selection of electrode materials is also of great signifi-
cies are usually used to describe the conduction process. The cance to device stability. The work function and affinity for
ON/OFF process of the VCM devices is shown in Figure 3a. oxygen should be considered when selecting electrode mate-
Under the effect of an electric field, the migration of oxygen rials.[52] The contact modes between the electrode and metal
vacancies leads to the nonuniform composition of the oxide in VCM devices are mainly ohmic contact and blocking

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Figure 3. a) Schematic diagram of the VCM memristors. b) Different contact types in the Nb:STO device. Reproduced with permission.[39]
Copyright 2009, AIP. c) Structure of a TaOX-based memory. Reproduced under the terms of the CC-BY license.[40] Copyright 2018, Springer Nature.
d) Illustration of the Al2O3/NbxOy barrier structure for different resistance states. Reproduced with permission.[41] Copyright 2015, Elsevier. e) TEM
image of Pt/HfO2−x/Pt memory. Reproduced under the terms of the CC-BY license.[42] Copyright 2017, Springer Nature. f) Functions of synapses:
spike-timing-dependent plasticity (STDP), spike rate-dependent plasticity (SRDP), forgetting, and learning behavior. Reproduced with permission.[43]
Copyright 2016, Wiley-VCH. g) SEM image and typical resistive switching behavior of the Pt/HfO2/Pt memristor. Reproduced under the terms of the
CC-BY license.[44] Copyright 2021, Springer Nature.

contact.[52] Generally, the electrode with a low work function further accelerate the microstructural changes in the device,
establishes ohmic contact with the dielectric layer and the elec- resulting in poor device stability and performance, making it dif-
trode with a high work function establishes a blocking contact ficult to apply in practice. The research and application reports
with the dielectric layer. Menke et al. reported an ohmic contact of TCM are not fruitful yet; hence, it is briefly introduced here.
between the Nb:STO bottom electrode and the STO(Fe) film, Once heated to a certain temperature, the functional layer
which facilitates the electron tunneling (Figure 3b).[39] Jung of TCM memristors thermally will decompose to generate con-
et al. achieved ohmic contact between the TiO2−x layer and a top ductive filaments, which in turn shift the device from a high-
Pt electrode and blocking contact between the TiO2 layer and a resistance state to a low-resistance state. When the confinement
bottom Pt electrode.[53] This enabled precise control of conduc- currents are in the milliamp range, devices with “inert electrode/
tive filaments. The size of the contact barrier can be changed by metal oxide semiconductor/inert electrode” structures usually
selecting appropriate electrode materials and doping the semi- exhibit the resistive switching behavior of TCM. Common inter-
conductor surface with a high concentration, which is benefi- mediate materials are NiO,[53,54] ZnO,[55] and CoO.[56]
cial to the improvement of device stability. Although these materials were proven to have switching
properties, their resistive switching mechanisms have long
been mysterious. In 2013, Chen et al. observed the formation
2.1.3. Other Filaments and breakage of conductive filaments dominated by TCM in
Pt/ZnO/Pt devices by in situ transmission electron microscopy
TCM devices require higher voltages or currents to adjust con- (TEM), which promoted the research on TCM.[55] NiO, which
ductance changes, and the immense Joule heat produced will is the “model material” for TCM devices, has shown excellent

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CMOS compatibility. Its unipolar switching mode facilitates and the smallest tunneling resistance. If the magnetization is
the design of memory devices. Baek et al. demonstrated the antiparallel, the situation is just the opposite, resulting in the
NiO-based RRAM with the lowest operating current.[57] smallest tunneling current and the largest tunneling resistance.
Recently, to achieve precise control of CFs in the TCM-based Significant progress has been made on the TMR effect in the
RRAM, Choi et al. proposed to control the formation of CFs past decades. As early as 1975, Julliere proved that the magne-
by a tip-enhanced electric field in a pyramid-structured device, toresistance effect was caused by the asymmetry of the density
which exhibited low and reliable set/reset voltages.[58] of states (DOS) between spin-up and spin-down electrons in
In addition to the above-mentioned conductive filaments, the two ferromagnetic layers.[67] However, because of the manu-
with the in-depth study of halide perovskite (HP) materials, facturing constraints, this effect was not extensively studied
conductive filaments formed by the migration of halide ions until 1995. Moodera et al. found that under a low junction
(e.g., I− and Cl−) have been realized in memristors. Halide voltage, the TMR of the CoFe/Al2O3/Co(NiFe) tunnel junction
vacancies (such as iodine vacancies) have been identified as the can reach 22% at room temperature.[68] Miyazaki and Tezuka
main type of mobile ion defect (just like oxygen vacancies) asso- reported that the Fe/Al2O3/Fe tunnel junction has a TMR ratio
ciated with hysteresis. Zhu et al. demonstrated a MAPbI3-based of 18% at room temperature and 30% at a lower temperature.
memory with a high Ron/Roff ratio of 107.[59] They confirmed that The fabrication conditions and methods are significant factors
the RS effect in the MAPbI3 layer relies on the formation/anni- that affect the TMR value.[69] In 1998, Sousa et al. studied the
hilation of iodine vacancies. The random diffusion of I− can be influence of thermal effects on TMR and found that annealing
inhibited by active anodes. at an appropriate temperature can enhance the TMR effect.[70]
HP materials have great photoelectric properties, such as a In the Co/AlOx/Co MTJs annealed at 300 K, the TMR value
high optical absorption coefficient (≈105 cm−1), small exciton at room temperature was increased to 24%.[71] Annealing then
binding energy, high photoluminescence quantum efficiency, became a common method to improve the TMR of MJTs.
and low defect density.[60] Choi and co-workers reported After Miyazaki’s research, MTJs with Al2O3 as an insulating
the first memristor based on the organic–inorganic hybrid barrier layer made great progress. Looking for alternative
CH3NH3PbI3−xClx perovskite.[61] The cell showed a low oper- materials for Al2O3 also became a research direction. Figure 5
ating voltage of 0.1 V, long-term retention performance, and shows the TMR ratios for MTJs with Al2O3 barrier, MgO bar-
various resistance states. It was proved that HP-based memris- rier, and nonoxide barrier over the past few decades. Based on
tors can also simulate biological synapses. first-principles calculations, Butler et al.[72] and Mathon and
Umerski[73] theoretically predicted that the TMR of epitaxial
Fe/MgO/Fe(001)-based MTJs might exceed 1000%. It is a
2.2. Electronic Effect Memristors major theoretical breakthrough of the TMR effect. In 2004,
Yuasa et al. found that the TMR value of the Fe/MgO/Fe(001)
Unlike electrochemical resistive mechanisms based on redox MTJ fabricated by molecular beam epitaxy can reach 88% at
reaction and ion migration, electronic switches display physical room temperature.[74] Parkin et al. reported a high TMR in the
behavior entirely based on electrons. In electronic switches, CoFe/MgO/CoFe MJT made by magnetron sputtering at room
resistance changes can be caused by charge trapping, injec- temperature, ranging from ≈120% to 220%.[75] Moreover, a
tion and transfer, magnetic tunneling junctions, ferroresistive MgO-based MTJ with a low-power consumption showed a TMR
switches, and so on. Among them, the magnetic tunnel junc- ratio of 235% (Figure 4e).[22] Based on the CoFeB/MgO/CoFeB
tion (MTJ) and the ferroelectric tunnel junction (FTJ) are the PSV MTJ manufactured by thermal annealing and magnetron
most intensively studied. sputtering, Ikeda et al. increased its TMR to 604% at room tem-
perature and 1144% at 5 K (Figure 4g), which also proved the
prediction of Bulter and Mathon.[66]
2.2.1. Magnetic Tunnel Junction Recently, great advancement has also been achieved in the
study of MTJs with nonoxide barriers. A InP-based MTJ was
The tunneling magnetoresistance (TMR) effect can be pro- reported with a high TMR ratio of 1.97 × 104%, which is higher
duced by the spin polarization process of the metal oxide bar- than all previous devices.[62] Figure 4b shows the different DOS of
rier between two ferromagnetic metal films (such as Fe, Co, spin-up and spin-down electrons in the GaN layers. A graphene-
and Ni). This nonuniform magnetic system, namely, the sand- based MTJ even showed a magnetoresistance ratio of 5.16 × 104%
wich structure of ferromagnetic metal/insulator/ferromagnetic (Figure 4d).[64] Figure 5 shows the rise of TMR ratio over the
metal (FM–I–FM), is often called the MTJ. Figure 4a shows the past few decades for Al2O3-based MTJs, MgO-based MTJs, and
switching mechanism of an MTJ. Assuming that the electron nonoxide-based MTJs. The search for more high-quality insu-
spin is conserved during the tunneling process, the tunneling lating barrier layer materials (such as NiO,[76] AlN,[77] ZnS,[78]
probability of the electron is in relation to the magnetization and ZnSe[79]) is a research hotspot. Moreover, the thermoelectric
direction of the two ferromagnetic layers. When the magneti- effects in MTJs are given serious attention (Figure 4f).[65]
zations of the two layers are parallel, most of the electrons in With the miniaturization of electronic devices, various
the energy bands of the two layers have the same spin orienta- quantum effects have become more prominent, and magnetic
tion, and most of the electrons in the spin sub-bands will enter tunnel junctions show great potential in the development of
the majority empty state. The electrons in the spin sub-bands high-performance and low-power memristive synapses.
also enter the empty state of the few spin sub-bands in the Cao et al. reported a spintronic MTJ synapse that utilizes cur-
other magnetic layer, resulting in the largest tunneling current rent to control the direction of magnetized materials, enabling

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Figure 4. a) Illustration of the switching process of an MTJ. b) The density of states (DOS) for pure GaN and Mn-doped GaN. Reproduced with per-
mission.[62] Copyright 2021, Elsevier. c) Schematic illustration of an MTJ. Reproduced under the terms of the CC-BY license.[63] Copyright 2016, Springer
Nature. d) Diagrammatic sketch of Graphene nanoribbon spin valve. Reproduced with permission.[64] Copyright 2019, Elsevier. e) Schematic of the MTJ
device with multibarriers. Reproduced under the terms of the CC-BY license.[22] Copyright 2019, Springer Nature. f) Diagrammatic sketch of an MTJ
with Al2O3 barrier. There is a temperature difference across the Al2O3 barrier. Reproduced with permission.[65] Copyright 2012, Springer Nature. g) The
change in TMR ratio of the CoFeB/MgO/CoFeB MTJ with the annealing temperature. Reproduced with permission.[66] Copyright 2008, AIP.

synaptic plasticity functions including excitatory postsynaptic


potential, inhibitory postsynaptic potential, and STDP.[80] Pagli-
arini et al. proposed a probabilistic synapse that exhibited STDP
synaptic plasticity and was successfully applied to a stochastic
spike neural network (SNN) architecture.[81] Ostwal et al. pre-
pared an SOT MTJ-based composite synapse.[82] By applying an
appropriate pulse sequence, linear potentiation and inhibition
of synapses can be successfully simulated. Good synaptic line-
arity can further reduce the error rate of neuromorphic systems.
However, there are still many important problems and chal-
lenges in improving their performance and stability, such as the
strong thermal stability and high-resistance small-area MJTs,
ferromagnetic layer materials with high spin polarizability, and
alternative insulating layer materials, etc.

2.2.2. Ferroelectric Tunnel Junction

Figure 5. Reported TMR ratio from 1995 to 2022 for MTJs with Al2O3 The rapid development of MTJs has promoted the development
barriers,[69,83–87] MgO barriers,[75,88–95] and nonoxide barriers.[62,64,79,96–104] of other types of tunnel junctions, including ferroelectric tunnel

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junctions. An FTJ is a two-terminal device with an ultrathin fer- Since FTJ was proposed, there has been much controversy
roelectric layer in the middle and asymmetric conductive layers about its conductive mechanism. The mainstream view is that
(usually metals or semiconductors) on both sides. It can exhibit the ferroelectric polarization leads to quantum mechanical tun-
the quantum tunneling effect and the resistance inversion neling and further causes the resistive switch. Many previous
effect. The nonvolatile resistive switching of the FTJ relies on reports stated that the interface effect introduced by ferroelec-
ferroelectric polarization. The voltage bias induces ferroelectric tric polarization modulated the resistive switch of FTJs. How-
polarization, which in turn modulates the tunneling electrore- ever, the ferroelectric polarization reversal may also be caused
sistance (TER) by changing the tunneling barrier and electron by defective dipoles (such as oxygen vacancies). Oligschlaeger
tunneling rate. Figure 6a,c shows the ON/OFF process and the et al. found the existence of a resistance-switching effect in the
barrier change of FTJ. Ba(Sr)TiO3 film above the ferroelectric phase transition tem-
The concept of FTJ was formulated by Chang and Esaki in perature, indicating that the ferroelectric polarization reversal
1971, but it has only recently aroused vast interest following the may not necessarily be derived from ferroelectricity.[114] Wang
breakthrough in the understanding of nano-ferroelectricity.[106] et al. and Bristowe et al. supported this view from both experi-
In 1999, Typell et al. confirmed that the Pb(Zr0.2Ti0.8)O3 film mental and theoretical aspects.[115,116] Kim et al. believed that the
has a stable ferroelectric phase.[107] Then Ghosez demonstrated redistribution of interface charge changes the barrier height,
the existence of ferroelectricity in PbTiO3 and BaTiO3 films which is the root cause of the RS change. They pointed out that
based on the density functional theory.[108,109] Sai et al. found the ferroelectric polarization of the ferroelectric barrier layers
that the PbTiO3 film (≈1.2 nm) epitaxially grown on the SrTiO3 can only affect the charge accumulation at the interface and
substrate can maintain stable ferroelectricity, confirming enhance the TER effect.[117]
Ghosez’s theory.[110] FTJs did not appear in the official literature The probability of electron tunneling in a barrier is expo-
until 2005.[111,112] Zhuravlev et al. then proposed the concept nentially related to the tunneling length of the barrier. Theoret-
of the giant electroresistance effect with a theoretical explana- ically, if the height and length of the barrier tunneling can be
tion, which is a significant theoretical breakthrough regarding adjusted, the TER effect and device stability will be enhanced.
FTJ.[113] However, owing to the limitation of the short shielding length

Figure 6. a) Illustration of two different polarized states (ON (left) and OFF (right)) of a ferroelectric tunneling junction (FTJ). b) Illustration of CB-FTJs
with different barriers. Reproduced under the terms of the CC-BY license.[105] Copyright 2017, Springer Nature. c) Illustration of energy-band diagrams
of the FTJ in the two polarized states. d) Structure and ON/OFF states of the Nb:STO FTJ. Reproduced under the terms of the CC-BY license.[20]
Copyright 2016, Springer Nature. e) Device properties of the Pt/SBFO/Nb junction. Reproduced under the terms of the CC-BY license.[105] Copyright
2017, Springer Nature.

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of the metal electrode, the TER of FTJs at room temperature 2.3. Phase Change Memory
was not too high (≈102).[118] In 2013, Wen et al. reported an FTJ
with a metal/ferroelectric/semiconductor (MFS) structure, A phase-change memristor usually consists of a top electrode, a
which achieved a TER of more than 104% at room tempera- bottom electrode, and a layer of phase change material. Phase
ture.[118] Compared with metal electrodes, the longer shielding change materials have at least two stable phases with different
length of semiconductor electrodes facilitates electron tun- structures, including an amorphous phase and a crystalline
neling. This breakthrough greatly encouraged research to phase (or more). The resistance state of the device is determined
boost the TER effect of FTJs by adopting new structures. by the crystal state of the programmable region. Figure 7a
Through the modification of the electrode material, the tunnel shows the resistive switching of a phase-change memory. If the
resistance has been significantly improved. Efforts have also region is amorphous, the resistance of the memristor will be
been made to enhance the TER performance by appending larger owing to the high resistivity of the PCM. On the contrary,
an additional barrier between the ferroelectric barrier and the if the region is polycrystalline, the resistance of the memristor
metal electrode. In 2009, Zhuravlev et al. predicted that com- will be smaller owing to the low resistivity of the PCM.
posite barriers could greatly boost the TER effect.[119] Wang Ovshinsky first discovered the “order–disorder” reversible
et al. then reported an FTJ with BaTiO3/SrTiO3 composite transformation phenomenon of chalcogenide materials in
barriers and proved that the additional barrier can be benefi- 1968, which can be used to realize information storage.[130] In
cial to enhancing the TER effect.[120] Xi et al. further achieved 1970, energy conversion devices published the research results
efficient control of the resistance of the Pt/BaTiO3/Nb:SrTiO3 in cooperation with Gordon Moore of Intel and developed the
cell by changing the thickness of the BaTiO3 barrier and the world’s first phase change memory with a storage capacity of
concentration of doped Nb (Figure 6b,e).[105] Nowadays, opti- 256 bits.[131] With the continuous development of technology,
cally controlled FTJs have received much attention. In 2016, the performance of a computing system is pyramidally lim-
an illumination-modulated FTJ was reported with a giant TER ited by slow memory access and high-power consumption.
of 105%.[20] Figure 6d shows the I–V characteristic curve, data Mainstream storage technologies such as static random access
retention (10 years), and endurance (>106 cycles) of the device. memory (SRAM), dynamic random access memory (DRAM),
More recently, Long et al. demonstrated that light and electric and Flash have gradually developed to their physical limits,
fields can jointly control ferroelectric polarization switching, unable to satisfy the actual demand. In that case, the advances
facilitating the development of light-controlled ferroelectric in materials and device technology made it possible for the
memories.[121] Furthermore, the demand for a new generation development of PCM. Different from the above three kinds
of low-loss multifunctional microdevices has promoted the of memories, PCM has better read/write/retention/endurance
birth of multiferroic tunnel junctions, which can be regarded characteristics. However, because of the limitation of device
as the combination of MTJs and ferroelectric materials or the instability, the practical application of PCM is hindered. Many
combination of FTJs and ferromagnetic materials.[122] In the factors affect the stability of PCM. Here we mainly discuss the
multiferroic tunnel junctions, the polarization direction and effects of phase change materials and programming current on
magnetization state can be changed by changing the mag- devices.
netic field or electric field, and then the resistive switch can be The study of phase change materials and their resistive
controlled. switching mechanisms is of great significance for PCM devices.
With the continuous development of nanotechnology, the In 1987, it was found that the GeTe–Sb2Te3 film could achieve
application of ferroelectric tunnel junctions in production and rapid conversion between amorphous and crystalline phases
life has increased significantly. under laser irradiation.[132] The success of optical storage drawn
Max et al. constructed an artificial synapse using two layers intense attention in PCM technology and materials. Different
of FTJ and achieved synaptic plasticity of LTP, LTD, and STDP phase change materials have peculiar crystallization tempera-
by applying different voltage pulses, which are the basis of tures, crystallization times, and repeatable crystallization times.
human brain learning and memory.[123] Ryu et al. demonstrated The phase change material with good performance should at
an Al2O3/HZO/Si FTJ-based artificial synapse that can exhibit least have the stable amorphous phase at the working tempera-
linear potentiation and inhibition properties as well as STDP ture and the rapid crystallization at the switching temperature.
behavior.[124] Yang et al. reported FTJ-based artificial synapses Table 1 lists the crystallization temperature, crystallization
with highly linear and symmetric LTP/LTD.[125] These synapses time, and data retention of some typical phase change mate-
were further used to classify the MNIST character set and its rials. Although GST is one of the most widely studied materials
accuracy showed up to 96.7%, enabling unsupervised learning with good data retention, GST also exhibits some undesirable
with high robustness.[125] properties such as low crystallization temperature (≈148 °C),
The advantages of fast writing speed, low-power con- slow switching speed, and poor device reliability.[133–136] There-
sumption, and giant magnetoresistance make them high- fore, other phase change materials, including GeTe, doped
performance memories. Compared with FTJs, multiferroic In–Ge–Te (IGT), Si–Sb–Te (SST), GeSb, and Te-free SiSb, have
tunnel junctions have more complete functions and more gradually attracted attention.[137–142]
stable performance. The magnetoelectric coupling effect is Compared to GST, GeTe has a faster switching speed (<1 ns),
conducive to making higher-density, low-power magnetic read/ which is believed to be faster as the cell size decreases.[137] The
write multistates memories. Compared with traditional memo- interfacial displacement of GeTe due to crystal growth is about
ries, they have the advantages of easy integration, long service 2 nm in 10 years at 55 °C. As an alternative to GST, doped
life, high sensitivity, etc.[126] In–Ge–Te has a higher crystallization temperature (276 °C).[138]

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Figure 7. a) Schematic of the resistive switching of a phase-change memory. b) Structure of a mushroom-type GeS device. Reproduced under the terms
of the CC-BY license.[127] Copyright 2020, Springer Nature. c) Schematic of a ring-type memory. Reproduced with permission.[128] Copyright 2003, IEEE.
d) Diagrammatic sketch of a PCM with TEM images of a-GST film and h-GST film. Reproduced with permission.[129] Copyright 2021, Springer Nature.
e) TEM image of a µtrench-type GST memory. Reproduced under the terms of the CC-BY license.[18] Copyright 2004, IEEE.

The operating voltage of the doped IGT-based memristor is Si-rich regions improve the thermal stability of the SST film
almost the same as that of conventional GST. Its date reten- and reduce its reset current. Te has been proven to potentially
tion was proven to be over 10 years at 150 °C. Si–Sb–Te has a cause phase separation within the material, reducing the reli-
high crystallization temperature (300 °C), fast set/reset times ability of PCM.[140] Furthermore, the contamination of Te to pro-
(20/100 ns), and good data retention for over 10 years at cessing equipment and the environment is still unclear, which
100 °C.[139] The self-confine and self-heat mechanisms of the limits the in-depth study of phase change materials. Therefore,
more Te-free materials have been proposed as PCMs. Te-free
SiSb has stronger thermal stability and a simpler component
Table 1. Crystallization temperature, switching time and data retention
than GST. Zhang et al. achieved a precise control of its crystal-
of different phase change materials.
lization temperature by adjusting the content of Si.[141] The data
lifetimes of Si10Sb90 and Si16Sb84 at 110 °C are 103 and 106 times
Material Crystallization Set/reset Data retention Refs.
temperature time longer than that of GST. Doped GeSb is another Te-free mate-
rial with a high crystallization temperature (275 °C) and a small
GST 148 °C 2.5/400 ps >10 years (85 °C) [138,143]
reset current (<100 nA). It is believed to have the potential for
GeTe 250 °C <1 ns 10 years (55 °C) [137] good data retention and a fast crystallization rate (<5 ns).[142]
In–Ge–Te 276 °C – 10 years (150 °C) [138] Mott phase transition, which relies on metal–insulator
Si–Sb–Te 300 °C 20/100 ns 10 years (100 °C) [139] transitions, is another phase transition effect that can lead to
103 106
nonvolatile resistive switching. It is associated with local tem-
SiSb >150 °C – and times [141]
longer than GST perature changes. When the applied current flows through
the device and heats the local materials to the phase transi-
Sb2Te 150 °C 20 ns 10 years (55 °C) [144]
tion temperature, the transition from insulation for the metal,
Sc0.2Sb2Te3 170 °C 700 ps 10 years (87 °C) [145] leads to the current surge and forms a channel with good con-
Sb6Te4 120 °C – 10 years (57 °C) [146] ductivity between the poles. Reducing the current will lower
Ge8Sb92 220 °C – 10 years (122 °C) [147] the local temperature below the transition temperature and
NbO2 750 °C 20 ns – [148]
restore the insulation state. Common materials, including
Pr0.7Ca0.3MnO3 (PCMO),[149] VO2,[150] and NbO2,[151] can achieve
Sb6Te4/VO2 – 5.21 ns 10 years (125 °C) [146]
this transition.

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PCMO has been studied by many scientists because of its region (Figure 7c).[167] Its effective contact area, which has long
excellent EPIR performance and its ability to produce resistance robustness is only determined by the size of the contactor and
phenomenon under the action of electric field pulse at room the thickness of the deposited electrode. In the ring contact
temperature. Kim et al. demonstrated that the set/reset pro- structure, the current flows through the perimeter of the ring
cess of a PCMO-based device relied on different phases of Mn contact instead of the whole contact. Therefore, the effective
at the electrode/dielectric interface, demonstrating the existence contact area is smaller than that of normal contacts, causing the
of Mott transitions.[152] The phase transition properties of VO2 reduction of the programming current.
has been proven and the transition between insulator and metal Moreover, thermal environment optimization was proven to
occurs around 68 °C.[153] Kim et al. studied the insulating metal reduce reset current effectively. Based on the traditional mush-
transition (IMT) of VO2-based devices at room temperature and room structure, the thermal isolation environment can be opti-
demonstrated that IMT dominates the switching process.[154] mized by spatial simplification. The reset current can be greatly
Because of the IMT characteristics, VO2 has been widely used in reduced by 65% without diminishing the contact area.[128] Reif-
memory,[155] photonics,[156] and selectors.[157] Janninick and Whit- enberg et al. proved the strong influence of thermal boundary
more found that the electrical conductivity and thermoelectric resistance on PCM programming current.[168] By introducing
power of NbO2 exhibit irregular behavior at 1070 K, indicating thermal anisotropy into the programming region to optimize
that a phase change or insulator-to-metal transition occurs at the thermal environment, they realized a decrease of the reset
this temperature.[158] Such a high transition temperature makes current. Furthermore, Aryana et al. even reduced the device
NbO2 suitable for practical applications. Kim et al. reported a Pt/ programming current in half (Figure 7d).[129]
NbO2/Pt nanofilm with a higher switching speed and uniform There are also some other elements that can affect the per-
switching behavior at high temperatures.[159] Beebe et al. demon- formance of PCM cells, such as electrodes. Diverse electrode
strated the ultrafast transition and electronic response of NbO2, materials can affect the performance and working states of the
satisfying the needs for fast photoinduced devices.[160] device. To further reduce programming current, the electrodes
The large programming current is another key factor lim- selected must have acceptable electrical and thermal conduc-
iting the performance and applications of PCM. Excessive tivity. The carbon nanotube (CNT) can be a high-quality elec-
current will generate more Joule heat, and local heating will trode material for PCM devices. Using CNT electrodes, PCM
affect the phase change of the material. To realize a PCM cells can be shrunk down to the single-digit nanometer scale
with high-stability and low-power consumption, the program- with programming currents of only a few microamperes. For
ming current must be reduced.[161] One way to cut down the instance, Xiong et al. reported a CNT-based PCM and realized
programming current is to diminish the contact area.[162] Piro- ultralow set/reset currents (≈0.1 µA/≈1.6 µA).[169]
vano et al. achieved a reset current of 50 µA by reducing contact Cheng et al. reported a PCM-based on-chip photonic synapse
area of the device.[143] Different device structures have diverse that met the essential requirements of neuromorphic com-
contact areas, which have a great influence on the program- puting.[170] By changing the number of applied light pulses, the
ming current. Figure 7b shows the traditional mushroom struc- Hebbian learning and STDP rule were implemented. Suri et al.
ture.[127] Despite the efforts, the reset current is still relatively demonstrated that PCMs can achieve synaptic plasticity of LTP
large owing to the feature size of the traditional mushroom and LTD.[171] They constructed a 2-PCM synapses-based neural
structure of PCM limited by photolithography and processing. network for detecting moving cars, concurrently achieving high
Many new structures have been adopted to reduce the con- average detection rates (>90%) and low synaptic programming
tact area to a lower magnitude. The first edge-contact-type PCM power (112 µW). Kuzum et al. reported a PCM-based low-power
with a contact area of 4000 nm2 shown a low reset current of synapse with an energy-saving scheme that can mimic synaptic
≈0.2 mA.[163] However, this structure limits further reduc- plasticity with pJ-level energy.[172]
tion of the layout area. In 2004, the new “µtrench” structure
for chalcogenide-based PCM was presented, which achieved
the programming currents of 600 µA and the contact region 3. Essential Memristor Characteristics
of 5000–1500 nm2 based on the 0.18 µm technology.[18] When
for Neuromorphic Computing
the process developed to the 90 nm technology, Pellizzer et al.
demonstrated a lower reset current (400 µA) and smaller con- In the last section we summarized the mechanisms, struc-
tact region (400 nm2) (Figure 7e).[164] Although the “µTrench” tures and materials of the three main types of memristors,
device realized low reset current by reducing the contact region that enable them to have characteristics like large Gmax/Gmin
between the intermediate layer and the electrode, it was still ratios, high linearity, high I–V symmetricity, and low power
limited by lithography. To achieve the ultrasmall contact inde- consumption, meeting the needs of high-performance com-
pendent of lithography, the “pore” structure emerged.[165] The puting.[173] The Gmax/Gmin ratio represents the device’s ability
switching volume of the pore structure led to the decrease of to control conductance and reflects the degree of nonvolatility
programming current (≈53%) and device reliability.[166] Using of the memristor. A sufficiently large switching ratio is impor-
photolithography, the pore size can be accurately determined by tant for the stable operation of the memristor. On the one
the combination of precise back etching and conformal depo- hand, the larger Gmax/Gmin ratio improves the identification
sition. It was first reported to realize a reset current less than accuracy of the resistance state and reduces the burden on the
250 µA and a fast switching (80 ns) with the pore structure.[165] edge circuit/hardware (such as amplifying and reading out the
Adopting a ring-shaped structure is also a useful method for signal). On the other hand, a larger ratio usually contains more
reducing the programming current by decreasing the contact intermediate resistance states, which is positively correlated to

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Figure 8. Comparison of essential characteristics of different memristors. Selected characteristics are compared in the plot and the corresponding
data are listed in the Table 2.

the weight tuning precision. In other words, ratio determines 3.1. Stochasticity and Integration
the ability of mapping weight to conductance.[174] Linearity indi-
cates how uniformly the conductance increases and decreases Memristor parameters such as HRS/LRS ratio and switching
as the number of applied pulses changes. Low linearity results voltage, often exhibit stochasticity in different devices and
in inconsistent conductance changes of the device when the cycles. Stochasticity represents the degree to which the con-
identical electrical signal is applied, greatly reducing the ductance of a device fluctuates randomly over a given period
accuracy of the training process. In order to get the desired of time.[195] It can affect the storage and learning process of
weight under low linearity, more attempts are required, which the neural network to a certain extent. When the stochasticity
will increase the cost of weight tuning feedback adjustment. is low, the conductance fluctuations maintained by the device
Conductive filament-type memristors are usually of low lin- within a certain period of time are small, so the training and
earity due to the repeated formation and cutting of conductive recognition process of the neuromorphic system can achieve
filaments. I–V symmetry represents the symmetry of device high accuracy and stability. However, stochasticity is not nec-
resistance hysteresis when positive and negative voltages are essarily an undesired thing, either. It can also be exploited to
applied, respectively. If the device is asymmetric, the update implement specific functions, such as random number genera-
rules of synaptic weights cannot be unified when voltages of tors, stochastic neurons, and synapses.[196–199] The advantage of
different polarities are applied, which will increase the diffi- taking the variation of the device itself into the calculation is to
culty of circuit and algorithm design. The above parameters improve the fault and noise-tolerance, which also reflects the
were discussed in detail in the recent reviews,[173,174] hence we trade-off effect. Gaba et al. found that the complexity of con-
focus on the device stochasticity, integration, retention, endur- ductive filaments obeyed Poisson distribution, which can be
ance, switching energy, and speed here (Figure 8). Table 2 pre- adopted in random number calculation.[200] Using Ag-based dif-
sents a comparison of the specific characteristics of different fusive memristor, Li et al. implemented a high-stability random
memristors. Table 3 shows the device characteristics of dif- number generator.[199] Woods et al. further compensated for the
ferent memristors for high-efficiency computing. These are low accuracy of computing nonlinear synaptic weights with the
the keys features for building high-performance neuromor- stochasticity of memristors.[198] Ti/TiO2/Pt memristors were
phic computing systems. used to implement stochastic spike neurons.[197] In this neuron,

Table 2. Comparison of specific device characteristics.

Mechanism Stochasticity [%] Dimensions [nm] Retention at RT [years] Endurance [cycles] Switching speed [ps] Switching energy [fJ]
CF ≈9.65[175] ≈2[176] >1000[177] 1012 [50] 85[178] 115[179]
MTJ ≈0.29[180] ≈10[181] 10[182] 1012 [180] 200[183] 10[184]
FTJ ≈24.5[185] ≈20[186] 0.0078[187] 4× 1012 [188] 10 000[189] 100[189]
PCM ≈9.62[190] ≈5[191] >1000[192] 1011 [193] 700[145] 1000[194]

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Table 3. The characteristics of memristors with different mechanisms.

Structure RON/ROFF or TMR or TER ratio Vset/Vreset tset/treset Endurance/retention Mechanism Refs.
Graphene/MoS2−xOx/graphene >10 /10 Ω (340 °C)
3 5
3.0/−4.0 V <100 ns >10 cycles/10 s
7 5 ECM [28]
Au/ZnO-NRs/AZO 103/107 Ω 6.0/−6.0 V N/A >100 cycles ECM [31]
Cu/TiW/GZO-NRs/ 300/9 × 103 Ω 1.5/−2.0 V N/A 104 s ECM [23]
Indium tin oxide/glass
Cu/TiW/GZO-nanorods/ZnO/ITO ≈104/107 Ω 1.4/−0.8 V N/A >103 cycles ECM [34]
Au/Ag/Ag33Ge20Se47/Ni/SiO2 10 /10 Ω
4 7
0.2/−0.5 V <100 ns >10 cycles
11 ECM [27]
FTO/MoSO/Ag >102 0.2/−0.1 V N/A N/A ECM [217]
Pt/Ti/TiO2−x/Al2O3/Pt/Ta 2 × 104/2 × 106 Ω 1.5/−1.5 V 500 µs >5000 cycles/10 years at RT VCM [206]
Pt/HfOx/TiN 2 × 104/2.8 × 105 Ω 1.7/−1.6 V 50 µs N/A VCM [211,218]
TiN/TiOX/HfOX/TiN 103/>107 Ω 0.8/−0.8 V 5 ns >106cycles VCM [212]
Pt/Ta2O5−x/TaO2−x/Pt 104/109 Ω 2.0/−1.0 V 10 ns >1012cycles VCM [50]
Pd/WO3(50)/W N/A 1.25/−1.25 V 100 µs N/A VCM [219]
Ta/HfO2/Pt N/A 2.2/−4.0 V ≤5 ns 1.2 × 1011 cycles/ VCM [177]
10 years at 85 °C
Ta/TaOx/Pt 103/104 Ω 1.5/−2.0 V N/A 2 × 106 cycles/104 s VCM [220]
Pt/Ti/Al2O3/TiOx/Pt/Ta 5 × 103/5 × 104 Ω 0.7/−0.7 V N/A >500 cycles/104 s VCM [221]
TiN/AlN/Pt 730/97.83 × 10 Ω 3 2.1/−1.9 V 85 ps N/A CFs [178]
Ag/CH3NH3PbI3−xClx/FTO 10−3 1.5/−1.5 V N/A /104 s CFs [222]
Au/CH3NH3PbI3/ ITO/PET >102/104 Ω 0.7/−0.5 V N/A >104 s CFs [223]
Ni/ZnO/CPB/FTO −5 <1 ms >104 CFs [224]
10 0.71/−0.95 V s
Au/MAPbI3−xClx/FTO 10−4 1.47/−1.41 V N/A >50 cycles/4 × 104 s CFs [225]
Ag/AIST/MAPbI3/FTO 0.05 0.5/−0.5 V N/A >200 cycles/104s CFs [226]
Quad-MTJ N/A N/A 30 ns >10 11cycles MTJ [214]
STT-MTJ 600/1.3 × 103 Ω N/A 190 ps N/A MTJ [183]
Co/BTO/LSMO >100% (at RT) N/A 500 ps N/A MTJ [215]
6
Embedded-MRAM 195% (at RT) N/A N/A 10 cycles/ MTJ [207]
Co/MgO/Co 400% (at RT) N/A N/A N/A MTJ [90]
Co/BiFeO3/Ca0.96Ce0.04MnO3 N/A N/A N/A 4 × 106 cycles MTJ [188]
CoFeB/MgO/CoFeB 604% (at RT) N/A N/A N/A MTJ [66]
1144% (at 65 K)
CrO2/MoS2/CrO2 860% (at RT) N/A N/A N/A MTJ [227]
GaN/InP/GaN 1.97 × 10 4%
(at RT) N/A N/A N/A MTJ [62]
Graphene nanoribbon spin valve 5.16 × 104% (at RT) N/A N/A N/A MTJ [64]
Pt/BaTiO3/Nb:SrTiO3 104% (at RT) N/A N/A N/A FTJ [118]
NSTO/SBFO/Pt 105% (at RT) N/A N/A N/A FTJ [20]
Graphene/CuInP2S6/metal 107% (at RT) N/A N/A N/A FTJ [228]
TiN/HSO/SiON/Si 700% (at RT) 5.0/−5.0 V N/A N/105 s FTJ [229]
Ag/PbZr0.52Ti0.48O3/Nb:SrTiO3 104/>106 Ω N/A 300 ps >109 cycles/104 s FTJ [216]
Pt/BaTiO3/Nb:SrTiO3 104% (at RT) N/A N/A N/A FTJ [105]
2D graphene/In2Se3 2.75 × 104% (at RT) N/A N/A N/A FTJ [230]
Ni50Mn35In15/SrTiO3/ 224% (at RT) N/A N/A N/A FTJ [231]
PbZr0.52Ti0.48O3/Ni50.3Mn36.9Sb12.8
TiN/Ti/poly-Si diode/W <102/103 Ω 2.0/−2.0 V N/A >104cycles PCM [162]
TiW/GST/SiO2/TiW/Si-substrate 104/105 Ω 1.0/6.5 V 500 ps >104 cycles PCM [213]
TiN/GeSb/TiN 3 × 104/>3 × 105 Ω 1.25/1.6 V N/A >104 cycles PCM [142]
Al/TiN/Sb2Te/SiO2 103/105 Ω 2.2/3.2 V ≈20 ns >8 × 103 cycles PCM [144]
Al/TiN/Sb2Te/W 104 Ω/106 Ω 1.3/6.4 V 30 ns >105 cycles PCM [144]

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Table 3. Continued.

Structure RON/ROFF or TMR or TER ratio Vset/Vreset tset/treset Endurance/retention Mechanism Refs.
TEC/Sc0.2Sb2Te3/BEC <107/<107 Ω 5.7/7.5 V <700 ps >105cycles PCM [145]
Pt/PCMO/W 108/1011 Ω 1.5/−1.5 V N/A N/A Mott [149]
Pt/PCMO/Al ≈5 × 106/5 × 109 Ω −3.0/3.0 V N/A N/A Mott [232]
Ti/Au/VO2/Ti/Au 46/104 Ω (25 °C) −1.7/1.7 V N/A N/A Mott [233]
Au/Al2O3/BM-SCO/SRO/STO N/A 0.8/−2.0 V 100 ns >120 cycles Mott [234]

the variability of device switching was approximated as a is related to the energy barrier, which is proportional to the
Poisson process, which could be further exploited to fire spikes. device volume. Adopting advanced fabrication technology and
By building stochastic synapses, Neftci et al. successfully intro- high-density circuit design, STT MTJ arrays with large reten-
duced randomness into neural networks, enabling low-power tion of >10 years have been reported.[207] By contrast, there is
and high-robust learning.[196] currently insufficient research on the retention of FTJs. The
Device density indicates the size of the array that can be longest retention time of FTJ measured at room temperature
fabricated. High device density can improve the learning per- is 278 h.[208]
formance of neural networks and reduce the size and power Endurance failures of devices may originate from struc-
consumption, which is crucial for building neuromorphic com- tural fatigue, especially for conductive filament devices and
puting systems. Govoreanu et al. demonstrated a 10 × 10 nm2 phase-change memories. For conductive filament devices, the
HfO2-based memory with fast and stable switching, showing endurance of the device may be associated with undesired
high scalability.[201] The crossbar arrays with 2 nm feature size redox reactions of dielectric layer materials and electrodes,
and 6 nm half-pitch were reported, which were the smallest random diffusion of filament atoms, and overgrowth of the
memristive cells to date.[176] He et al. built a GST-based PCM filament. Much research has been done on this issue and some
with high CMOS compatibility, showing ultralow current progress has been made. Han and co-workers prepared pheny-
density of 4.84 MA cm−2.[202] Luo et al. even demonstrated the lalanine dipeptide microwires by solution method, which can
feasibility of stacking VCM and PCM devices through 3D inte- alleviate the randomness of ion migration, centralize the for-
gration.[203] An STT-MTJ with 5 Ω µm2 low resistance-area- mation of conductive filaments, and improve the endurance of
product was reported.[204] It showed stable switching and the device.[209] For PCMs, the endurance of the device is mainly
scalability of sub-10 nm CMOS. Sakhare et al. demonstrated a related to electromigration. Existing studies have improved
high-reliability MTJ at a 5 nm node with fast reading/writing endurance by designing thin film deposition techniques,
operation.[181] Luo et al. fabricated a crossbar array based on selecting appropriate materials, and optimizing device struc-
10 nm FTJs with low current density, showing the potential for tures.[193] By this method, an Sb-rich GST PCM was reported
realizing neuromorphic computing.[205] with an endurance of 1011 cycles and data retention of 4.5 years
at 85 °C. Compared with the above two devices, MTJs and FTJs
have smaller atomic displacements during the switching pro-
3.2. Retention and Endurance cess and thus theoretically have higher endurance. Shiokawa
et al. demonstrated an SOT MTJ with enormous endurance up
Retention and endurance are crucial for artificial synapses to 1012 cycles and low writing current.[180] Although the expected
applied to artificial neural networks and brain-like com- endurance of FTJs should be high, this has not been fully
puting. To ensure the stable operation of the system, the studied. Boyn et al. demonstrated that the endurance of the Co/
memristor should have a reliable retention and endurance. BiFeO3/Ca0.96Ce0.04MnO3 device is limited by domain wall pin-
Conductive filament devices and phase change memristors ning and reported the maximum endurance of FTJs up to 4 ×
have been shown to have better retention. For conductive fila- 106 cycles.[188]
ment devices, Jiang et al. reported a Ta/HfO2/Pt device with
sub-10 nm tantalum-rich and oxygen-deficient conduction
channels in the HfO2 layer, achieving a retention of >10 years 3.3. Switching Energy and Speed
at room temperature.[177] The Pt/Ti/TiO2−x/Al2O3/Pt/Ta device
showed good endurance(>5000 cycles) and retention at room A low switching energy and a fast switching speed are of
temperature(>10 years).[206] For Se-enriched materials, studies great significance for computing. They are conducive to fur-
have demonstrated that GST can be maintained for >10 years ther improving the computing power of neural networks and
at 85 °C.[134] Furthermore, Si–Sb–Te was reported to maintain meeting the needs of big-data computing.
data for 10 years at 100 °C.[139] Morikawa et al. achieved reten- For conductive filament devices, the switching energy mainly
tion of 10 years at 150 °C of In–Ge–Te.[138] In order to elimi- depends on the RESET process.[179] The RESET energy of most
nate the influence of Te on device reliability, Te-free materials ECM and VCM devices exceeds 100 fJ.[9] Cheng et al. reported
have been studied in recent years. The most typical material is a memristor with a reset energy of 6 fJ, which is the smallest
Te-Free SiSb, which has been reported to achieve retention of among CF devices in the existing literature.[210] The switching
103 and 106 times longer than GST.[141] The retention of MTJs speed of CF memristors generally relies on the rate of redox

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reaction and the ion migration. Most of the devices reported high-power consumption of traditional CMOS devices limited
so far show switching speeds within 100 ns.[5,27] Some devices the computing capabilities of neural networks, unable to meet
can exhibit switching speeds around 50 µs but at the expense the hardware requirements of high-efficiency computing sys-
of higher switching voltages.[211] The fastest switching speed tems. Unlike the CMOS cells, memristors are highly similar to
reported today in N-vacancy-migrating devices is 85 ps.[178] synapses in terms of mechanism, structure, and function. They
For a phase-change memristor, the switching energy is related can better simulate synapses and neurons, making it possible
to its volume. A low-power memory was reported based on for the construction of neuromorphic computing systems. Typ-
carbon nanotubes (≈100 fJ).[212] However, PCMs generally have ical memristor-based ANNs and SNNs are shown in Figure 9.
switching energies higher than 1000 fJ because of the high
crystallization temperature required for phase transition.[194]
The switching speed of a PCM mainly depends on the rate of 4.1. Memristor-Based Artificial Neural Networks
growth and nucleation of the phase change material. Rao et al.
reported a TEC/Sc0.2Sb2Te3/BEC device with a switching speed 4.1.1. Multilayer Perceptron
of 700 ps.[145] Furthermore, prestructural ordering was proven to
accelerate the crystallization of phase change materials.[213] For An MLP consists of an input layer, an output layer, and mul-
instance, Loke et al. reported a TiW/GST/SiO2/TiW/Si-substrate tiple hidden layers, which are fully connected.[248] Assuming
device with a switching speed of 500 ps. that the input layer inputs a vector X, and the weight matrix
MTJs and FTJs have smaller switching energies and faster of the synaptic connection between the input layer and the
operation because the changes in the magnetic field and elec- hidden layer is W. The output vector H of the hidden layer can
trodes are often on the atomic scale.[9] For MTJs, Grezes et al. be obtained by performing a matrix-vector multiplication on the
reported a MgO-based MTJ with ultralow writing energy input vector X and the weight matrix W. And so on, the input
(<10 fJ).[184] Miura et al. manufactured a Quad-MTJ with fast can be propagated forward through the weight matrix between
switching(10 ns) and endurance >1011.[214] A MgO-based STT fully connected layers to get the output Y. During this calcu-
MTJ showed fast switching of 190 ps.[183] For FTJs, a low lation process, the matrix multiplication operation between
switching energy of 100 fJ was achieved.[189] Wang et al reported layers consumes a lot of computing resources. The memristive
a Co/BTO/LSMO FTJ with a high ON/OFF ratio and a 500 ps crossbar array can improve the speed of matrix calculation and
operation, satisfying the needs of a high-speed computing reduce power consumption.
system.[215] Luo et al. demonstrated an Ag/PbZr0.52Ti0.48O3/ Li et al. established a multilayer perceptron by partitioning
Nb:SrTiO3 FTJ with a 300 ps operation, which is the fastest a one transistor and one resistive memory (1T1R) memristive
resistance switching so far.[216] crossbar array to achieve efficient adaptive learning.[243] The
network was trained on massive handwritten digit pictures and
achieved high recognition accuracy of 91.71%. Yao et al. real-
4. Memristor-Based Neuromorphic Computing ized a three-layer fully connected multilayer perceptron based
on 1T1R memristive crossbar array (Figure 10).[249] In this net-
Systems
work, a memristor crossbar array was used to store a matrix
In the previous section we discussed various characteristics of of synaptic weights, and the conductance value of each mem-
memristors that enable the implementing of a neuromorphic ristor represented a synaptic weight. Based on this system, face
computing system. Here we briefly review the development of recognition was performed on 9000 pictures affected by noise,
neural networks and discuss how memristor technology can be achieving a recognition rate of 88.08%. This memristors-based
applied to neural networks and improve the memory and com- computing system consumes 1/1000 of the energy of imple-
puting performance of the system. The origin of the artificial menting the same network using an Intel Xeon Phi processor.
neural network (ANN) can be traced back to the 1940s. In 1943,
McCulloch (M) and Pitts (P) proposed the first M–P neuron
model to describe the information processing of the human 4.1.2. Convolution Neural Network
brain.[235] In 1949, Heb put forward a hypothesis that synapses
are variable connections, which promoted the study of neural The CNN can address the problems of high cost, low efficiency,
network learning algorithms.[236] In 1957, Rosenblat reported and overfitting of perceptrons while processing massive images,
the perceptron model, which was the first relatively complete and improve the accuracy of image processing.[250] A CNN usu-
ANN.[237] Since then, neuromorphic computing has developed ally consists of convolutional layers, pooling layers, and fully
rapidly and has undergone three generations of evolution. The connected layers.[244] As the core layer of CNN, convolutional
first generation is represented by the M–P neuron-based multi- layers can extract local features of images. A pooling layer is
layer perceptron (MLP).[238] Second-generation neural networks, usually inserted periodically between consecutive convolutional
such as the convolutional neural network (CNN) and recurrent layers to reduce computational resource consumption and con-
neural network (RNN), have greatly improved the accuracy of trol overfitting. Fully connected layers are used to implement
image processing and speech recognition.[239,240] As the third- subsequent classification, as in traditional neural networks.
generation neural network, the SNN is closer to the biological Memristive crossbar arrays can implement convolutional
nervous system and algorithmically supports the construction and fully connected layers of CNNs.[248] On the one hand, the
of high-efficiency neuromorphic computing systems.[241] How- memristive crossbar array can store the value of the convolu-
ever, the low similarity to synapses, insufficient integration, and tion kernel and improve the matrix multiplication operation

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Figure 9. a) Schematic diagram of an artificial neural network. It contains three layers of interleaved memristor arrays, corresponding to three layers of
neurons. Each layer has an active functional layer sandwiched between top and bottom electrodes. Reproduced with permission.[242] Copyright 2020,
American Chemical Society. b) ANN based on memristor crossbars. The conductance difference between the two memristors (arrows in b) represents
each synaptic weight. Each crossbar computes a weighted sum of the input voltages. Between the crossbars is a layer of circuitry that reads the current
flowing through the memristor, converts it to a voltage, and then applies an activation function. Reproduced under the terms of the CC-BY license.[243]
Copyright 2018, Springer Nature. c) Five-layer mCNN with memristor convolver. The network consists of alternating subsampling (S2, S4) and convo-
lutional (C1, C3) layers. Reproduced with permission.[244] Copyright 2020, Springer Nature. d) Two units of 1 × 32 memristive synapses coupled using
a suitable coupling capacitor. Reproduced with permission.[245] Copyright 2019, Wiley-VCH. e) A PCMs-based SNN is trained for temporal recogni-
tion under unsupervised learning. Reproduced under the terms of the CC-BY license.[246] Copyright 2018, Springer Nature. f) Schematic diagram of a
memristive crossbar circuit and LIF neuron implementation. Reproduced under the terms of the CC-BY license.[247] Copyright 2018, Springer Nature.

between the input information and the convolution kernel. learning and pattern classification with a fully memristive
On the other hand, the fully connected layers of a CNN can be CNN.[211] They simulated the leaky integrate-and-fire neurons
approximated as a perceptron, which has been demonstrated with Ag-doped diffusive memristors and realized the synaptic
to be realized with a memristive array. Garbin et al. demon- array based on the Pd/HfO2/Ta cells, which can be used to
strated the feasibility of building a CNN with memristor-based achieve the fully connected layers and convolution layers.
synapses.[251] In this network, synapses are realized by multiple
parallel HfO2 memristors. The network can achieve visual pat-
tern recognition with an accuracy of up to 94% even in the 4.1.3. Recurrent Neural Network
presence of large device randomness. Luo et al. reported an
FTJ-based CNN, showing a high recognition accuracy of ≈94.7% Besides CNN, the RNN is another kind of ANN suitable for
(Figure 11).[216] Yang and co-workers implemented unsupervised processing time series, which has great potential in speech

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Figure 10. A multilayer perceptron based on a 1T1R memristive crossbar array for face recognition. a) Schematic of a one-layer perceptron network
based on the 1T1R array. b) Schematic diagram of parallel reads and mapping. c) The curve of the neural network recognition rate affected by noise.
Reproduced under the terms of the CC-BY license.[249] Copyright 2017, Springer Nature.

recognition.[240] Pure RNNs cannot solve the problem of van- output gate.[252] The forget gate determines which information
ishing gradient caused by recursion, so long short-term needs to be forgotten from the cell. The input gate determines
memory (LSTM)-based RNNs were proposed.[252] An LSTM what new information can be put into the cell. The output gate
cell is mainly composed of an input gate, a forget gate, and an determines the final output result. The unique “gate” structure

Figure 11. A CNN based on Ag/PZT/NSTO FTJs for neuroinspired computing. a) Schematic diagram of the convolutional neural network. b) Structure
of Ag/PZT/NSTO FTJs. c) The recognition accuracy of CNNs for floating-point-based software, FTJ with 256 states and FTJ with 150 states. Reproduced
under the terms of the CC-BY license.[216] Copyright 2022, Springer Nature.

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of LSTM enables it to eliminate or add information to the unit To address this issue, parallel operations of storage and com-
and process events with relatively long intervals or delays in putation can be implemented in memristive crossbar arrays,
time series, avoiding the long-term dependency. LSTM-based thereby increasing the speed of learning and training and
RNNs usually involve a large number of parameter compu- reducing power consumption. A multilayer RNN was reported
tations, exceeding the capacity of on-chip memory (such as by Li et al., where the LSTM layer and fully connected layer
SRAM) or even off-chip memory (such as DRAM).[253] There- were realized with memristors.[253] Adopting a memristive
fore, when training a recurrent neural network, data needs to crossbar array to store the synaptic weights shared by the LSTM
be transferred from an additional chip to an operator for pro- over different time steps, the network further identified indi-
cessing. The communication speed between chips cannot keep viduals by extracting human features, achieving an accuracy of
up with the calculation speed, which greatly limits the perfor- 79.1%. Typical LSTM circuits based on memristors are shown
mance of RNN. in Figure 12.

Figure 12. a) An LSTM cell consists of a memristor and two gates. b) LSTM unit with forget gates. c) Modern representation of LSTM with forget gates.
Reproduced with permission.[254] Copyright 2018, Springer Nature. d) Design of LSTM circuit including a memristor crossbar array, activation function
circuit, and pointwise multiplier circuit. Reproduced with permission.[255] Copyright 2019, Springer Nature.

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4.2. Implementing SNN Neuromorphic Hardware Systems altering the strength of synaptic connections over time in the
Enabled with Memristor Characteristics brain. Drawing on the information processing mechanism of
the biological nervous system, the learning methods of SNNs
Most traditional ANNs have fully connected layers that receive mainly include unsupervised learning and supervised learning
input from neurons in the previous layer and send signals to (Figure 13).
neurons in the latter layer.[256] Incompatible with the working Based on the Hebbian Rule, unsupervised learning resem-
mechanism of neurons in biological brains, these networks bles the learning of the human brain.[270] SNNs need to discover
cannot be used to build high-efficiency computing platforms features from unlabeled datasets and automatically adjust syn-
that simulate the brain. Compared with these networks, SNNs aptic weights for classification decisions. The pulse sequence
can not only simulate neuronal and synaptic functions but also of the biological nervous system follows STDP rule, which is
take time into account.[257] In SNNs, information is encoded a typical unsupervised learning method of SNN. According to
into the time and frequency of peaks. Neurons communicate the STDP principle, the firing timing of presynaptic and post-
through spikes rather than continuously transmitting informa- synaptic membrane neurons affects synaptic weights.[271] If the
tion in each cycle, reducing energy consumption. presynaptic neuron fires earlier than the postsynaptic neuron,
the synaptic weight will increase. Conversely, if the postsynaptic
neuron spikes first, the synaptic weight will decrease.
4.2.1. Data Encoding In supervised learning, the SNN will adjust the synaptic
weight matrix after being trained on a dataset of given labels,
Accomplishing an SNN starts by encoding data into spike and can eventually identify new target spike trains.[4] A typical
trains that resemble biological neurons. The coding methods gradient descent-based supervised learning algorithm is the
of SNN are mainly divided into rate coding, spatiotemporal SpikiProp method.[272] This method mainly draws on the error
coding, Poisson coding, latency coding, and population coding. backpropagation algorithm of traditional ANN. Using the error
In rate coding, the firing frequency of neuron spike trains is between the neuron output and the target spike train, the gra-
related to the intensity of the input stimulus.[258] Neurons emit dient descent result is obtained as a reference, and the delta
high-frequency pulses when stimulated with high intensity, and rule is applied to update the synaptic weight matrix. Supervised
low-frequency spikes when stimulated with low intensity. The learning based on synaptic plasticity mainly includes super-
encoding method is easy to operate. However, it does not con- vised Hebbian and remote supervised learning. In the super-
sider the impact of timing, which limits the efficient transmis- vised Hebbian algorithm, postsynaptic neurons fire trains of
sion of information. In spatiotemporal coding, information is pulses guided by a “teacher” signal.[273] Considering the spati-
encoded into the spatiotemporal transmission of the peaks.[259] otemporal complexity of spikes, Ponulak and Kasiński intro-
The order in which the peaks appear is related to the intensity duced a remote supervised method (ReSuMe) to SNNs.[274] In
of the stimulation the neurons receive.[260] Neurons experi- this method, teacher neurons have no direct connection with
encing high-intensity stimulation peak first, and neurons expe- learning neurons. The adjustment of synaptic weights only
riencing low-intensity stimulation peak later. Compared with depends on the input–output sequence and STDP rules.
rate coding, spatiotemporal coding can encode information
with fewer pulse sequences, which improves coding efficiency.
In Poisson coding, the input signal is encoded into a sequence 4.2.3. Memristor-Based SNNs
of pulses whose emission probability follows a Poisson distribu-
tion.[261] For a 2D image, the gray value of a pixel is represented From an algorithmic level, SNNs are closer to natural neural
by the probability of generating a pulse. Pulse trains are fired networks than ANNs above. However, from the hardware level,
according to a Poisson distribution of probabilities. In latency the traditional CMOS hardware systems have insufficient com-
coding, the timing of a neuron’s firing depends on the inten- puting power, high power consumption, and small scalability,
sity of the stimulus.[262] The higher the stimulation intensity of which limits the application of SNNs. Novel technologies (such
the neuron, the earlier the pulse fires. Each neuron fires a train as ECMs, VCMs, and PCMs) with scalability, low power con-
of spikes after a period of time, limited by the maximum spike sumption, fast switching properties have been used to realize
firing time. In fact, it is difficult to obtain correct information synapses and neurons.[218,275,276] The development of memris-
only by encoding a single neuron, so the brain usually uses pop- tors makes it possible to build large-scale SNN hardware com-
ulation coding to encode information.[263] In population coding, puting platforms to simulate the human brain.
a single input signal is encoded as a spike train of multiple neu- The Hodgkin–Huxley (H–H) model and leaky integrate-
rons.[264] These neurons have overlapping Gaussian receptive and-fire (LIF) model are typical neurons of SNN. The H–H
fields, which are related to the firing order. The receptive field model was reported by Hodgkin and Huxley in 1952.[277] This
refers to the area of stimulation that a neuron can innervate.[265] is a mathematical model for simulating membrane action
The larger the receptive field, the earlier the pulse will be fired. potentials. Considering parameters including ionic conduct-
ance, linear conductance, and leakage channel, the model can
simulate the physiological properties of biological neurons
4.2.2. Learning Rules well. However, it is still hard to implement a large-scale SNN
for real-time simulation because of the high computational
To achieve specific functions, the SNN also needs to be trained complexity. In order to reduce the computational complexity,
after encoding information. Learning is essentially a process of the LIF model was proposed to simplify the H–H model.[278]

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Figure 13. a) Memristive Pavlov dog implementation based on STDP learning. N1 – Anterior neuron for sensing “food” related stimuli; N2 – Anterior
neuron for sensing “bell” stimulation; N3 – Post neuron, which spikes when the total input current exceeds a threshold; M – Memristive device. After
both N1 and N2 spike, the memristor current exceeds its threshold, resulting in a postspike. Reproduced under the terms of the CC-BY license.[266]
Copyright 2019, Springer Nature. b) Schematic of associative learning model and its implementation. Reproduced with permission.[267] Copyright 2015,
Wiley-VCH. c) Schematic illustration of the memristive neural network. Reproduced under the terms of the CC-BY license.[268] Copyright 2019, Springer
Nature. d) The training and test patterns of the network. Reproduced under the terms of the CC-BY license.[268] Copyright 2017, Springer Nature. e) SNN
training based on PCM devices. The stream of spikes produced by the audio signal is subsampled to generate the input training pattern for the SNN.
A single-layer fully connected SNN has 132 input and 168 output LIF neurons. The interarrival rate of the output spike stream is proportional to the
intensity of the 14 × 12 pixel images of characters I, B, and M. Reproduced under the terms of the CC-BY license.[269] Copyright 2020, Springer Nature.

Neurons receive impulses from all neurons connected to potential and has a smaller amount of computation. The LIF
them. If the input of a single neuron is not sufficient to bring model has been one of the most widely used neuron models
the cell membrane potential above the threshold, the mem- in neural networks. Mehonic and Kenyon used SiOx-based
brane potential will leak under the exchange of ions inside memristors to establish H–H neurons and LIF neurons respec-
and outside the membrane. When the membrane potential tively, demonstrating the feasibility of modeling neurons with
exceeds a threshold, the neuron fires a train of pulses and memristors.[279] Using memristors to store and adjust the input
enters a hyperpolarized state, followed by a refractory period. pulse sequence, the output pulse of the neuron can be fur-
During this period, neurons will no longer receive stimulation ther controlled. Wang et al. reported a stochastic LIF neuron
and remain at rest. based on Ag-doped diffusive memristors.[211] By adjusting the
Compared with the H–H model, the LIF model does not RC constant and the migration of Ag, the integration time of
deliberately describe the change process of the membrane neurons can be controlled. A threshold-adaptive LIF neuron

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was developed based on VCM devices.[280] The threshold 5. Challenges in Device and System Levels
modulation part consists of two memristive devices. The resist-
ance ratio of the two memristors changes under different stim- Above we introduced the applications of memristors in ANNs
ulation signals, which leads to the adjustment of the threshold. and SNNs, and focused on how to build memristor-based SNN
A multimemristive SNN adopting PCM-based synapses was neuromorphic computing systems. Although these networks
proposed by Boybat et al.[246] They tested the network’s recog- have shown excellent computing performance, the stability and
nition of handwritten digits on the MINIST dataset under dif- integration of the systems are still insufficient, limiting their
ferent rules, achieving high accuracy (Figure 14). Zhang et al. commercialization. Here we introduce the current challenges
demonstrated a one-layer SNN that contains Mott neurons and of neuromorphic computing systems from both the device and
VCM synapses.[281] Mott neurons, which functioned as the recti- system levels.
fied linear unit, were implemented with the NbOx-based 1T1R From the device level, the inherent stochasticity of memris-
array. HfO2-based memristive crossbar arrays were adopted to tors limits the further improvements in memristive synapses
store massive amounts of synaptic weights. The network was and neurons. While the low-level randomness may be ben-
further used to identify the MNIST dataset, achieving an accu- eficial to the neural network, it can also limit the learning of
racy of 85.7%. the network if the cells are too stochastic.[8] Clearly, further

Figure 14. a) An illustration of a biological neuron and the analogous memristor-based artificial LIF neuron. Reproduced under the terms of the CC-BY
license.[282] Copyright 2022, Springer Nature. b) Schematic diagram of a 3-terminal memristive synapse in an SNN based on supervised learning.
Reproduced under the terms of the CC-BY license.[283] Copyright 2019, Springer Nature. c,d) A PCM-based multimemristive SNN. c) Schematic of
memristor-based synapses. d) Based on STDP rules, an SNN is trained for classifying. The accuracy of the network increases with the number of
memristive synapses. Reproduced under the terms of the CC-BY license.[246] Copyright 2018, Springer Nature.

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Table 4. Factors of device stochasticity and optimization methods.

Mechanisms Key materials Factors of stochasticity Methods


[217] [23] [28]
Electrochemical metallization Ag, Cu, MoS2 The overgrowth of CFs and the random Filament confinement[209]
diffusion of ions Nanorod[30]
Doping[34]
Valence change mechanism TiO2,[206] HfO2,[47] Ta2O5,[49] AlOx[206] The overgrowth of CFs and the random Filament confinement[209]
diffusion of ions Electrode[52]
Doping[39]
Magnetic tunnel junction NiO,[160] AlN,[97] ZnS,[78] ZnSe,[79] InP[62] Fermi level differences of electrodes and Annealing[70]
tunneling barriers Magnetron sputtering[66]
STT MTJ[207]
SOT MTJ[102]
Quard MTJ[214]
Ferroelectric tunnel junction PbTiO3,[109] BaTiO3,[126] SrTiO3,[120] Nb:SrTiO3[20] Limitations of tunnel height and tunnel MFS[118]
length of ferroelectric barriers Extra dielectric layer[120] Doping[20]
Phase change memory GST,[134] InGeTe,[138] GeSb,[142] Te-free SiSb[141] The uncontrollable crystallinity of phase Doping[138]
change materials and large programming Thin film deposition[193]
current Photolithography[20]
Pore structure[165]
µtrench structure[18]
Thermal isolation[129]

optimization is required to account for device stochasticity. are mainly Te-rich materials, such as GST, GT, IGT, and
Table 4 summarizes the factors affecting device stochasticity SST.[134,137–139] However, because of the negative impact of Te on
and optimization methods. device reliability, more attention has been paid to Te-free phase
For conductive filament devices, the device stochasticity is change materials such as GeSb and SiSb.[141,142] The commonly
mainly caused by the overgrowth of conductive filaments and used method is to adjust the content of Si by doping, thereby
the random diffusion of conductive filament atoms.[209] The achieving precise control of the crystallization temperature.[141]
growth of conductive filaments can be better controlled by Excessive current can increase the local Joule heat, which will
selecting appropriate dielectric layer materials and electrode affect the degree of phase transition of the material.[18] Based
materials, realizing different types of contact such as ohmic on the traditional mushroom structure, the influence of local
contact and blocking contact.[52] In addition, the electrode mate- Joule heat can be reduced by optimizing the thermal insula-
rial or the dielectric layer material can be modified by doping, tion environment. Second, adopting a more optimal structure
which can further realize a more stable switch.[23] From a can also reduce the contact area of the device and increase
structural perspective, the smaller the device size, the more thermal resistance. Structures reported currently include
constrained the filament growth is.[27] Therefore, tiny device pores,[165] µtrenches,[18] etc. Considering the manufacturing
structures such as nanorod structures are gradually being used process, photolithography can be used to precisely control the
in memristors. size of the pore structure and reduce the contact area of the
For MTJs and FTJs, more attention is paid to the study of device.[20]
their thermal stability, that is, how to achieve larger TMR and From the system level, device uniformity and parasitic effect
TER effects at a higher temperature. In terms of manufac- are the main factors affecting the performance of neuromorphic
turing, annealing at an appropriate temperature and using the computing systems. High-performance computing systems
magnetron sputtering method can improve the TMR to a cer- typically require large arrays of high integration for storage
tain extent.[66,70] The traditional insulating layer materials are and computing. If the device uniformity and parasitic effects
mainly Al2O3 and MgO. In recent years, nonoxide MTJs have of the array are poor, the stability of each read/write operation
been studied to achieve a TMR higher than 104%.[62,64] The key cannot be guaranteed, thereby affecting the accuracy of the cal-
to improving the TER of FTJs is to adjust the tunneling height culation (Figure 15).[284] The uniformity of the device is mainly
and length of the ferroelectric barrier.[118] In terms of electrode affected by cycle-to-cycle and device-to-device variation.[209] It is
materials, semiconductors as electrode materials have a longer hard to lessen the variability of a device during normal opera-
shielding length than metal electrodes, which can improve the tion based on current mechanisms. Gaba et al. studied the
ferroelectric barrier.[118] In addition, TER can also be improved temporal variation of a single device by detecting the random
by adding an additional barrier between the ferroelectric barrier distribution of latency before switching.[200] They found that the
and the electrode.[120] Furthermore, the advantages of MTJs and latency of individual devices under the same conditions varies
FTJs can be combined to realize a multiferroic tunnel junction, randomly and has a wide distribution. The temporal random-
which has better performance and stronger stability.[122] ness of devices during the normal operation is a major chal-
The factors affecting the stability of PCM devices are mainly lenge of current memristors. A relatively accepted statement is
the crystallinity of the phase change material and the large that the stochasticity of the filament in the resistive switch leads
programming current. The traditional phase change materials to variability.[209] Theoretically, this problem could be solved

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Figure 15. a) Presence of device non-uniformity in the switching voltages at write and erase. Reproduced with permission.[284] Copyright 2020,
Wiley-VCH. b) Effect of device nonuniformity on current in repeat write and erase processes. Reproduced with permission.[284] Copyright 2020,
Wiley-VCH. c) Realization of adaptive parasitic resistance solution. Reprogramming the crossbar array by updating the conductance. Reproduced with
permission.[285] Copyright 2019, MDPI. d) Comparison of recognition rate between traditional programming and adaptive parasitic resistance program-
ming. Reproduced with permission.[285] Copyright 2019, MDPI.

by shrinking the size of the memristor. The smallest mem- possibility of misreading during data reading. During the write
ristor feature size is around two nanometers so far.[176] If the process, the voltage drop introduced by the parasitic resist-
device size is further reduced, the filament might be confined ance may cause insufficient write voltage of the selected cells,
to an acceptably smaller region, enabling better tuning of the resulting in programming errors.[287] When a large amount of
number and morphology of the filament. cells are integrated into the same array, the corresponding para-
Device-to-device variation has a large impact on array perfor- sitic resistance will grow. It has been confirmed that the parasitic
mance, which mainly depends on the fabrication process. The resistance effects can be worse with the increase in array size and
effect of device-to-device variation on the array performance the decrease in the On/Off ratio.[288] Diverse measures have been
will be worse as the array size become larger.[286] Theoretically, proposed to eliminate the errors, with some results achieved.[289]
we can achieve good control of a small array when the param- For instance, Rao et al. proposed a timing selector to solve the
eters of each device are known. However, when the device uni- sneak current problem of memristive crossbar arrays using tran-
formity of a large array is poor (e.g., the operating voltage and sient switching dynamics.[290] These solutions primarily compen-
switching ratio of each device are different), it will be difficult to sate for reading voltage variations caused by parasitic resistance
control the input and output of the array, i.e., when performing through additional techniques or circuits. However, there is still
read and write operations on the array, it will be necessary to a lack of techniques that can be directly applied to the crossbar
ensure that each reading and writing process of the selected circuit programming process to reduce its impact. With more
unit is stable. If there is an unstable logic gate, it will be infi- in-depth research on device instability, fabrication processes and
nitely amplified by the array and affect the performance. parasitic effects, it is believed that the high integration density
Strong parasitic resistance effects can also affect the integra- required for in-memory computing can be achieved in the future.
tion density of the array and affect the computing performance
(Figure 15c,d).[285] Parasitic resistance mainly refers to wire resist-
ance along the row and column lines in memristor crossbar 6. Conclusion and Outlook
arrays.[285] During the read operation, parasitic conductive paths
in unselected cells will degrade the output signal and result in In recent years, the memristor technology is expected to replace
massive sneak path leakage which will further increase the CMOS for realizing neuromorphic computing to obtain high

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volume data processing ability. In this review, we focus on the which is beneficial to further simplifying chaotic circuits and
characteristics of memristors, including stochasticity, inte- achieving higher-strength information encryption.
gration, switching power and speed, retention, and endur-
ance that are the key concerns for brain-like neuromorphic
computing implementation. Furthermore, we introduce how Acknowledgements
to build a memristor-based SNN neuromorphic computing
system in a relatively complete manner, including aspects on The authors acknowledge the funding of the National Natural Science
encoding, learning rules, and memristive neurons and syn- Foundation of China (Grant Nos. 61803017 and 61827802), Beihang
University (Grant Nos. KG12090401 and ZG216S19C8), and Hong Kong
apses. Although memristor technology offers a new possibility Research Grants Council Early Career Scheme (Grant No. 24200521).
for high-efficiency computing, challenges such as device uni-
formity and parasitic effects still limit the hardware implemen-
tation of neural networks to a certain extent. We believe that
future research will further address these issues and prac- Conflict of Interest
tical products of memristors will be applied widely. With the The authors declare no conflict of interest.
improvement of device uniformity and integration density, the
realization of complex neuromorphic structures with better
performance will be possible. Besides, we believe the above
efforts will directly lead to the advancements in the emerging
Keywords
cutting-edge neuromorphic technologies such as 3D convolu- memristors, neural networks, neuromorphic computing, reliability,
tional neural networks (3D CNNs), brain-like chips, and chaotic variability
circuits.
Received: July 23, 2022
First, high integration density solves the problem of memory
Revised: October 5, 2022
limitation and provides sufficient data storage basis for 3D Published online: October 25, 2022
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Wenbin Chen is a student at the School of Instrumentation Science and Optoelectronic


Engineering, Beihang University, Beijing, China. His research interests focus on memris-
tors, memristive artificial synaptic and neuronal devices, neuromorphic computing, and their
applications.

Lekai Song received a B.E. degree in Optoelectronics from South China University of Technology
in 2018, and an M.S. degree in Electrical and Computing Engineering from Boston University in
2020. He is currently a Ph.D. candidate at the department of Electronic Engineering, The Chinese
University of Hong Kong (CUHK). His research focuses on solution-processed 2D materials-
based neuromorphic hardware.

Shengbo Wang is a student at the School of Instrumentation Science and Optoelectronic


Engineering, Beihang University, Beijing, China. His research interests focus on memris-
tors, memristive artificial synaptic and neuronal devices, neuromorphic computing, and their
applications.

Zhiyuan Zhang is a student at the School of Instrumentation Science and Optoelectronic


Engineering, Beihang University, Beijing, China. His research interests focus on memris-
tors, memristive artificial synaptic and neuronal devices, neuromorphic computing, and their
applications.

Adv. Electron. Mater. 2023, 9, 2200833 2200833 (30 of 31) © 2022 The Authors. Advanced Electronic Materials published by Wiley-VCH GmbH
2199160x, 2023, 2, Downloaded from https://onlinelibrary.wiley.com/doi/10.1002/aelm.202200833 by Karlsruher Inst F. Technologie, Wiley Online Library on [31/03/2023]. See the Terms and Conditions (https://onlinelibrary.wiley.com/terms-and-conditions) on Wiley Online Library for rules of use; OA articles are governed by the applicable Creative Commons License
www.advancedsciencenews.com
www.advelectronicmat.de

Guanyu Wang is a student at the School of Instrumentation Science and Optoelectronic


Engineering, Beihang University, Beijing, China. His research interests focus on memris-
tors, memristive artificial synaptic and neuronal devices, neuromorphic computing, and their
applications.

Guohua Hu is an Assistant Professor at the Electronic Engineering Department, The Chinese


University of Hong Kong (CUHK). The research focus of his group is solution-processable low-
dimensional materials and their applications in printed electronics, including thin-film transistors,
memristive electronics, photonics, and sensors. Before joining CUHK, he was a postdoctoral
research assistant/associate at the Cambridge Graphene Centre. He earned his PhD degree from
the University of Cambridge in 2018.

Shuo Gao received Ph.D. degree in electrical engineering from the University of Cambridge, UK,
in 2018. From 2017 to 2018, he was a research associate with University College London, UK. He
is currently an associate professor at Beihang University, China. His expertise area is human–
machine interactive systems. He has over 100 publications, including books, peer-reviewed
journals, flagship conferences, and patents. In terms of industrial experience, he worked as an
optical fiber system engineer at Ciena Corporation, Canada, from 2012 to 2013 and a technique
consultant at Cambridge Touch Technologies Inc., UK, from 2013 to 2017.

Adv. Electron. Mater. 2023, 9, 2200833 2200833 (31 of 31) © 2022 The Authors. Advanced Electronic Materials published by Wiley-VCH GmbH

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