CM6533
CM6533
CM6533
DESCRIPTION FEATURES
The CM6533/CM6533N/CM6533X1/CM6533DH is a USB 2.0 Full-Speed compliant
USB 2.0 audio chip built-in 8051 for flexible USB Audio Class 1.0 compliant
applications. With integrated Tri-Colors PWM LED
USB Human Interface Device (HID) Class 1.11 compliant
driver and two (2)-channel ADC/DAC and S/PDIF
interface that makes it suitable for headset, Two (2)-channel DAC for audio output interface
docking, speaker and microphone applications. Two (2)-channel ADC for audio input interface
The internal 8051 can also be developed to a lot of Supports Digital Microphone interface
different applications, such as Microsoft™ Lync /
Built-in S/PDIF transmitter
Skype/VoIP device, Android Phone or Tablet/Slate
docking device. The CM6533 /CM6533N /CM6533X1 Built-in Equalizer on both playback and recording paths
/CM6533DH is compatible with USB Audio Class 1.0 Built-in AGC (Auto Gain Control) on recording path
and USB 2.0 Full-Speed, thus it can plug & play
Supports dual tone generator
without any additional software installation on
major operating systems. The internal DAC and Supports USB suspend/resume/reset functions
ADC support from 8 ~ 96 KHz sampling rate and Supports control, interrupt, bulk, and isochronous data
16/24 bits resolution. transfers
The CM6533/CM6533N/CM6533X1/CM6533DH Embedded 1T 8051 with 32K Byte SRAM and 256K Byte
flash(Including 32KB F/W programming size)
integrates equalizer on both playback and
recording paths to compensate the frequency Supports OMTP and CTIA auto switch on a 4-pole jack
response of microphone and headphone. Integrated Tri-Colors PWM LED driver
The CM6533/CM6533N/CM6533X1/CM6533DH also Master/Slave H/W I2C/SPI/UART control interface for
integrates 256K Byte flash (Including 32KB F/W external audio devices or FLASH access
programming size) and crystal but requires few Supports embedded oscillator without external crystal
passive components to make a finish product.
Built-in 30mW @ R=32 headphone amplifier
Thus, it can save the total BOM cost and PCB area
can be smaller. On chip watchdog timer
BLOCK DIAGRAM
Analog Gain
Digital Gain -18 ~ 45dB
-16 ~ 12dB (1dB/step)
(1dB/step)
AGC ADC Mux Microphone In
USB
Interface
5-Band EQ
Analog Gain
32KB SRAM
-30 ~ 33dB
(1dB/step) +12dB
Internal Clock
Control Bus
Analog Gain
ROM(4KB)
-15 ~ 32dB
(1dB/step)
MCU with Digital Gain
256KB Flash -62 ~ 0dB Analog Gain
(1dB/step) -44 ~ 0dB (1dB/step)
Speaker/
DAC
Heaphone
5-Band EQ
SPDIF Out
GPIO x 12
PWM LED X 3
Uart, I2C, SPI
Page 1 / 60 www.cmedia.com.tw
Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
Release Notes
Revision Date Description
1.0 2014/07/08 First release.
1.1 2014/08/05 Modify F/W volume setting table(CH2.6).
1. Modify Pin descriptions.
1.2 2014/09/18
2. Modify Pin out diagram.
1. Modify MIC_SWOUT to AO pin.
2. Modify power consumption for 12MHz MCU Clock.
3. Modify Reset diagram of CH6.13.
1.3 2014/09/19
4. Separate CM6533/CM6533X1/CM6533DH Pin out diagram.
5. Modify flash description: 256K Byte flash(Including 32KB F/W programming
size).
1. Remove Microphone input impedance chart.
2. Add Xear and Dolby software function descriptions.(CH7,CH8)
3. Modify Operating ambient temperature to -15~70 oC.
1.4 2015/3/30 4. Modify CH5.1 CH5.2 USB Topology chart.
5. Modify Block Diagram (Page1).
6. Add Cap-less cross talk performance.
7. Add CM6533N QFN Package.
1.5 2015/08/07 1. Modify CH6.7 Digital microphone descriptions.
1. Modify I2C Using Example.
1.6 2015/10/29 2. Modify SPI Using Example.
3. Modify TEST pin description.
1. Modify UART TX/RX pin description
1.7 2018/08/27
2. Correct I2C timing diagram.
Page 2 / 60 www.cmedia.com.tw
Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
TABLE OF CONTENTS
Page 3 / 60 www.cmedia.com.tw
Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
Page 4 / 60 www.cmedia.com.tw
Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
Page 5 / 60 www.cmedia.com.tw
Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
2 Features
2.1 USB Compliance
USB 2.0 Full-Speed compliant
USB Audio Class 1.0 compliant
USB Human Interface Device (HID) Class 1.1 compliant
Supports USB suspend/resume/reset functions
Supports control, interrupt, bulk, and isochronous data transfers and overview
2.4 General
Crystal-less (embedded crystal function)
Page 6 / 60 www.cmedia.com.tw
Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
Single 5V power supply (embedded 5V to 1.8V regulator for digital core, 5V to 3.3V regulator for digital IO, 5V to
3.6V regulator for analog codec)
3.3V digital I/O pads with 5V tolerance
Industrial standard LQFP-48 package (7x7mm)
Recording Stream:
Microphone
Sample Rates: 8K/11.025K/16K/22.05K/32K/44.1K/48K/88.2k/96KHz
Supports Bit Length: 16/24 bits
Microphone gain range (Analog) is -18 ~ 45dB, 1dB/step
ADC gain range (Digital) is -16 ~ 12dB, 1dB/step
Stereo Mixer
Mix stereo playback stream and stereo microphone
Stereo Mixer gain range is -30 ~ 33dB, 1dB/step
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Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
Page 8 / 60 www.cmedia.com.tw
Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
3 Applications
USB Headset/Gaming Headset
Microsoft™ Lync/Skype VoIP Headset
Notebook/Netbook Docking
Android Phone/Slate Docking
USB Speaker
USB Microphone
Page 9 / 60 www.cmedia.com.tw
Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
4 Pin Assignment
4.1 CM6533 Pin-out Diagram (LQFP48)
AGND_DAR
AGND_DAL
AV36_DAR
AV36_DAL
SPDIF_O
GPIO_10
GPIO_11
LOCOM
GPIO_8
GPIO_9
LOUTR
LOUTL
36 35 34 33 32 31 30 29 28 27 26 25
GPIO_5 37 24 AV42_DA
GPIO_4 38 23 AVDD50
GPIO_3 39 22 AVDD36
GPIO_7 40 21 AGND
GPIO_6 41 20 MBIASR_SLEEVE
VSS 42 19 MICR_RING2
SPI_MISO 43
CM6533 18 MIC_SWOUT
SPI_MOSI 44 17 VAG
SPI_CS0 45 16 MBIASL
SPI_SCK 46 15 MICL
GPIO_2 47 14 VOLADJ
GPIO_1 48 13 AGND
1 2 3 4 5 6 7 8 9 10 11 12
I2C_SDAT
PDSW
TEST
VSS
USB_DM
DVDD33
DVDD18
DVDD50
VSS
GPIO_0
I2C_SCLK
USB_DP
Page 10 / 60 www.cmedia.com.tw
Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
AGND_DAR
AGND_DAL
AV36_DAR
AV36_DAL
SPDIF_O
GPIO_10
GPIO_11
LOCOM
GPIO_8
GPIO_9
LOUTR
LOUTL
36 35 34 33 32 31 30 29 28 27 26 25
GPIO_5 37 24 AV42_DA
GPIO_4 38 23 AVDD50
GPIO_3 39 22 AVDD36
GPIO_7 40 21 AGND
GPIO_6 41 20 MBIASR_SLEEVE
VSS 42 19 MICR_RING2
SPI_MISO 43
CM6533N 18 MIC_SWOUT
SPI_MOSI 44 17 VAG
SPI_CS0 45 16 MBIASL
SPI_SCK 46 15 MICL
GPIO_2 47 14 VOLADJ
GPIO_1 48 13 AGND
1 2 3 4 5 6 7 8 9 10 11 12
I2C_SDAT
PDSW
TEST
VSS
USB_DM
DVDD33
DVDD18
DVDD50
VSS
GPIO_0
I2C_SCLK
USB_DP
Page 11 / 60 www.cmedia.com.tw
Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
AGND_DAR
AGND_DAL
AV36_DAR
AV36_DAL
SPDIF_O
GPIO_10
GPIO_11
LOCOM
GPIO_8
GPIO_9
LOUTR
LOUTL
36 35 34 33 32 31 30 29 28 27 26 25
GPIO_5 37 24 AV42_DA
GPIO_4 38 23 AVDD50
GPIO_3 39 22 AVDD36
GPIO_7 40 21 AGND
GPIO_6 41 20 MBIASR_SLEEVE
VSS 42 19 MICR_RING2
SPI_MISO 43
CM6533X1 18 MIC_SWOUT
SPI_MOSI 44 17 VAG
SPI_CS0 45 16 MBIASL
SPI_SCK 46 15 MICL
GPIO_2 47 14 VOLADJ
GPIO_1 48 13 AGND
1 2 3 4 5 6 7 8 9 10 11 12
I2C_SDAT
PDSW
TEST
VSS
USB_DM
DVDD33
DVDD18
DVDD50
VSS
GPIO_0
I2C_SCLK
USB_DP
Page 12 / 60 www.cmedia.com.tw
Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
AGND_DAR
AGND_DAL
AV36_DAR
AV36_DAL
SPDIF_O
GPIO_10
GPIO_11
LOCOM
GPIO_8
GPIO_9
LOUTR
LOUTL
36 35 34 33 32 31 30 29 28 27 26 25
GPIO_5 37 24 AV42_DA
GPIO_4 38 23 AVDD50
GPIO_3 39 22 AVDD36
GPIO_7 40 21 AGND
GPIO_6 41 20 MBIASR_SLEEVE
VSS 42 19 MICR_RING2
SPI_MISO 43
CM6533DH 18 MIC_SWOUT
SPI_MOSI 44 17 VAG
SPI_CS0 45 16 MBIASL
SPI_SCK 46 15 MICL
GPIO_2 47 14 VOLADJ
GPIO_1 48 13 AGND
1 2 3 4 5 6 7 8 9 10 11 12
I2C_SDAT
PDSW
TEST
VSS
USB_DM
DVDD33
DVDD18
DVDD50
VSS
GPIO_0
I2C_SCLK
USB_DP
Page 13 / 60 www.cmedia.com.tw
Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
Page 14 / 60 www.cmedia.com.tw
Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
Page 15 / 60 www.cmedia.com.tw
Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
Page 16 / 60 www.cmedia.com.tw
Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
VAG
AGND
VSS
ADC
AGND
LOUT_n
AGND
VDD
VREG
VSS
Page 17 / 60 www.cmedia.com.tw
Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
Mute Control
Volume Control
01 -45dB(Mute) ~ 0dB
USB Mixer
08 03
Streaming 05
Interface #1 IT Speaker
OT 2CH Out
07
Mute Control
Mute Control Volume Control
02 Volume Control 0dB ~ 30dB
04
-15dB(Mute) ~ 22dB
06 USB Streaming
Microphone
2CH In IT OT Interface #2
Page 18 / 60 www.cmedia.com.tw
Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
Mute Control
Volume Control
01 -45dB(Mute) ~ 0dB
USB Mixer
08 03
Streaming 05
Interface #1 IT Speaker
OT 2CH Out
07
Mute Control
Mute Control Volume Control
02 Volume Control 0dB ~ 30dB
04
-15dB(Mute) ~ 22dB
06 USB Streaming
Microphone
2CH In IT OT Interface #2
Page 19 / 60 www.cmedia.com.tw
Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
6 Function Description
6.1 Playback Equalizer
6.1.1 5-band equalizer
CM6533/CM6533N/CM6533X1/CM6533DH has integrated five (5)-band hardware digital equalizer (EQ) engine inside
the chips to fulfill various application usages. It provides up to four (4)-preset modes on client’s product design for
different user scenarios including default/music, movies, gaming and communication modes. Clients could also
change the gain parameters for each of the preset application EQ mode via embedded FLASH coding. Also, the EQ
engine could also be utilized for compensating and fine-tuning the headphone driver for Sound Pressure Level (SPL)
performance to a specific preference. In this case, clients could fully customize all EQ coefficients such as center
frequency, gain values, and bandwidth to one optimized frequency response curve and setting in terms of the
headphone driver and housing’s acoustics characteristics, also via embedded FLASH programming.
Digital Equalizer
Digital Digital-Analog
(5-Band Fc, Gain, Analog
PCM Attenuation PCM PCM Analog Analog
Gain
Bandwidth, OPA Gain) -Converter
Gain
The EQ engine contains five (5) frequency bands (Fc) of digital filters to conduct transfer functions of the frequency
response over the audio band. It allows maximum +-12dB digital gain (Gain) for each band with 0.5dB adjustment per
step. Each filter will have its bandwidth (BW) factor between 0 and 1.0.
The EQ engine already provides four (4)-preset modes/settings based on the same preset F1~F5 center frequencies
and OPA gain:
F1 (Bass)= 100Hz
F2 = 350Hz
F3 = 1KHz
F4 = 3.5KHz
F5 (Treble) = 13KHz
Page 20 / 60 www.cmedia.com.tw
Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
With the four (4)-preset EQ modes, clients could use embedded FLASH parameters to change the gain values for each
band of the center frequency and hence customize the four (4)-preset EQ curves based on the preset center
frequencies and bandwidth. Alternatively, clients could also skip the four (4) preset modes and create a customized
EQ curve by changing the center frequencies, gain values and even the bandwidth factors in embedded FLASH
parameters to make the headphone sound better or meet some frequency requirements. However, in this case, the
product will always use one optimized EQ setting and could not allow users to dynamically change into different
preset modes. Clients could also consider reporting Treble/Bass feature unit by embedded FLASH to Windows UAA
driver to allow end-users to adjust Bass (F1) and Treble (F5) by themselves. Therefore there are three
usage/application scenarios as shown by the summary table below:
3 EQ Usage/Application Scenarios
Center Frequency / Number of
No Scenario Gain Value User Control Type
Bandwidth Factor Modes
1 4 Switchable Presets Configurable Fixed 4 Hardware
2 Full-Customized EQ Configurable Configurable 1 N.A.
Treble/Bass Feature
3 Configurable Configurable 1 Software
Unit
**Note: Hardware user control type means end-users could select which EQ mode they are going to use by a hardware
switch/button on the product; software control means they could control the treble/bass gain values by GUI in
Windows OS sound device advanced settings.
Page 21 / 60 www.cmedia.com.tw
Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
+1
-0
Gaming Communication
-1
-2
-3 Movie
d
B -4
r
-5
Default
A
-6
-7
-8
-9
-10
20 50 100 200 500 1k 2k 5k 10k 20k
Hz
DA-EQ-SPDIF_In_DA_Out.at27
Page 22 / 60 www.cmedia.com.tw
Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
Features
Programmable AGC Parameters
Selectable Gain from –12 dB to 45 dB in 1-dB Steps
Selectable Attack, Release and Hold Times
AGC Enable/Disable Function
Limiter Enable/Disable Function
Pre-Detect Limiter Level Function
Two-Channel AGC Independent
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Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
Max Threshold
Input
Signal
Max Threshold
Output
Signal
Hold Release
Attack time time
time
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Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
Page 25 / 60 www.cmedia.com.tw
Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
Page 26 / 60 www.cmedia.com.tw
Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
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Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
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Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
Host Device
1. Get register 0x3E
3. When CS_SEL is changed to CS2, firmware will erase the whole flash automatically
Page 29 / 60 www.cmedia.com.tw
Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
Coding format: biphase mark except the headers (preambles), for sync purposes
Bandwidth occupation: 100kHz up to 6Mhz (no DC)
Signal bitrate as following table:
Clock
Data Signal
1 0 0 1 1 0 1 0 0 1 0
Biphase Mark
Signal 1 0 1 1 0 0 1 0 1 0 1 1 0 1 0 0 1 1 0 1 0 0
Preamble “B”:
Marks a word containing data for channel A (left) at the start of the data-block.
Preamble “M”:
Marks a word with data for channel A that is not at the start of the data-block.
Preamble “W”:
Marks a word containing data for channel B (right, for stereo). When using more than 2 channels, this could also be
any other channel (except for A).
The number of subframes that are used depends on the number of channels that is transmitted. A CD-player uses
Channels A and B (left/right) and so each frame contains two subframes. A block contains 192 frames and starts with
a preamble "B":
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Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
Sub-frame
0 3 4 7 8 27 28 29 30 31
In each block, 384 bits of channel status and subcode info are transmitted. The Channel-status bits are equal for both
subframes, so actually only 192 useful bits are transmitted:
SubFrame SubFrame
Frame 191 Frame 0 Frame 1
consumer audio/
byte0 copyright pre-emphasis mode
/professional non-audio
**Note: (P) These bits can be programmed by USB HID or USB vendor command
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Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
VDD
VDD
DAT DAT
IN
A A
CLOCK
CM6533
CLOCK
MIC GND L/R
Series
DMIC Module
CLOCK
DATA1
DATA2
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Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
Write Transaction
Read Transaction
SCL
Stop
2. N Byte Read Transaction
SDA Slave Address 1 A Data 1 A Data Data A
Stop
SCL
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Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
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Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
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Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
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Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
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Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
CM6533/CM6533N/CM6533X1/CM6533DH can serves as a slave device with bit rate up to 400Kbps (fast mode).
External MCU can write data to CM6533/CM6533N/CM6533X1/CM6533DH or read data from
CM6533/CM6533N/CM6533X1/CM6533DH (No Size limitation in I2C Interface). Since host side and MCU can both
access to all the internal registers.
CM6533/CM6533N/CM6533X1/CM6533DH will transfer an interrupt to internal MCU until the INT bit of I2C
control Register have been clean by internal MCU. The interrupt will be trigger when write transaction done or
detect read-slave-address.
The main usage of 2-wire slave bus is to become the interface between the
CM6533/CM6533N/CM6533X1/CM6533DH and a external micro control unit (EMCU).
Page 38 / 60 www.cmedia.com.tw
Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
Others: Reserved
0b
0 R busy The 2-wire serial bus status, 0: idle, 1: busy
(POR)
**Note: When I2C issue interrupt to MCU, MCU needs to read the data numbers that threshold data count specified.
And waits another interrupt until the total data transfer completed.
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Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
Read 2 bytes:
(Slave address = 92, MAP address = 01)
Write 0x80 = 93 (Slave address)
Write 0x81 = 01 (MAP address)
Write 0x93 = 02 (Data length 2 bytes)
Write 0x94 = 92 (I2C start)
Read 0x83~0x84 (Data register)
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Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
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Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
Address: 3eh
Bits R/W Bit Mnemonic Description default
7 R/W CPOL Clock Polarity 1’b1(POR)
6 R/W CPHA Clock Phase 1’b1(POR)
SPI CS Select
00: CS0
5-4 R/W CS_SEL 01: CS1 2’b10(POR)
10: CS2(Default)
11: CS2
SPI slave flag to HID interrupt
1’b0
3 RO slv_hid 0: access to internal register
(POR)
1: flag to HID interrupt
SPI slave read/write flag
1’b0
2 RO slv_rw 0: read
(POR)
1: write
SPI slave interrupt
0: no interrupt
1’b1
1 R/W slv_int_en 1: interrupt (Default)
(POR)
Ext MCU can program this bit to make slave
mode interrupt
SPI master interrupt enable
0: disable 1’b1
0 R/W mst_int_en
1: enable (Default) (POR)
Control HW to make master mode interrupt
**Note:
1. Bit [1]: When SPI interface is slave mode, SPI interrupt happened when bit [1] ==1, which is written by external
MPU via SPI. Interrupt (HID) would be cleaned once address 0x10 was written.
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Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
2. Bit [0]: When SPI interface is master mode, SPI interrupt happened when bit [0] ==1 and every SPI master command
completed. Interrupt (HID) would be cleaned once address 0x10 was written.
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Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
6.10 GPIO
6.10.1 GPO Data Register
Address Offset: C0-C1h
Bits R/W Bit Mnemonic Description Default
GPO_0_reg 16’h0
15:0 R/W GPO data register which represents
GPO_1_reg (POR)
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CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
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Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
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Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
Generating sine-tone is based on a look-up table and the step size of look-up table for different sampling rates
would be adjusted automatically.
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Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
The Output Duty of PWM has different timings. Duty range is from 0/256~255/256.
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Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
6.13 Reset
VDD
Power
VSS
Normal Run
Watchdog Default 1 sec
WDT Reset
Overflow Time
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CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
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Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
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Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
9 Electrical Characteristics
9.1 Absolute Maximum Ratings
Test conditions: DV50 = 5V, AV50 = 5V, DGND =0V, TA=+25oC
Parameter Symbol Min. Typ Max. Unit
o
Storge temperature TS -25 - 150 C
o
Operating ambient temperature TA -15 25 70 C
Digital supply voltage(DV50) 4.5 5.0 5.5 V
Analog supply voltage(AV50) 4.5 5.0 5.5 V
I/O pin voltage - GND - 3.3 V
ESD (Body mode) ±4000 V
ESD (Machine mode) ±200 V
9.4 DC Characteristics
Test Conditions: DV50=5V, VDD = 3.3V, DGND =0V, TA=+25oC, VDD = 3.3V
Parameter Symbol Min. Typ Max. Unit
Operation Voltage range DVDD 4.5 5 5.5 V
DC Input voltage range
DCVin -0.3 5.5 V
(GPIO,I2C,SPI,SPDIF)
Input High-level voltage
Vih 2 2 V
(GPIO,I2C,SPI,SPDIF)
Input Low-level voltage
Vil 0.8 0.8 V
(GPIO,I2C,SPI,SPDIF)
Output High-level voltage
Voh 2.4 - 3.6 V
(GPIO,I2C,SPI,SPDIF)
Output Low-level voltage
Vol 0 - 0.4 V
(GPIO,I2C,SPI,SPDIF)
Output source current
IOH 8 mA
(GPIO, I2C,SPI,SPDIF)
Output sink current
IOL 8 mA
(GPIO, I2C,SPI,SPDIF)
VREG33 driver current IVREG 10 mA
**Note: DVDD18,AVDD36,AV42_DA,AV36_DAL,AV36_DAR without current drive capacity
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CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
Output Current
IMICBIAS MICBIAS 1.25 mA RMIN=2.2k
Microphone Bias
Output Impedance ROUTMI
MICBIAS 600 650 700
Microphone Bias CB
Internal regulators active,
Power Supply Rejection PSRRMIC AVDD, at maximum load current
100 dB
Ratio for Microphone Bias B MICBIAS (0.5 mA), 1 kHz sine wave at
100 mVrms
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Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
10 Audio Performance
10.1 DAC Audio Quality
TA=25℃, DV50=5V, AV50=5V, Equalizer disabled, Typical Fs/Bit-depth=48KHz/16bit (except remarked in Test
Conditions), Master Volume= 0dB, Platform=DELL Desktop 32BWS02, 4G RAM, Windows 8.1 CHT
Test Values
Items Test Conditions Unit
Min. Typ. Max.
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Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
Test Values
Items Test Conditions Unit
Min. Typ. Max.
-83
THD+N @-3dB Full Scale Input 20~20KHz -85 dB
(@1KHz)
Dynamic Range (with -60dBFs Input
A-Weighted 88 dB
Signal)
-0.043 -0.512
Fs=48kHz/16bits, 20~20KHz dB
(20Hz) (20KHz)
Frequency Response
-0.005 -3
Fs=96kHz/24bits, 20~48KHz dB
(20Hz) (43KHz)
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Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
-89
THD+N @ -3dB Full Scale Input 20~20KHz -90 dB
(@1KHz)
Dynamic Range (with -60dBFs Input
A-Weighted 92 dB
Signal)
-0.036 -0.133
Frequency Response 20~20KHz dB
(20Hz) (20KHz)
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Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
11 Package Dimension
Operating Ambient
Model Number Package Supply Range
Temperature
48-Pin LQFP 7mm×7mm×1.4mm
CM6533 -15°C to +70°C DVdd = 5V, AVdd = 5V
(Plastic)
48-Pin QFN 7mm×7mm×0.85mm
CM6533N -15°C to +70°C DVdd = 5V, AVdd = 5V
(Plastic)
48-Pin LQFP 7mm×7mm×1.4mm
CM6533X1 -15°C to +70°C DVdd = 5V, AVdd = 5V
(Plastic)
48-Pin LQFP 7mm×7mm×1.4mm
CM6533DH -15°C to +70°C DVdd = 5V, AVdd = 5V
(Plastic)
Outline Dimensions *Dimensions shown in inches and (mm)
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Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
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Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
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Rev.1.7 Copyright© C-Media Electronics Inc.
CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
-End of Datasheet-
Disclaimer:
Information furnished by C-Media Electronics Inc. is believed to be accurate and reliable. However, no responsibility
is assumed by C-Media Electronics Inc. for its use, nor for any infringements of patents or other rights of third parties
that may result from its use. Specifications are subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of C-Media. Trademark and registered trademark are the property of
their respective owners.
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Rev.1.7 Copyright© C-Media Electronics Inc.