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3.1 Register Transfer Language - Bus Memory Transfer

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REGISTER TRANSFER LANGUAGE

Digital modules are best defined by the registers they contain and the operations that are
performed on the data stored in them. The operations executed on data stored in registers are
called microoperations.

A microoperation is an elementary operation performed on the information stored in one or more


registers.

The result of the operation may replace the previous binary information of a register or may be
transferred to another register. Examples of microoperations are shift, count, clear, and load.

The symbolic notation used to describe the microoperation transfers among registers is called a
register transfer language.

The term "register transfer" implies the availability of hardware logic circuits that can perform a
stated microoperation and transfer the result of the operation to the same or another register.

The word "language" is borrowed from programmers, who apply this term to programming
languages. A programming language is a procedure for writing symbols to specify a given
computational process.

A register transfer language is a system for expressing in symbolic form the microoperation
sequences among the registers of a digital module.

REGISTER TRANSFER

Computer registers are designated by capital letters (sometimes followed by numerals) to denote
the function of the register. For example, MAR, PC, IR the individual flip-flops.

Information transfer from one register to another is designated in symbolic form by means of a
replacement operator.

The statement R2 ← R1 denotes a transfer of the content of register R1 into register R2.

It designates a replacement of the content of R2 by the content of R l. By definition, the content


of the source register R1 does not change after the transfer.

The transfer to occur only under a predetermined control condition. This can be shown by means
of an if-then statement.

If (P = 1) then (R2 ← R1)

Where P is a control signal generated in the control section. It is sometimes convenient to


separate the control variables from the register transfer operation by specifying a control
function. A control function is a Boolean variable that is equal to 1 or 0. The control function is
included in the statement as follows:

P: R2 ← R1
The control condition is terminated with a colon. It symbolizes the requirement that the transfer
operation be executed by the hardware only if P = 1.

The basic symbols o f the register transfer notation are listed in Table

TABLE Basic symbols for register Transfers

BUS TRANSFERS

A typical digital computer has many registers, and paths must be provided to transfer
information from one register to another. The number of wires will be excessive if separate lines
are used between each register and all other registers in the system.

A more efficient scheme for transferring information between registers in a multiple-register


configuration is a common bus system.

A bus structure consists of a set of common lines, one for each bit of a register, through which
binary information is transferred one at a time. Control signals determine which register is
selected by the bus during each particular register transfer.

The diagram shows that the bits in the same significant position in each register are connected to
the data inputs of one multiplexer to form one line of the bus.

MUX 0 multiplexes the four 0 bits of the registers, MUX 1 multiplexes the four 1 bits of the
registers, and similarly for the other two bits.
The two selection lines S1 and S0 are connected to the selection inputs of all four multiplexers.
The selection lines choose the four bits of one register and transfer them into the four-line
common bus.

When S1S0 = 00, the 0 data inputs of all four multiplexers are selected and applied to the outputs
that form the bus.

This causes the bus lines to receive the content of register A since the outputs of this register are
connected to the 0 data inputs of the multiplexers. Similarly, register B is selected if S1S0 = 01,
and so on.

Table shows the register that is selected by the bus for each of the four possible binary value of
the selection lines.

S1 S0 Registers
selected
0 0 A
0 1 B
1 0 C
1 1 D

In general, a bus system will multiplex k registers of n bits each to produce an n-line common
bus.
The number of multiplexers needed to construct the bus is equal to n, the number of bits in each
register. The size of each multiplexer must be k x 1 since it multiplexes k data lines. For
example, a common bus for eight registers of 16 bits each requires 16 multiplexers, one for each
line in the bus.

Each multiplexer must have eight data input lines and three selection lines to multiplex one
significant bit in the eight registers.

The transfer of information from a bus into one of many destination registers can be
accomplished by connecting the bus lines to the inputs of all destination registers and activating
the load control of the particular destination register selected.

The symbolic statement for a bus transfer may mention the bus or its presence may be implied in
the statement. When the bus is includes in the statement, the register transfer is symbolized as
follows:

BUS ← C R1 ← BUS

The content of register C is placed on the bus, and the content of the bus is loaded into register R
1 by activating its load control input.

If the bus is known to exist in the system, it may be convenient just to show the direct transfer.

R1 ← C

From this statement the designer knows which control signals must be activated to produce the
transfer through the bus.

MEMORY TRANSFERS

The transfer of information from a memory word to the outside environment is called a read
operation. The transfer of new information to be stored into the memory is called a write
operation.

A memory word will be symbolized by the letter M. The particular memory word among the
many available is selected by the memory address during the transfer. It is necessary to specify
the address of M when writing memory transfer operations. This will be done by enclosing the
address in square brackets following the letter M .Consider a memory unit that receives the
address from a register, called the address register, symbolized by AR. The data are transferred
to another register, called the data register, symbolized by DR. The read operation can be stated
as follows:

Read: DR ← M [AR]

This causes a transfer of information into DR from the memory word M selected by the address
in AR.
The write operation transfers the content of a data register to a memory word M selected by the
address. Assume that the input data are in register R l and the address is in AR. The write
operation can be stated symbolically as follows:

Write: M [AR] ← R1

This causes a transfer of information from R1 into the memory word M selected by the address
in AR.

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