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Stp9Nk65Z Stp9Nk65Zfp: N-Channel 650V - 1 - 6.4A To-220/To-220Fp Zener-Protected Supermesh™Power Mosfet

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STP9NK65Z

STP9NK65ZFP
N-CHANNEL 650V - 1Ω - 6.4A TO-220/TO-220FP
Zener-Protected SuperMESH™Power MOSFET

TYPE VDSS RDS(on) ID Pw


STP9NK65Z 650 V < 1.2 Ω 6.4 A 125 W
STP9NK65ZFP 650 V < 1.2 Ω 6.4 A 30 W
■ TYPICAL RDS(on) = 1 Ω
■ EXTREMELY HIGH dv/dt CAPABILITY
■ 100% AVALANCHE TESTED 3
2
3
■ GATE CHARGE MINIMIZED 1 2
1
■ VERY LOW INTRINSIC CAPACITANCES
■ VERY GOOD MANUFACTURING TO-220 TO-220FP
REPEATIBILITY

DESCRIPTION
The SuperMESH™ series is obtained through an
extreme optimization of ST’s well established strip-
based PowerMESH™ layout. In addition to pushing
on-resistance significantly down, special care is tak- INTERNAL SCHEMATIC DIAGRAM
en to ensure a very good dv/dt capability for the
most demanding applications. Such series comple-
ments ST full range of high voltage MOSFETs in-
cluding revolutionary MDmesh™ products.

APPLICATIONS
■ HIGH CURRENT, HIGH SPEED SWITCHING
■ IDEAL FOR OFF-LINE POWER SUPPLIES,

ADAPTORS AND PFC


■ LIGHTING

ORDERING INFORMATION
SALES TYPE MARKING PACKAGE PACKAGING
STP9NK65Z P9NK65Z TO-220 TUBE
STP9NK65ZFP P9NK65ZFP TO-220FP TUBE

August 2002 1/10


STP9NK65Z - STP9NK65ZFP

ABSOLUTE MAXIMUM RATINGS


Symbol Parameter Value Unit
STP9NK65Z STP9NK65ZFP
VDS Drain-source Voltage (VGS = 0) 650 V
VDGR Drain-gate Voltage (RGS = 20 kΩ) 650 V
VGS Gate- source Voltage ± 30 V
ID Drain Current (continuous) at TC = 25°C 6.4 6.4 (*) A
ID Drain Current (continuous) at TC = 100°C 4 4(*) A
IDM () Drain Current (pulsed) 25.6 25.6 (*) A
PTOT Total Dissipation at TC = 25°C 125 30 W
Derating Factor 1 0.24 W/°C
VESD(G-S) Gate source ESD(HBM-C=100pF, R=1.5KΩ) 4000 V
dv/dt (1) Peak Diode Recovery voltage slope 4.5 V/ns
VISO Insulation Withstand Voltage (DC) - 2500 V
Tj Operating Junction Temperature -55 to 150 °C
Tstg Storage Temperature -55 to 150 °C
( ) Pulse width limited by safe operating area
(1) ISD ≤6.4 A, di/dt ≤200A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX.
(*) Limited only by maximum temperature allowed

THERMAL DATA
TO-220 TO-220FP
Rthj-case Thermal Resistance Junction-case Max 1 4.2 °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W
Tl Maximum Lead Temperature For Soldering Purpose 300 °C

AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Unit
IAR Avalanche Current, Repetitive or Not-Repetitive 6.4 A
(pulse width limited by Tj max)
EAS Single Pulse Avalanche Energy 200 mJ
(starting Tj = 25 °C, ID = IAR, VDD = 50 V)

GATE-SOURCE ZENER DIODE


Symbol Parameter Test Conditions Min. Typ. Max. Unit
BVGSO Gate-Source Breakdown Igs=± 1mA (Open Drain) 30 V
Voltage

PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES


The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the
usage of external components.

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STP9NK65Z - STP9NK65ZFP

ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED)


ON/OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V(BR)DSS Drain-source ID = 1 mA, VGS = 0 650 V
Breakdown Voltage
IDSS Zero Gate Voltage VDS = Max Rating 1 µA
Drain Current (VGS = 0) VDS = Max Rating, TC = 125 °C 50 µA
IGSS Gate-body Leakage VGS = ± 20V ±10 µA
Current (VDS = 0)
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 100µA 3 3.75 4.5 V
RDS(on) Static Drain-source On VGS = 10V, ID = 3.2 A 1 1.2 Ω
Resistance

DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
gfs (1) Forward Transconductance VDS = 15 V, ID = 3.2 A 6 S
Ciss Input Capacitance VDS = 25V, f = 1 MHz, VGS = 0 1145 pF
Coss Output Capacitance 130 pF
Crss Reverse Transfer 28 pF
Capacitance
Coss eq. (3) Equivalent Output VGS = 0V, VDS = 0V to 400V 55 pF
Capacitance
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
td(on) Turn-on Delay Time VDD = 325 V, ID = 3.2 A 20 ns
tr Rise Time RG = 4.7Ω VGS = 10 V 12 ns
(Resistive Load see, Figure 3)
Qg Total Gate Charge VDD = 520 V, ID = 6.4 A, 41 57 nC
Qgs Gate-Source Charge VGS = 10 V 7.5 nC
Qgd Gate-Drain Charge 22 nC

SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
td(off) Turn-off Delay Time VDD = 325 V, ID = 3.2 A 45 ns
tf Fall Time RG = 4.7Ω VGS = 10 V 15 ns
(Resistive Load see, Figure 3)
tr(Voff) Off-voltage Rise Time VDD = 520 V, ID = 6.4 A, 12 ns
tf Fall Time RG = 4.7Ω, VGS = 10 V 12 ns
tc Cross-over Time (Inductive Load see, Figure 5) 20 ns

SOURCE DRAIN DIODE


Symbol Parameter Test Conditions Min. Typ. Max. Unit
ISD Source-drain Current 6.4 A
ISDM (2) Source-drain Current (pulsed) 25.6 A
VSD (1) Forward On Voltage ISD = 6.4 A, VGS = 0 1.6 V
trr Reverse Recovery Time ISD = 6.4 A, di/dt = 100 A/µs 400 ns
Qrr Reverse Recovery Charge VDD = 50 V, Tj = 150°C 2600 nC
IRRM Reverse Recovery Current (see test circuit, Figure 5) 13 A
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
3. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80%
VDSS.

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STP9NK65Z - STP9NK65ZFP

Safe Operating Area For TO-220 Safe Operating Area For TO-220FP

Thermal Impedance For TO-220 Thermal Impedance For TO-220FP

Output Characteristics Transfer Characteristics

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STP9NK65Z - STP9NK65ZFP

Transconductance Static Drain-source On Resistance

Gate Charge vs Gate-source Voltage Capacitance Variations

Normalized Gate Threshold Voltage vs Temp. Normalized On Resistance vs Temperature

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STP9NK65Z - STP9NK65ZFP

Source-drain Diode Forward Characteristics Normalized BVDSS vs Temperature

Maximum Avalanche Energy vs Temperature

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STP9NK65Z - STP9NK65ZFP

Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform

Fig. 3: Switching Times Test Circuit For Fig. 4: Gate Charge test Circuit
Resistive Load

Fig. 5: Test Circuit For Inductive Load Switching


And Diode Recovery Times

7/10
STP9NK65Z - STP9NK65ZFP

TO-220 MECHANICAL DATA

mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.40 4.60 0.173 0.181
C 1.23 1.32 0.048 0.051
D 2.40 2.72 0.094 0.107
D1 1.27 0.050
E 0.49 0.70 0.019 0.027
F 0.61 0.88 0.024 0.034
F1 1.14 1.70 0.044 0.067
F2 1.14 1.70 0.044 0.067
G 4.95 5.15 0.194 0.203
G1 2.4 2.7 0.094 0.106
H2 10.0 10.40 0.393 0.409
L2 16.4 0.645
L4 13.0 14.0 0.511 0.551
L5 2.65 2.95 0.104 0.116
L6 15.25 15.75 0.600 0.620
L7 6.2 6.6 0.244 0.260
L9 3.5 3.93 0.137 0.154
DIA. 3.75 3.85 0.147 0.151

E
A

D
C

D1

L2
F1

G1

H2
G

Dia.
F
F2

L5
L9
L7
L6 L4
P011C

8/10
STP9NK65Z - STP9NK65ZFP

TO-220FP MECHANICAL DATA

mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
A 4.4 4.6 0.173 0.181
B 2.5 2.7 0.098 0.106
D 2.5 2.75 0.098 0.108
E 0.45 0.7 0.017 0.027
F 0.75 1 0.030 0.039
F1 1.15 1.5 0.045 0.067
F2 1.15 1.5 0.045 0.067
G 4.95 5.2 0.195 0.204
G1 2.4 2.7 0.094 0.106
H 10 10.4 0.393 0.409
L2 16 0.630
L3 28.6 30.6 1.126 1.204
L4 9.8 10.6 .0385 0.417
L5 2.9 3.6 0.114 0.141
L6 15.9 16.4 0.626 0.645
L7 9 9.3 0.354 0.366
Ø 3 3.2 0.118 0.126

E
A

D
B

L3
L6
L7
F1

¯
F

G1

G
H

F2

1 2 3
L5
L2 L4

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STP9NK65Z - STP9NK65ZFP

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
© The ST logo is a registered trademark of STMicroelectronics

© 2002 STMicroelectronics - Printed in Italy - All Rights Reserved


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10/10
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