Laboratory Manual Operational Amplifiers and Linear Integrated Circuits Fiore
Laboratory Manual Operational Amplifiers and Linear Integrated Circuits Fiore
Laboratory Manual Operational Amplifiers and Linear Integrated Circuits Fiore
MANUAL:
OPERATIONAL
AMPLIFIERS AND
LINEAR INTEGRATED
CIRCUITS
James M. Fiore
Mohawk Valley Community College
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5: THE INVERTING VOLTAGE AMPLIFIER
In this exercise, the performance of the inverting voltage amplifier will be examined. The investigation will include the effect of
feedback resistors on setting voltage gain, stability of gain with differing op amps, and the concept of virtual ground.
8: GAIN-BANDWIDTH PRODUCT
8.1: THEORY OVERVIEW
8.2: REFERENCE
8.3: EQUIPMENT
8.4: COMPONENTS
8.5: SCHEMATICS
8.6: PROCEDURE
8.7: DATA TABLES
8.8: QUESTIONS
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10.4: COMPONENTS
10.5: SCHEMATICS
10.6: PROCEDURE
10.7: DATA TABLES
10.8: QUESTIONS
11: DC OFFSET
11.1: THEORY OVERVIEW
11.2: REFERENCE
11.3: EQUIPMENT
11.4: COMPONENTS
11.5: SCHEMATICS
11.6: PROCEDURE
11.7: DATA TABLES
11.8: QUESTIONS
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16: THE TRIANGLE-SQUARE GENERATOR
16.1: THEORY OVERVIEW
16.2: REFERENCE
16.3: EQUIPMENT
16.4: COMPONENTS
16.5: SCHEMATICS
16.6: PROCEDURE
16.7: DATA TABLES
16.8: QUESTIONS
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21.7: DATA TABLES
21.8: QUESTIONS
BACK MATTER
INDEX
GLOSSARY
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CHAPTER OVERVIEW
1: DECIBELS AND BODE PLOTS
In this exercise, the usage of decibel measurements and Bode plots will be examined. The investigation will include the relationship
between ordinary and decibel gain, and the decibel-amplitude and phase response of a simple lag network.
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1.1: Theory Overview
The decibel is a logarithmic-based measurement scheme. It is based on ratios of change. Positive values indicate an
increase while negative values indicate a decrease. Decibel schemes can be used for gains and, with minor modification,
signal levels. A Bode plot shows the variations of gain (typically expressed in decibels) and phase across a range of
frequencies for some particular circuit. These will prove to be very valuable in later design and analysis work.
Figure 1.5.1
Figure 1.5.2
22k Ω
10k Ω
4k7 Ω
1k Ω
100 Ω
Table 1.7.1
Theoretical f c
Experimental f c
Table 1.7.2
Factor Frequency Av
′
Phase
.1 f c
.2 f c
.5 f c
fc
2f c
5f c
10 f c
Table 1.7.3
3. What would the plot of step 13 look like if ordinary gains had been used instead of decibel gains?
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2.1: Theory Overview
The ideal differential amplifier is perfectly symmetrical producing identical DC input bias currents and output collector
voltages. Several factors ranging from the mismatch of transistor parameters to resistor tolerances prevent perfect
symmetry in a practical circuit. The DC quality of the circuit can be expressed in terms of the mismatches. The difference
between the input bias currents is known as the input offset current. The difference between the output collector voltages is
known as the output offset voltage. For AC performance, the primary items of concern are the differential and common-
mode gains. The ideal differential amplifier will only amplify differential input signals, and thus, has a common-mode gain
of zero. Due to component mismatches and internal design limits, the common-mode gain is never zero, allowing some
portion of the common-mode input signal to make its way to the output. The measure of the suppression of common-mode
signals is given by the common-mode rejection-ratio, or CMRR. CMRR can be found by dividing the differential gain by
the common-mode gain.
Figure 2.5.1
Figure 2.5.2
2.6.2: AC Parameters
5. Calculate the differential voltage gain and collector voltages for the amplifier of Figure 2.5.2 using an input of 20
millivolts, and record them in Table 2.7.2.
6. Assemble the circuit of Figure 2.5.2.
7. Set the generator to a 1 kHz sine wave, 20 millivolts peak.
8. Apply the generator to the amplifier. Measure and record the AC collector voltages in Table 2.7.2 while noting the phase
relative to the input. Also, compute the resulting experimental voltage gain from the input to collector one, and the
deviations.
9. Apply the generator to both inputs. Set the generator’s output to 1 volt peak.
10. Measure the AC voltage at collector one and record it in Table 2.7.3.
11. Based on the value measured in step 10, compute and record the common-mode gain and CMRR in Table 2.7.3.
2.6.4: Troubleshooting
14. Continuing with the amplifier of Figure 2.5.3, turn the signal down to 0. Estimate and then measure the results for each
individual error presented in Table 2.7.5.
IB1
IB2
Iin−bias
Iin−offset n/a
VC 1
VC 2
Vout−offset n/a
Table 2.7.1
AC Quantity Theoretical Experimental % Deviation
VC 1
VC 2
Av
Table 2.7.2
VC 1
Acm
CMRR
Table 2.7.3
VC 1
Acm
CMRR
Table 2.7.4
Error Quantity Estimate Actual
Q1
′
s 4k7 is 470 VC 1 DC
Both 4k7 are 470 VC 1 DC
Table 2.7.5
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3.1: Theory Overview
The open-loop voltage gain of the typical op amp is very high, approaching 100,000 at low frequencies. With such a high
gain, even minute differences between the inverting and non-inverting input signals will be magnified to the point of
causing saturation. Thus, if the non-inverting input signal exceeds the inverting input signal, the output will be at positive
saturation. If the signals are reversed, then negative saturation results. If both inputs are identical, then the output will go to
either positive or negative saturation, depending on the internal offsets of the op amp.
Figure 3.5.1
5. Connect V to point A. Measure the output voltage and save a copy of the oscilloscope display as Graph 1.
2
6. Connect V to point B. Measure the output voltage and save a copy of the oscilloscope display as Graph 2.
2
7. Connect V to point C. Measure the output voltage and save a copy of the oscilloscope display as Graph 3.
2
A
B
C
Table 3.7.1
V1 V2 Vout
A A
A B
A C
B A
B B
B C
C A
C B
C C
Table 3.7.2
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4.1: Theory Overview
The non-inverting voltage amplifier is based on series-parallel negative feedback. As the ideal voltage-controlled voltage
source, this amplifier exhibits high input impedance, low output impedance, and stable voltage gain. The voltage gain is
set by the two feedback resistors, R and R .
i f
Figure 4.5.1
Figure 4.5.2
Calculate the voltage gains for the amplifier of Figure 4.5.1 for the R values specified, and record them in Table 4.7.1.
f
6. For any given R , R combination, the voltage gain should be stable regardless of the precise op amp used, even if it is
i f
the voltage across the 100k) in Table 4.7.3. Using KVL, determine the voltage from point X to ground (V ) and record in
B
Table 4.7.3 (don’t forget to compensate for peak versus RMS readings). Finally, compute the resulting input impedance by
using the voltage divider rule. Note: If the DMM is not sensitive enough and registers 0 volts for V , it is safe to assume
A
this portion. Replace the general purpose generator with the low distortion sine source set to 1 kHz. Adjust its output level
so that the output of the op amp is approximately 0 dBV.
15. Apply the distortion analyzer to the output of the op amp, read the resulting THD percentage and record it in Table
4.7.4.
16. Repeat steps 14 and 15 using the remaining R values in Table 4.7.4.
f
4.6.2: Troubleshooting
17. Continuing with the amplifier of Figure 4.5.1, reset Rf to 4k7 Ω . Estimate and then measure the results for each
individual error presented in Table 4.7.5.
4k7 Ω
10k Ω
22k Ω
33k Ω
47k Ω
Table 4.7.1
Op Amp Theoretical A
v Vout Experimental A
v % Deviation
1
2
3
Table 4.7.2
VA VB Zin
Table 4.7.3
Rf % THD
10k Ω
22k Ω
47k Ω
Table 4.7.4
Error Quantity Estimate Actual
Table 4.7.5
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5.1: Theory Overview
The inverting voltage amplifier is based on parallel-parallel negative feedback. This amplifier exhibits modest input
impedance, low output impedance, and stable inverting voltage gain. The voltage gain is set by the two feedback resistors,
R and R .
i f
Figure 5.5.1
Calculate the voltage gains for the amplifier of Figure 5.5.1 for the R values specified, and record them in Table 5.7.1.
f
6. For any given R , R combination, the voltage gain should be stable regardless of the precise op amp used, even if it is
i f
4k7 Ω
10k Ω
22k Ω
33k Ω
47k Ω
Table 5.7.1
Op Amp Av Theory Vout Experimental A
v % Deviation
1
2
3
Table 5.7.2
V_{inverting-input}\)
Table 5.7.3
In this exercise, the performance of an op amp based differential amplifier will be examined. The investigation will include the effects
of differential gain and common-mode rejection ratio (CMRR).
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6.1: Theory Overview
An op amp differential amplifier can be created by combining both a non-inverting voltage amplifier and an inverting
voltage amplifier in a single stage. Proper gain matching between the two paths is essential to maximize the common-
mode rejection ratio. Differential gain is equal to the gain of the inverting path.
Figure 6.5.1
Figure 6.5.2
Table 6.7.1
Input Vout Phase Av
Vinv
Vnon
Table 6.7.1
Circuit Vout Av
Superposition
Common-mode
Differential
Table 6.7.1
Experimental CMRR
Table 6.7.1
In this exercise, the performance of the current-source amplifiers will be examined. The investigation will include the effect of feedback
resistors on setting gain for both the parallel-series inverting current amplifier and the series-series non-inverting voltage-to-current
transducer.
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7.1: Theory Overview
Series-output feedback connections create controlled current sources. This means that the load current will be constant in
spite of changes in load impedance. Two variants are possible. Parallel-input connections create a current-sensing circuit,
thus P-S feedback forms a current-controlled current-source, or ideal current amplifier. The current gain is set by the two
feedback resistors, R and R . Series-input connections create a voltage-sensing circuit, thus S-S feedback forms a
i f
voltage-controlled current-source, or voltage-to-current transducer. The transconductance is set by the feedback resistor
R .
i
Figure 7.5.1
Figure 7.5.2
the expected Iloadfor the circuit of Figure 7.5.1, and record them in Table 7.7.1.
2. Assemble the circuit of Figure 7.5.1 using R = 1k Ω and R
i load = 100 Ω.
3. Set the generator to a 100 Hz sine wave, 1 volt peak.
4. Apply the generator to the amplifier. Measure and record the load current in Table 7.7.1. Also, compute the resulting
theoretical versus experimental deviation.
5. Repeat step 4 for the remaining R values in Table 7.7.1.
i
6. Since the circuit behaves as a constant current source, the value of the load resistance should have no effect on the load
current (within normal parameters). To verify this, change R to 1k Ω and repeat steps 4 and 5, using Table 7.7.2.
load
and Iloadfor the circuit of Figure 7.5.2, and record them in Table 7.7.3.
8. Assemble the circuit of Figure 7.5.2 using 22k Ω for R .f
9. Set the generator to a 100 Hz sine wave, 1 volt peak. Note that the 10k Ω resistor at the input serves to convert the
voltage from the generator into a current. With the values specified, the input current should be approximately 100
microamps.
10. Apply the generator to the amplifier. Measure and record the load current in Table 7.7.3. Also, compute the resulting
current deviation.
11. Repeat step 10 for the remaining R values in Table 7.7.3.
f
7.6.3: Troubleshooting
12. Utilizing the circuit of Figure 7.5.2, suppose that all of the results found in Table 7.7.3 are approximately 10 times
smaller than they should be. Consider and test at least two plausible causes for this scenario, and include the results in the
technical report.
1k Ω
2k2 Ω
3k3 Ω
4k7 Ω
10k Ω
Table 7.7.1
Ri Iload 1k Ω Theory Iload 1k Ω Experiment % Deviation
1k Ω
2k2 Ω
3k3 Ω
4k7 Ω
10k Ω
Table 7.7.2
Rf Ai Theory Iload Theory Iload Experiment % Deviation
22k Ω
10k Ω
4k7 Ω
2k2 Ω
Table 7.7.3
2. Does the load impedance play an appreciable role in setting the load current?
3. What is the effect as R is decreased in the circuit of Figure 7.5.2?
f
4. In practical voltage-source circuits, the load impedance can be too small, forcing the op amp into current limiting with
resulting distortion. Are there similar limits in the current-source circuits?
In this exercise, the upper frequency limit of a typical amplifier will be examined. The investigation will include the effect of voltage
gain on f . Two different measurement techniques will be employed: direct measurement of the 3 dB frequency, and indirect
2
1 12/26/2021
8.1: Theory Overview
The upper break frequency, f , of a typical amplifier is a function of the circuit gain and the op amp’s unity-gain
2
frequency, funity. Typical op amps exhibit a 20 dB per decade roll off slope in their open-loop response. When negative
feedback is applied, this results in a direct tradeoff between closed-loop gain and f . Any increase in gain results in an
2
equivalent decrease in f , and vice versa. In other words, the product of closed-loop gain and f must be a constant. This
2 2
Figure 8.5.1
the op amp. Calculate the f values for the amplifier of Figure 8.5.1 for the R values specified, and record them in Table
2 f
8.7.1.
2. Assemble the circuit of Figure 8.5.1 using the 4k7 Ω resistor.
3. Set the generator to a 100 Hz sine wave.
4. Apply the generator to the amplifier and adjust its level to achieve a 5 volt peak signal out of the op amp. Measure the
input voltage and compute the resulting voltage gain. Record this voltage gain in Table 8.7.1.
5. Increase the frequency until the op amp’s output voltage drops 3 dB (i.e., to 0.707 times 5 volts peak). Record this
frequency in Table 8.7.1 as the experimental f . 2
6. Compute the experimental funity by multiplying the experimental voltage gain by the experimental f2 , and enter this
value in Table 8.7.1.
7. Repeat steps 3 through 6 for the remaining R values in Table 8.7.1. Note that the values in the experimental
f funity
column should be consistent with the f specified in the device data sheet.
unity
8. An alternate method to determine f is to measure the rise time of an output square wave. To follow this method, first
2
11. Compute the experimental f unity by multiplying the experimental voltage gain from Table 8.7.1 by the experimental f 2
Table 8.7.3 and compare them to the f values measured in Tables 8.7.1 and 8.7.2. Include the graph for the 4k7 with the
2
technical report.
4k7 Ω
10k Ω
22k Ω
33k Ω
47k Ω
Table 8.7.1
Rf Trise Experiment f2 Experiment funity Experiment
4k7 Ω
10k Ω
22k Ω
33k Ω
47k Ω
Table 8.7.2
Rf f2 Simulation
4k7 Ω
10k Ω
22k Ω
33k Ω
47k Ω
Table \(\PageIndex{3}\
3. Is f
unity a constant across a wide range of voltage gains?
4. How would the results of this exercise differ if an op amp with a considerably higher f
unity was used?
In this exercise, the effects of slew rate on pulse and sinusoidal waveforms will be examined.
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9.1: Theory Overview
Slew rate places an upper “speed limit” on the rate of change of output voltage. This tends to slow the rising and falling
edges of pulse signals, turning them into a trapezoidal shape. In the case of sinusoidal signals, slew rate limiting tends to
turn waves into a more triangular shape. The maximum non-slewed sine wave frequency for a given output amplitude is
termed the power bandwidth, or f max . Any output signal that exceeds the power bandwidth at the stated output amplitude
will exhibit slew rate induced distortion. Slew rate is determined by the internal characteristics of a given op amp. In most
op amps, circuit gain or feedback resistor values do not affect the slew rate.
Figure 9.5.1
2. Look up the typical slew rates for the three op amps and place them in Table 9.7.2.
3. Assemble the circuit of Figure 9.5.1 using the 22k Ω resistor and the slowest op amp.
4. Set the generator to a 1 kHz square wave.
5. Apply the generator to the amplifier and adjust the generator’s amplitude to achieve a clipped signal at the output of the
op amp. Make sure that the edges of the waveform are sharp, and not rounded. Expand the time scale so that the rising
edge fills the oscilloscope display. Measure and record the slew rate in Table 9.7.1.
6. Repeat step 5 for the remaining R values in Table 9.7.1.
f
8. Apply the generator to the amplifier and adjust the generator’s amplitude to achieve a clipped signal at the output of the
op amp. Save a copy of the oscilloscope display showing approximately one cycle of the waveform. Measure and record
the slew rate in Table 9.7.2.
9. Repeat step 8 for the other op amps in Table 9.7.2.
10. Using a peak sine wave output of 10 volts, compute the theoretical power bandwidth for each of the op amps in Table
9.7.3.
11. Set the generator to a 1 kHz sine wave.
12. Apply the generator to the amplifier and adjust the generator’s amplitude to achieve a 10 volt peak signal at the output
of the op amp.
13. While monitoring the amplifier’s output signal with the oscilloscope, increase the frequency until slew rate limiting
occurs (the waveform will start to appear triangular). The point at which slew rate limiting just begins is not easy to
discern by eye. If the waveform is triangular, then the op amp is well into slew rate limiting. Gradually decrease the
frequency until the waveform distortion just seems to disappear. Record the frequency as the experimental f in Table
max
9.7.3.
14. Repeat steps 11 through 13 for the remaining op amps in Table 9.7.3.
22k Ω
33k Ω
47k Ω
Table 9.7.1
Op Amp Slew Rate Theory Slew Rate Experiment
1
2
3
Table 9.7.2
Op Amp fmax Theory fmax Experiment % Deviation
1
2
3
Table 9.7.3
In this exercise, the performance of a typical non-compensated op amp, the 301, will be examined. The investigation will include the
effect of the external compensation capacitor on voltage gain, closed-loop bandwidth and slew rate.
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10.1: Theory Overview
Op amps usually contain an internal compensation capacitor, C . This capacitor enforces a 20 dB per decade gain slope up
c
to the unity-gain frequency, and allows stable voltage gains down to unity. Unfortunately, this will not normally produce
optimal values for small signal bandwidth and slew rate for gains considerably greater than unity. In the case where unity-
gain stability is not required, a smaller value for C may be used, resulting in improved bandwidth and slew rate. Non-
c
compensated op amps include connections for an external compensation capacitor that can be adjusted for optimal
performance.
Figure 10.5.1
Table 10.7.1
Cc Vin Av f2 SR
150 pF
33 pF
10 pF
Table 10.7.2
4. What is the effect on small signal bandwidth and power bandwidth as C is decreased?
c
5. How does this op amp compare with a typical compensated op amp such as the 741?
In this exercise, the effect of DC offsets will be examined. The investigation will include the effect of voltage gain and op amp on the
magnitude of offset, as well as standard techniques to null or remove offsets.
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11.1: Theory Overview
A DC offset is an undesirable effect. Due to internal mismatches in the op amp, a DC signal may be present at the output
of an amplifier. This generally does not present a problem for an AC amplifier, but it does lead to ambiguity in the output
of a DC amplifier. A DC offset may be either positive or negative. The magnitude of the offset is proportional to the gain
of the amplifier and the size of the feedback resistors. It also depends on the “luck of the draw,” in other words, just how
well matched the internals of a given op amp happen to be.
Figure 11.5.1
Figure 11.5.2
2. The worst case output offset may be approximated by multiplying the worst case V found in the op amp’s data sheet
os
by the voltage gain. This ignores the effect of the feedback resistor values. Calculate the offsets for the gains found in step
1, and record the values in Table 11.7.1.
3. Assemble the circuit of Figure 11.5.1 using the 4k7 Ω resistor.
4. Measure and record the DC output offset voltage in Table 11.7.1.
5. Repeat step 4 for the remaining R values in Table 11.7.1.
f
6. Compute the resulting experimental V values by dividing the output offsets by the corresponding voltage gains. The
os
experimental V values should be no larger than the value specified in the data sheet, although they may be considerably
os
smaller. Finally, compute the offset deviations. Note that the V and deviation values should be fairly constant through the
os
table.
7. Since the actual V of any given op amp can range between +/– V worst case, a different device may produce
os os
considerably different values from those in Table 11.7.1. To verify this, repeat steps 3 through 6 for a second op amp, and
record your results in Table 11.7.2.
8. Manufacturers normally allow for output nulling through the addition of external circuitry. Modify the circuit by adding
the components shown in Figure 11.5.2. Using the 47k Ω resistor for Rf, adjust the potentiometer to null the output. Also,
record the DC output voltage with the potentiometer fully clockwise and fully counterclockwise.
to determine the DC output voltage. Compare this to the results measured in Tables 11.7.1 and 11.7.2. Repeat the
simulation with all resistors 10 times larger, and again with all resistors 100 times larger.
4k7 Ω
10k Ω
22k Ω
33k Ω
47k Ω
Table 11.7.1
Rf Av Theory Vout Theory Vout Experiment Vos Experiment % Deviation
4k7 Ω
10k Ω
22k Ω
33k Ω
47k Ω
Table 11.7.2
Potentiometer Vout
CW
CCW
Table 11.7.3
3. Given the range of adjustment found in Table 11.7.3 along with the data from Tables 11.7.1 and 11.7.2, is it likely that
the circuitry of Figure 11.5.1 will be sufficient to correct for the offset produced by a worst case op amp? Explain.
4. Based on the simulation results, is it safe to say that output DC offset is only affected by voltage gain and not the
specific feedback resistor values used?
In this exercise, an application of the operational transconductance amplifier (OTA) will be examined. The application is that of a
voltage-controlled amplifier (VCA). The VCA has use in a variety of areas including automatic gain control, audio level compressors
and amplitude modulators.
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12.1: Theory Overview
The gain of the OTA is a function of a programming current, I . Since I may be derived from other electronic signals,
abc abc
complex dynamic gains are possible. Further, because the OTA tends to behave as an ideal current source (i.e., it exhibits a
high output impedance), a constant voltage output is best rendered through the use of a following current-to-voltage
transducer. Finally, the OTA can only tolerate fairly small input signals, so some form of input attenuation is normally
used.
Figure 12.5.1
ground. Finally, adjust the potentiometer until V is 0 VDC. The circuit is now nulled. Unhook the resistor and control
out
–3 VDC
–2 VDC
–1 VDC
0 VDC
+1 VDC
+2 VDC
+3 VDC
Table 12.7.1
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13.1: Theory Overview
Simple passive diode circuits cannot rectify small signals accurately. The forward bias potential of the diode acts as a
constant barrier. By placing the diode inside the feedback loop of an op amp, the forward bias potential can be
compensated for to a great extent. Both half-wave and full-wave circuits can be created in this fashion. Further, the
addition of load capacitance can be used to create a simple envelope detector. On the downside, the frequency response of
precision rectifiers is limited by the op amp(s) used.
Figure 13.5.1
Figure 13.5.2
13.6.3: Troubleshooting
18. Continuing with the circuit of Figure 13.5.2, estimate and then measure the results for each individual error presented
in Table 13.7.1.
as Graphs 1 and 2.
D2 is shorted Vout
Table 13.7.1
In this exercise, the concept of function generation will be examined. The investigation will include the use of both biased diode
networks and Zener diodes. Increasing as well as decreasing gain curves will be used.
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14.1: Theory Overview
The gain of an amplifier can be nonlinear if the feedback resistors themselves are nonlinear. By shunting feedback resistors
with resistor-diode networks, the effective feedback resistance decreases as the input signal increases. If this network is
placed across R , then an increasing gain function will be created. If the network is placed across R , then a decreasing
i f
gain function will be created. By combining several resistor-diode sections, complex transfer curves can be created.
Figure 14.5.1
Figure 14.5.2
14.6.3: Troubleshooting
11. Continuing with the circuit of Figure 14.5.2, estimate and then measure the results for each individual error presented
in Table 14.7.3.
Positive break-point
Negative break-point
Table 14.7.1
Base voltage gain
First break-point
Second break-point
Table 14.7.2
Error Quantity Estimate Actual
Table 14.7.3
In this exercise, the performance of a simple op amp-based linear regulator will be examined. The investigation will include the effect of
scaling resistors on the load voltage and the usage of a current pass transistor.
1 12/26/2021
15.1: Theory Overview
Regulators are used to create a stable, clean DC voltage to power other electronic systems. The regulator voltage should
not change as its load changes. A linear regulator may be based on a series-parallel feedback loop, using an op amp as a
controller. The op amp compares a scaled version of the load voltage to a reference voltage. By changing either the
reference or the scaling factor, a range of load voltages may be obtained. Because op amps typically produce insufficient
current to drive many loads, a current pass transistor is used to boost output current capability.
Figure 15.5.1
1 +R scale/47k Ω). Changes to the load resistor should cause no change in the load voltage. Also, note that I is equal to out
the transistor’s β times the output current of the op amp. The transistor is therefore being used as a current booster, and
because it is located inside of the feedback loop, it should not affect the load voltage.
3. Connect the circuit of Figure 15.5.1 using an R scale of 47k Ω, and an R load of 100k Ω.
4. Calculate and record the values for V , I , I
load load out , and I out−op−amp in Table 15.7.1. A typical β would be in the range
of 50 to 100, depending on the pass transistor used.
5. Measure and record the values for V load ,Iload ,I out , and I
out−op−amp (i.e., at point A) in Table 15.7.2.
6. Change R scale to 100k Ω and repeat steps 4 and 5.
7. Change R scale back to 47k Ω, change R load to 100 Ω and repeat steps 4, 5, and 6.
equal to 100 Ω and R equal to 100k Ω. To create the ripple, simply insert an AC power source in series with the 20
scale
volt DC source (i.e., inserted between ground and the negative terminal of the 20 volt source). Set the AC source to 120 Hz
and 2 volts peak. This will mimic filtered full-wave rectified 60 Hz power ripple. Run a Transient Analysis to determine
the load voltage. In the technical report, include a plot of the simulated load voltage along with the voltage applied to the
collector of the pass transistor.
100k Ω 47k Ω
100k Ω 100kΩ
100 Ω 47k Ω
100 Ω 100k Ω
100k Ω 47k Ω
100k Ω 100kΩ
100 Ω 47k Ω
100 Ω 100k Ω
In this exercise, a simultaneous triangle-square wave generator is examined. The investigation will include the effect of capacitance on
output frequency, and the role of op amp speed in determining ideal wave shapes.
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16.1: Theory Overview
The triangle-square generator consists of two main parts: a comparator and a ramp generator or integrator. The circuit is
self-sustaining by nature. The ramp generator requires a square wave input. It gets this signal from the comparator. The
comparator in turn generates the square wave from the triangle wave appearing at the output of the ramp generator. The
output frequency is determined primarily by the RC timing values of the ramp generator, and secondarily by the switching
thresholds of the comparator. The practical output frequency limit is set by the bandwidth and slew rate of the op amps. At
higher frequencies, slew rate limiting will noticeably slow the edges of the square wave. This will impact the output of the
ramp generator and will affect both the linearity of the wave shapes and the output frequency.
Figure 16.5.1
16.6.1: Troubleshooting
11. Estimate and then measure the results for each individual error presented in Table 16.7.3.
fout
Vout
Table 16.7.1
Theoretical Experimental % Deviation
fout
Vout
Table 16.7.2
Error Quantity Estimate Actual
Table 16.7.3
In this exercise, a Wien bridge sine wave generator is examined. The investigation will include the effect of capacitance on output
frequency and gain control of the op amp.
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17.1: Theory Overview
The Wien bridge is a four element resistor-capacitor network that can be thought of as a combination of lead and lag
networks. As such, it attenuates very high and very low frequencies. At its critical frequency, where the magnitude of X c
equals R , the bridge voltage produces no phase shift and exhibits a modest signal loss of 1/3. An op amp with a voltage
gain of 3 may be used to overcome this loss, and as long it produces no additional phase shift, the system can produce
stable oscillation at the critical frequency. A non-inverting amplifier is ideally suited to this task. The gain needs to be
slightly greater than 3 to begin oscillation and should fall back to 3 to maintain oscillation. The gain variation may be
achieved through the use of limiting diodes in the negative feedback network.
Figure 17.5.1
in the simulator with a 741 op amp and 10n F capacitors. First perform a Transient Analysis and inspect the output wave
shape. Replace the 2k7 with larger values and note the effect on the wave shape. Finally, return the resistor to 2k7, delete
the two diodes and observe the new wave shape.
fout
Vout
Table 17.7.1
Theoretical Experimental % Deviation
fout
Vout
Table 17.7.2
Theoretical Experimental % Deviation
fout
Vout
Table 17.7.3
In this exercise, the concept of waveform integration will be examined. The investigation will include the effect of frequency on
accurate and useful integration. Several waveshapes will be utilized.
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18.1: Theory Overview
The concept of integration is usually described as “finding the area under the curve”. There are many uses for this
function, including waveshaping and analog computing. An ordinary amplifier ideally changes only the amplitude of the
input signal. An integrator can change the waveform of the input signal, for example, turning a square wave into a triangle
wave. A practical integrator cannot be used at just any frequency. There exists a useful range of integration, outside of
which the circuit does not produce the desired effect.
Figure 18.5.1
flow
Table 18.7.1
Input Signal Output Signal
Table 18.7.2
In this exercise, the concept of waveform differentiation will be examined. The investigation will include the effect of frequency on
accurate and useful differentiation. Several waveshapes will be utilized.
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19.1: Theory Overview
The concept of differentiation is usually described as “finding the slope of the curve.” There are many uses for this
function, including waveshaping and analog computing. An ordinary amplifier ideally changes only the amplitude of the
input signal. A differentiator can change the waveform of the input signal, for example, turning a triangle wave into a
square wave. A practical differentiator cannot be used at just any frequency. There exists a useful range of differentiation,
outside of which the circuit does not produce the desired effect.
Figure 19.5.1
fhigh
Table 19.7.1
Input Signal Output Signal
Table 19.7.2
In this exercise, the performance of VCVS equal-component high and low pass filters will be examined. The investigation will include
the realization of wide bandwidth band pass filters as well.
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20.1: Theory Overview
Sallen and Key VCVS filters are very straightforward to implement, utilizing a single op amp to create second order high
or low pass filters. The filters are based around a series-parallel non-inverting amplifier. In the equal component variation,
the damping or alignment of the filter is set by the amplifier’s pass band voltage gain. The corner frequency of the filter is
set by the tuning resistors and capacitors.
Figure 20.5.1
Figure 20.5.2
and 10 f . Using these data, create a semi-log plot of the frequency response of the filter. Note, it may be convenient when
2
graphing if at least some of these frequencies are simple octaves apart, such as 5 f and 10 f .
2 2
and 10 f . Using these data, create a semi-log plot of the frequency response of the filter.
1
f2
Av
Table 20.7.1
Frequency Gain
Table 20.7.2
Theoretical Experimental
f1
Av
Table 20.7.3
Frequency Gain
Table 20.7.4
Frequency Gain
Table 20.7.5
3. What would be the result of the cascade if the critical frequencies of the two filters were mistakenly transposed?
In this exercise, the performance of basic band-pass filters will be examined. The investigation will include the investigation of variable
Q or bandwidth.
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21.1: Theory Overview
Multiple feedback filters are very straightforward to implement, utilizing a single op amp to create second order band-pass
filters. The filters are based around a parallel-parallel inverting amplifier. The center frequency of the filter is set by the
tuning resistors and capacitors.
Figure 21.5.1
is found. Record this frequency in Table 21.7.1. Measure the output amplitude, determine the gain and record this in Table
21.7.1 as well.
4. In Table 21.7.2, record the dB gain of the filter at 5 frequencies between 0.1 f and f , and at 5 frequencies between f
0 0 0
and 10 f . Using these data, plot a graph of the filter response, and determine the bandwidth and Q of the filter.
0
5. Replace the capacitors with the 100n F units and repeat steps 3 and 4 using Tables 21.7.3 and 21.7.4.
6. The circuit resistors set the Q of the filter. To alter the Q of this circuit, replace the 2k2 with 1k2, the 22k with 39k, and
the 47k with 75k.
7. Repeat steps 3 and 4 using Tables 21.7.5 and 21.7.6.
f0
Av
Table 21.7.1
Frequency Gain
Table 21.7.2
Theoretical Experimental
f0
Av
Table 21.7.3
Frequency Gain
Table 21.7.4
Theoretical Experimental
f0
Av
Table 21.7.5
Frequency Gain
Table 21.7.6
2. For the original circuit, what is the approximate attenuation slope below f ?
0
In this exercise, the performance of a state-variable filter will be examined. The investigation will include the effect of varying Q and
tuning frequency.
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22.1: Theory Overview
The state-variable filter, also known as the universal filter, provides several outputs, including high-pass, low-pass, and
band-pass connections. The filter offers independent control over bandwidth (Q) and tuning frequency (f ). State-variable
c
Figure 22.5.1
You will find the following formulas useful:
fc = 1/(2π Rt Ct )
3. Set Q to its highest value. This can be accomplished by adjusting the Q potentiometer for minimum resistance.
4. Apply a 0 dBV sine wave at approximately 1 kHz to the input.
5. Set the filter tuning to its highest value. This can be accomplished by adjusting R to minimum.
t
6. Sweep the input frequency until a peak output is found. Record this frequency and amplitude in Table 22.7.2.
7. Record the –3 dB, –6 dB, and –10 dB frequencies on either side of the peak, in Table 22.7.2. These amplitudes are
relative to the level found at the peak.
8. Set the Q adjust to its lowest value (i.e., R at maximum) and repeat steps 4 through 7, using Table 22.7.3 to record your
q
results.
9. Set the filter tuning to its minimum value (i.e., Rt at maximum) and repeat steps 4 through 8, using Tables 22.7.4 and
22.7.5 to record your results.
10. If a spectrum analyzer is available, verify your readings.
Minimum Q
Maximum f c
Minimum f c
Band-pass Gain
Table 22.7.1
Item Frequency Amplitude
Peak
−3 dB, below
−6 dB, below
−10 dB, below
−3 dB, above
−6 dB, above
−10 dB, above
Table 22.7.2
Item Frequency Amplitude
Peak
−3 dB, below
−6 dB, below
−10 dB, below
−3 dB, above
−6 dB, above
−10 dB, above
Table 22.7.3
Item Frequency Amplitude
Peak
−3 dB, below
−6 dB, below
−10 dB, below
−3 dB, above
−6 dB, above
−10 dB, above
Table 22.7.4
Item Frequency Amplitude
Peak
−3 dB, below
Attenuation slope
Attenuation slope
Table 22.7.6
3. How does this filter compare to high- and low-pass VCVS filters?
4. How could this circuit be changed in order to control pass-band gain?
5. What effect would altering R have on circuit function?
tb