IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 17, NO.

5, SEPTEMBER 2002 677

A Novel Tri-State Boost Converter

With Fast Dynamics
Kanakasabai Viswanathan, Student Member, IEEE, Ramesh Oruganti, Senior Member, IEEE, and
Dipti Srinivasan, Member, IEEE

Abstract—A challenging problem in the design of boost tional series resistance may even have to be added to satisfy the
converters operating in continuous-conduction mode is posed ESR condition. Furthermore, the compensation requires accu-
by the dynamically shifting right-half-plane (RHP) zero in the rate knowledge of the ESR value, which is temperature-sensi-
converter’s small-signal control-to-output transfer function. The
paper proposes a novel tri-state boost converter without such a
tive and, hence, needs online estimation.
zero in the transfer function. The additional degree of freedom Reference [2] suggests three techniques—reducing the in-
introduced in the converter in the form of a freewheeling interval ductor value, reducing the switching frequency, and operating
has been exploited through an easy control technique to achieve in the discontinuous-conduction mode (DCM). Reducing the
this elimination. The absence of the RHP zero allows the control inductor value does not eliminate the RHP zero but pushes it
scheme to achieve larger bandwidth under closed-loop conditions,
farther into the right-half plane, thus reducing its effect on the
resulting in fast response. Analytical, simulation and experimental
results of the tri-state boost converter have been presented and system response. With a decrease either in the inductor value or
compared with those of the classical boost converter both under in the switching frequency, the ripple and peak currents in the
open-loop and under closed-loop operating conditions. The results components will increase considerably, thereby increasing the
clearly demonstrate the superior dynamic performance of the output filter requirement. The third technique merely uses the
proposed converter. well-known fact that the boost converter possesses excellent dy-
The proposed converter can be used in applications wherever
fast-response boost action is needed.
namic response when operated in the DCM. This solution does
not address the RHP zero problem in the CCM operation. Op-
Index Terms—Boost converter, dc–dc converter, right-half-
eration in DCM increases the peak and ripple currents in the
plane zero, small-signal analysis, tri-state boost converter.
components and would result in lower overall efficiency.
Reference [3] models the RHP zero as a time delay and
I. INTRODUCTION utilizes a “predictor,” which is designed such that when
operated with the boost converter the RHP zero is eliminated.
A CONVENTIONAL boost dc-dc converter suffers from
the well-known problem of right-half-plane (RHP)
zero [1]–[3] in its control-to-output transfer function under
However the work does not address the practical problems in
implementing such a scheme. For example, the predictor model
continuous-conduction mode (CCM). The problem is further used is based on small-signal modeling and may not be able to
compounded due to change in operating point which makes the compensate fully the actual boost operation.
RHP zero move in the complex S-plane. Designers are generally This paper proposes a novel tri-state boost converter (Fig. 1),
forced to limit the overall closed-loop bandwidth to a low fre- which aims to eliminate the RHP zero by incorporating an addi-
quency dictated by the worst-case RHP zero location. Typically, tional degree of control-freedom. The penalty paid is the inclu-
the bandwidth is limited to 1/30th of the switching frequency [1]. sion of an additional switch and a diode. The efficiency of the
The effect due to the RHP zero in a conventional boost con- converter is also reduced due to the additional losses, though
verter in time domain can be explained as follows. For a dip at higher input voltages this reduction in efficiency may not be
in the output voltage due to, say, an increase in the load current, very significant. Several control methods are possible to exploit
the control system increases the duty ratio, which, in turn, causes the additional degree of freedom and this paper proposes one
an increased output-capacitor discharge-time. This results in the such control method which is relatively easy to implement. The
output voltage dipping even further until the inductor current steady-state operation and the small-signal model (under the
builds up to recharge the capacitor. proposed control method) of the tri-state boost converter are also
The method proposed in [1] shows that leading-edge modu- presented in the paper. The superior dynamic performance of the
lation of output voltage can eliminate this RHP zero, provided tri-state converter/control method over the conventional boost
the equivalent series resistance (ESR) of the output capacitor is converter is established thoroughly through computer simula-
above a minimum value. Such a large ESR value will lead to tions and experimental results.
high ripple voltage, which is an important consideration. Addi- The proposed converter can be used in applications wherever
fast-response boost action is needed.
Manuscript received September 5, 2001; revised May 22, 2002. Recom-
mended by Associate Editor C. K. Tse. This work was supported by the II. TRI-STATE BOOST CONVERTER
National University of Singapore under Reasearch Grant R-263-000-190-112.
The authors are with the Department of Electrical and Computer En- Fig. 1 shows two variations of the proposed converter.
gineering, National University of Singapore, Singapore 119260 (e-mail:
engp0925@ nus.edu.sg; eleramsh@nus.edu.sg; elesd@nus.edu.sg). Though there are differences from a practical-implementation
Publisher Item Identifier 10.1109/TPEL.2002.802197. point of view, from the control point of view both converters
0885-8993/02$17.00 © 2002 IEEE
678 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 17, NO. 5, SEPTEMBER 2002

(a)

(a)

(b)

(b)

Fig. 1. Tri-state boost converter: (a) circuit-A and (b) circuit-B.

operate in a similar manner. For example, the switch in

Circuit-A carries less current than that in Circuit-B and hence
Circuit-A can be expected to be more efficient. However in
Circuit-B, the switches and form a totem-pole arrange-
ment and commercial IC MOSFET drivers can be used to drive
them. The rest of the paper specifically focuses on Circuit-B (c)
variation of the converter, though much of the discussion is Fig. 2. Equivalent circuits under different intervals of operation: (a) “free-
D T
wheeling” interval ( ), (b) “boost” interval (D T ), and (c) capacitor-
valid for Circuit-A as well.
The proposed converter under cyclic steady-state has three
D T
charging interval ( ).

intervals of operation (Figs. 2 and 3). In the “freewheeling”

interval ( ), the boost-inductor current is in the free- verter allows the boost interval ( ) to be changed at the ex-
wheeling mode. The switch is ON and is OFF. The pense of the freewheeling interval ( ), without having to
diode D is reverse-biased and the capacitor C supplies the alter the capacitor-charging interval ( ). This results in the
load. In the “boost” interval ( ), both and are ON absence of RHP zero in the tri-state boost converter.
and the inductor current builds up. Once again the diode D is Applying the volt-second balance across the inductor L [see
reverse-biased and capacitor C takes care of the load. In the Fig. 3(b)] and assuming a lossless converter, the dc characteris-
“capacitor-charging” interval ( ), both and are OFF tics of the tri-state boost converter can be shown to be
and the diode D is forward-biased. The inductor current ramps
down as the transfer of power to the load side takes place, with
the capacitor C being charged. It may be noted that (2)

(1)
where is the dc output voltage, is the dc input voltage, is
the dc output current, and is the dc source current. From (2),
Thus, the tri-state converter introduces one more degree of it can be seen that by varying ratio, the output voltage
control-freedom, on account of the freewheeling period of the of the converter can be varied.
inductor. Due to the constraint in (1), any two of the three inter- The currents and voltages in the switches and diodes can be
vals can be controlled independently. easily determined from the waveforms shown in Fig. 3. for anal-
Unlike in a classical boost converter, the capacitor-charging ysis and design purposes. A point to be noted is that during the
interval ( ) of the tri-state boost converter can be made in- capacitor-charging interval ( ), the MOSFETs and
dependent of the boost interval ( ). The tri-state boost con- are both off. Thus, in circuit-B, the drain voltage of is unde-
VISWANATHAN et al.: NOVEL TRI-STATE BOOST CONVERTER 679

A. Possible Control Method

Among the several possible control methods, a simple control
method in which is varied with being fixed is examined
in this paper. The maximum gain of the converter ( ) is
reached when (that is ) and the value of
this theoretical maximum gain is [see (2)]. Thus, if a boost
gain of 5 is required, the value of should be less than 0.2.
Any increase in the energy demand by the load is met by
an increase in the boost interval ( ) and a corresponding
decrease in the freewheeling interval ( ). The instantaneous
drop in energy supply to the output side and the resulting output
voltage dip experienced in classical boost converter are avoided
here as remains unaffected.
The tri-state boost converter hits the energy supply limit when
the freewheeling interval reduces to zero.

B. Small-Signal Characteristics
The state equations of the tri-state boost converter during the
various intervals are given in (3)–(5).
interval

(3)

interval

(4)
Fig. 3. Theoretical steady state waveforms of the tri-state boost converter
(a) boost-inductor current, (b) boost-inductor voltage, (c) voltage across A and
B, and (d) anode–cathode voltage of diode D. interval

(5)

State-space averaging and linearization yield the control-to-

output transfer function for the tri-state converter with fixed ca-
pacitor-charging time ( ) as

(6)
Fig. 4. Alternative sequence for converter operation ( D ! D ! D ).
The detailed derivation of the above transfer function is not
fined (but less than ) during this interval. A detailed dc anal- shown due to space limitations. As expected, (6) shows the ab-
ysis has been performed on the converter1 . sence of RHP zero. On the other hand, the control-to-output
The sequence of the intervals of operation can be different transfer function (7) of the classical boost converter has a RHP
from that in Fig. 3 ( ). For example, in Fig. 4, the zero
operating sequence is ( ). This latter sequence
has the disadvantage of additional losses in the inductor and in
the devices, and , due to higher freewheeling current. (7)

III. CONTROL CHARACTERISTICS Here is the duty ratio at the operating point.
Section III-A below introduces a simple control method to For a classical boost converter, as seen in (7), the dc gain
exploit the additional degree of freedom while Section III-B and the pole and zero locations vary with operating point due to
presents the small-signal analysis of the converter with this con- changes in the duty cycle . In tri-state boost converter (6), with
trol method. the control method fixing , the pole-zero locations are fixed
1The analysis is not shown here as the focus in this paper is on the small-signal
and the dc gain depends only on the input voltage . Thus, the
RHP zero elimination. The authors will be glad to send the dc analysis on request task of designing the controller for the tri-state boost converter
from interested readers. is further simplified.
680 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 17, NO. 5, SEPTEMBER 2002

TABLE I
CONVERTERS’ SPECIFICATIONS

Taking the ESR ( ) of the capacitor also into account, the

control-to-output transfer function of the tri-state boost con-
verter can be shown to be

(8)
where , .
The transfer function2 in (8) again has no RHP zero. However,
Fig. 5. Experimental waveforms of the tri-state boost converter at half load
the presence of ESR zero may be noted. The input-to-output (V = 14 V and Io = 1:2 A): (a) inductor current, (b) voltage across inductor,
transfer function (audio susceptibility) was also derived and pro- (c) cathode to anode voltage of diode D, and (d) voltage across A and B. Scale:
vided here (9) for the benefit of the designer [4]–[9] current: 0.5 A/div (ground not shown), voltage: 20 V/div, time: 5 s=div.

(9)

IV. SIMULATION AND EXPERIMENTAL VERIFICATION

A tri-state boost converter and a conventional “benchmark”
boost converter of same specifications (see Table I) were
designed, simulated using MATLAB SIMULINK [10], built,
and tested. The output specifications were 50 W/25 V and the
switching frequency was 50 kHz.
Fig. 5, a composite plot obtained by combining two different
oscilloscope plots, shows the steady-state experimental wave-
forms of the tri-state boost converter. The experimental wave-
forms confirm the expected theoretical waveforms of Fig. 3. It
is seen that the inductor current shows a small droop during the
freewheeling interval primarily because of the conduction losses
in the devices and .

A. Open-Loop Performance
The location of RHP zero of the classical boost converter is
closest to the imaginary axis in the complex S-plane under min-
imum input voltage and maximum load condition. Under this
operating condition, the theoretical and experimental (obtained
using HP4194 gain-phase analyzer) Bode plots of the designed
classical boost converter are shown in Fig. 6. It is seen that due to
the effect of the complex poles (at a frequency close to 180 Hz) Fig. 6. Control-to-output Bode plots under minimum line (10 V) and
and RHP zero (at a frequency close to 1060 Hz), the phase rolls maximum load (2 A) – Classical boost converter/open-loop operation.
down toward 270 . However, the ESR of the output-capacitor
introduces a zero (at a frequency close to 6000 Hz) which causes simulated plots of gain and phase, the experimental Bode plots
the phase to recover to 180 . have a dc gain lower by 4 dB, a flatter overall gain curve, and
Fig. 7 shows the corresponding Bode plots of the tri-state con- less phase lag. Perhaps these differences can be attributed to the
verter under the above operating conditions. As compared to the losses in the system. The Bode plots, as theoretically predicted,
2The detailed derivation is again not shown due to space limitations. However,
resemble that of a simple second order system without any RHP
the authors will be glad to send the detailed derivation on request from interested zero. At high frequencies, the normal zero due to the ESR of the
readers. capacitor shows up in the theoretical phase curve, but not in the
VISWANATHAN et al.: NOVEL TRI-STATE BOOST CONVERTER 681

Fig. 9. Inductor current (upper) and output voltage (lower) waveforms for a
step increase in duty ratio—Tri-state boost converter.

Fig. 7. Control-to-output Bode plots under minimum line (10 V) and

maximum load (2 A) –Tri-state boost converter/open-loop operation.

Fig. 8. Inductor current (upper) and output voltage (lower) waveforms for a Fig. 10. Loop transfer function Bode plots under minimum line (10 V) and
step increase in duty ratio—Classical boost converter. maximum load (2 A)—classical boost converter.

bandwidth of the loop transfer function were used as the mea-

experimental phase curve. The reason for this is not yet known
sures to compare the closed-loop performances of the two con-
to the authors.
verters. The objective of the controller design was to obtain a
Figs. 8 and 9 show the simulated variations of inductor current
phase margin of at least 45 and a large bandwidth.
and output voltage for a step change in duty ratio applied to the
For the classical boost converter, the transfer function of the
classical boost converter and to the tri-state converter respec-
controller designed to achieve good performance was
tively. The characteristic initial undershoot seen in the output
voltage (see Fig. 8) of the classical boost converter due to RHP
zero is absent in the tri-state converter (see Fig. 9). (10)

The cross-over frequency realized was 270 Hz and the phase

B. Closed-Loop Performance margin was 48 (see Fig. 10). Due to the RHP zero, the con-
The settling time of the output (to reach and stay within 5% troller designed has slow dynamics, making the overall band-
of the steady-state value) for a step reference change and the width small.
682 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 17, NO. 5, SEPTEMBER 2002

Fig. 12. Experimental step response of the classical boost converter for a step
change in voltage reference: (a) step reference change, (b) inductor current (from
4.8 A to 5.1 A), and (c) output voltage (from 24.6 V to 25.5 V). Scale: voltage:
0.5 V/div, current: 0.5 A/div, time: 5 ms/div.

Fig. 11. Loop transfer function Bode plots under minimum line (10 V) and
maximum load (2 A). Tri-state boost converter.

The control-to-output transfer function of the tri-state boost

converter permits obtaining any bandwidth (of course, up to half
the switching frequency) with a lead-lag controller having a zero
located either at the resonant frequency of the transfer function
or at slightly higher frequencies. As explained earlier, in the case Fig. 13. Experimental step response of the tri-state boost converter for a step
of the tri-state boost converter, the controller design is simplified change in voltage reference: (a) inductor current, (b) output voltage (from 24.5 V
since the resonant frequency is fixed. A design goal of 5 kHz to 25.4 V), and (c) step references change. Scale: voltage: 1 V/div, current:
0.5 A/div, time: 200 s=div.
was set and the transfer function of the controller designed is
TABLE II
(11) COMPARISON OF EXPERIMENTAL PERFORMANCE OF CONVERTERS

The experimental cross-over frequency of the converter was

5.5 kHz and the phase margin was over 90 (see Fig. 11). It was
found that the converter’s small-signal response is affected by
the losses in the circuit, particularly by the losses in the free-
wheeling path. This most likely accounts for an experimental
phase higher (smaller phase lag) than the simulated value (see
Fig. 11). The theoretical gain-phase curves in Fig. 11 have been
plotted taking into account several parasitic quantities including
the ESR of the capacitor (0.05 ), the ESR of the filter in-
ductor (0.15 ), the diode drops and the MOSFET ON-resis-
tance (0.3 ). In spite of this, there is a mismatch in the Bode 40 ms settling time of the classical boost converter. Table II sum-
plots, particularly in the phase plot. This is perhaps due to the marizes the performance of the two boost converters
low input voltage (10 V) at which these measurements were As expected, the efficiency of the tri-state boost converter is
made. less than that of the classical boost converter due to the losses
Figs. 12 and 13 show the closed-loop response of the two con- in the additional circuit elements. However, higher efficiencies
verters for a step change in reference voltage. It is seen that the than in the present case may be expected in tri-state converter at
tri-state converter has a smaller settling time (700 s) as against higher input voltages.
VISWANATHAN et al.: NOVEL TRI-STATE BOOST CONVERTER 683

V. CONCLUSION Kanakasabai Viswanathan (S’00) was born in

Thanjavur, India, in 1977. He received the B.E.
The paper has proposed a tri-state boost converter with degree in electrical and electronics engineering from
no RHP zero in its control-to-output transfer function. The the Government College of Technology (GCT),
Coimbatore, India, in 1998, the M.E. degree in
additional degree of freedom introduced in the converter in the electrical engineering from the Indian Institute of
form of a freewheeling interval has been exploited through an Science (IISc), Bangalore, in 2000, and is currently
pursuing the Ph.D. degree in the Department of
easy control technique to achieve this elimination of RHP zero. Electrical and Computer Engineering, University of
Analytical, simulation, and experimental results of the tri-state Singapore (NUS).
boost converter have been presented and compared with those In 2000, he was an R&D Engineer with Lucas
TVS, Ltd., Chennai, India. Currently, he is a Research Scholar in the Depart-
of the classical boost converter both under open-loop and ment of Electrical and Computer Engineering, NUS. His fields of interest
under closed-loop operating conditions. The results clearly include applications of power converters, multivariable control, and artificial
demonstrate the superior dynamic performance of the proposed intelligence in control and power electronics.
converter.
The proposed converter can be used in applications wherever Ramesh Oruganti (SM’90) received the B.Tech
fast-response boost action is needed. and M.Tech degrees from the Indian Institute of
Technology, Madras, and the Ph.D degree from
Virginia Polytechnic Institute and State University,
REFERENCES Blacksburg, in 1987.
After working for several years in India in the
[1] D. M. Sable, B. H. Cho, and R. B. Ridley, “Use of leading-edge modula- area of power conversion, he was with the Corporate
tion to transform boost and flyback converters into minimum-phase-zero R&D Division, General Electric Company, working
systems,” IEEE Trans. Power Electron., vol. 6, pp. 704–711, Oct. 1991. on advanced power converter systems. Since 1989,
[2] W. C. Wu, R. M. Bass, and J. R. Yeargan, “Eliminating the effects of he has been with the Electrical and Computer
right-half plane zero in fixed frequency boost converters,” in Proc. IEEE Engineering Department, National University of
PESC’98, vol. 1, 1998, pp. 362–366. Singapore, where he is currently an Associate Professor and the Director of
[3] F. A. Himmelstoss, J. W. Kolar, and F. C. Zach, “Analysis of Smith-pre- Centre for Power Electronics. He is active in research on several areas of power
dictor-based control concept eliminating the right half plane zero of con- electronics including soft-switched power converters, converter systems for
tinuous mode boost and buck-boost DC/DC converters,” in Proc. IEEE power quality applications, modeling and control of power converters, and AI
IECON’91, vol. 1, 1991, pp. 423–438. applications in the control of power converters. He has authored several papers
[4] Y. F. Liu and P. C. Sen, “Large signal modeling of hysteric current in power electronics. He holds a patent on dc–dc converters.
programmed converters,” IEEE Trans. Power Electron., vol. 11, pp. Dr. Oruganti received two prize paper awards.
423–430, May 1996.
[5] R. Nami, G. Weiss, and S. B. Yaakov, “ H control applied to boost
power converters,” IEEE Trans. Power Electron., vol. 12, pp. 677–683, Dipti Srinivasan (M’94) received the M.Eng. and
July 1997. Ph.D. degrees in electrical engineering from the Na-
[6] R. D. Middlebrook and S. Cuk, “A general unified approach to modeling tional University of Singapore (NUS), in 1991 and
switching converter power stages,” in Proc. IEEE PESC’76, 1976. 1994, respectively.
[7] V. Vorperian, “Simplified analysis of PWM converters using models She was with the Computer Science Division, Uni-
of PWM switch, part 1: Continuous conduction mode,” IEEE Trans. versity of California, Berkeley, as a Postdoctoral Re-
Aerosp. Electron. Syst., vol. 26, pp. 497–505, May 1990. searcher, from 1994 to 1995. In June 1995, she joined
[8] A. Pressman, Switching Power Supply Design. New York: McGraw- the faculty of the ECE Department, NUS, where she
Hill, 1991. is an Assistant Professor. Her research interests are in
[9] T. Kailath, Linear Systems. Englewood Cliffs, NJ: Prentice-Hall, 1980. the application of soft computing techniques in power
[10] SIMULINK User’s Guide, Math Works, Inc, Natick, MA, 1992. system operation, economics, and control.