EEC 214

Computer Microprocessor

Lecture 1
 Class Information

Class meets:
Saturday (Lecture)
Thursday(Laboratory)

Instructor:
Dr. Mohamed A. Torad
Mohamed.torad@gmail.com

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 Refrence

The AVR Microcontroller and Embedded

Systems: Using Assembly and C

Muhammad Ali Mazidi | Sarmad Naimi Sepehr

Naimi

2nd Edition

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 Course Aims

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 Course Content
Week Topic No. of hours Lecture Tutorial Practical

1 Introduction to Computing 5 2 - 3
2 The AVR Microcontroller: History and Features 5 2 - 3
3 AVR Architecture and Assembly Language 5 2 - 3
Programming
4 Branch, Call, and Time Delay Loop 5 2 - 3
5 AVR I/O Port Programming 5 2 - 3
6 Arithmetic, Logic Instructions, and Programs 5 2 - 3
7 AVR Advanced Assembly Language 5 - - 3
Programming
8 AVR Programming in C 5 2 - 3
9 AVR Hardware Connection, Hex File, and Flash 5 2 - 3
Loaders
10 AVR Timer Programming in Assembly and C 5 2 - 3
11 AVR Interrupt Programming in Assembly and C 5 2 - 3
12 AVR Serial Port Programming in Assembly and 5 2 - 3
C
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13 LCD and Keyboard Interfacing 5 2 - 3
 Polices- Academic Honesty

• All work must be yours

• Do not share code with classmates

• Do not plagiarize code from the Internet

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 INTRODUCTION TO COMPUTING

Converting from decimal to binary

Converting from binary to decimal

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 INTRODUCTION TO COMPUTING
Converting from binary to decimal

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 INTRODUCTION TO COMPUTING
Converting between binary and hex Hexadecimal system

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 INTRODUCTION TO COMPUTING
Converting from decimal to hex Hexadecimal system

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 INTRODUCTION TO COMPUTING
Converting from hex to decimal Hexadecimal system

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 INTRODUCTION TO COMPUTING

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 INTRODUCTION TO COMPUTING
Addition of hex numbers

Subtraction of hex numbers

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 INTRODUCTION TO COMPUTING
Binary logic

As mentioned earlier, computers use the binary number system because

the two voltage levels can be represented as the two digits 0 and 1.
Signals in digital electronics have two distinct voltage levels. For
example, a system may define 0 V logic 0 and +5 V as logic 1. Figure 2
shows this as system with the built-in tolerances for variations in the
voltage. A valid digital signal in this example should be within either of
the two shaded areas.

Logic gates

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 INTRODUCTION TO COMPUTING
Logic gates

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 INTRODUCTION TO COMPUTING
Logic design using gates

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 INTRODUCTION TO COMPUTING
Logic design using gates

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 INTRODUCTION TO COMPUTING
Decoders and Flip-flops

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 INTRODUCTION TO COMPUTING
SEMICONDUCTOR MEMORY

Internal organization of computers

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 INTRODUCTION TO COMPUTING
Data bus
The average size of data buses in CPUs varies between 8 and 64 bits. Early personal computers
such as Apple 2 used an 8-bit data bus, while supercomputers such as Cray used a 64-bit data
bus. Data buses are bidirectional, because the CPU must use them either to receive or to send
data. The processing power of a computer is related to the size of its buses, because an 8-bit bus
can send out 1 byte a time, but a 16-bit bus can send out 2 bytes at a time, which is twice as fast.

Address bus
The number of locations is always equal to , where x is the number of address lines, regardless
of the size of the data bus. For example, a CPU with 16 address lines can provide a total of
65,536 ( ) or 64K of addressable memory. Each location can have a maximum of 1 byte of
data. This is because all general-purpose microprocessor CPUs are what is called byte
addressable.

CPU and its relation to RAM and ROM

The CPU cannot get the information from the disk directly because the disk is too slow. In other
words, the CPU first seeks the information to be processed from RAM (or ROM). Only if the
data is not there does the CPU seek it from a mass storage device such as a disk, and then it
transfers the information to RAM. For this reason, RAM and ROM are sometimes referred to as
primary memory and disks are called secondary memory
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 INTRODUCTION TO COMPUTING
Memory capacity
The number of bits that a semiconductor memory chip can store is called chip capacity.
It can be in units of Kbits (kilobits), Mbits (megabits), and so on.
This must be distinguished from the storage capacity of computer systems. While the memory
capacity of a memory IC chip is always given in bits, the memory capacity of a computer system
is given in bytes.

For example, an article in a technical journal may state that the 128M chip has become popular.
In that case, it is understood, although it is not mentioned, that 128M means 128 megabits since
the article is referring to an IC memory chip. However, if an advertisement states that a computer
comes with 128M memory, it is understood that 128M means 128 megabytes since it is referring
to a computer system.
Memory organization
Memory chips are organized into a number of locations within the IC.
Each location can hold 1 bit, 4 bits, 8 bits, or even 16 bits, depending on how it is designed
internally.
1. A memory chip contains locations, where x is the number of address pins.
2. Each location contains y bits, where y is the number of data pins on the chip.
3. The entire chip will contain bits, where x is the number of address pins and y is the
number of data pins on the chip.

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Speed INTRODUCTION TO COMPUTING
To access the data, the address is presented to the address pins, the READ pin is activated, and
after a certain amount of time has elapsed, the data shows up at the data pins. The shorter this
elapsed time, the better, and consequently, the more expensive the memory chip. The speed of the
memory chip is commonly referred to as its access time.
The three important memory characteristics are capacity, organization, and access time.

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 INTRODUCTION TO COMPUTING
ROM (read-only memory)
ROM is a type of memory that does not lose its contents when the power is turned off. For this
reason, ROM is also called nonvolatile memory. There are different types of read-only memory,
such as PROM, EPROM, EEPROM, Flash EPROM, and mask ROM. Each is explained next.

PROM (programmable ROM) and OTP

PROM refers to the kind of ROM that the user can burn information into. In other words, PROM
is a user-programmable memory. For every bit of the PROM, there exists a fuse. PROM is
programmed by blowing the fuses. If the information burned into PROM is wrong, that PROM
must be discarded since its internal fuses are blown permanently. For this reason, PROM is also
referred to as OTP (one-time programmable).

EPROM (erasable programmable ROM) and UV-EPROM

A widely used EPROM is called UV-EPROM, where UV stands for ultraviolet. The only problem
with UV-EPROM is that erasing its contents can take up to 20 minutes. All UV-EPROM chips
have a window through which the programmer can shine ultraviolet (UV) radiation to erase the
chip’s contents.
A part number 27128-25 refers to UV-EPROM that has a capacity of 128K bits and access time
of 250 nanoseconds.

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 INTRODUCTION TO COMPUTING

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 INTRODUCTION TO COMPUTING
EEPROM (electrically erasable programmable ROM)
EEPROM has several advantages over EPROM, such as the fact that its method of erasure is
electrical and therefore instant, as opposed to the 20-minute erasure time required for UV-
EPROM. In addition, in EEPROM one can select which byte to be erased, in contrast to UV-
EPROM, in which the entire contents of ROM are erased.
Flash memory EPROM
the erasure of the entire contents takes less than a second, or one might say in a flash, hence its
name, Flash memory. In addition, the erasure method is electrical, and for this reason it is
sometimes referred to as Flash EEPROM. To avoid confusion, it is commonly called Flash
memory. The major difference between EEPROM and Flash memory is that when Flash
memory's contents are erased, the entire device is erased, in contrast to EEPROM, where one can
erase a desired byte. Although in many Flash memories recently made available the contents are
divided into blocks and the erasure can be done block by block, unlike EEPROM, Flash memory
has no byte erasure option.
At this time, the program/erase cycle is 100,000 for Flash and EEPROM, 1000 for UV-EPROM,
and infinite for RAM and disks.
Mask ROM
Mask ROM refers to a kind of ROM in which the contents are programmed by the IC
manufacturer. In other words, it is not a user-programmable ROM. The term mask is used in IC
fabrication. Since the process is costly, mask ROM is used when the needed volume is high
(hundreds of thousands) and it is absolutely certain that the contents will not change.
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 INTRODUCTION TO COMPUTING
RAM (random access memory)
RAM memory is called volatile memory since cutting off the power to the IC results in the loss
of data. Sometimes RAM is also referred to as RAWM (read and write memory), There are three
types of RAM: static RAM (SRAM), NV-RAM (nonvolatile RAM), and dynamic RAM
(DRAM).

SRAM (static RAM)

Storage cells in static RAM memory are made of flip-flops and therefore do not require
refreshing in order to keep their data. The problem with the use of flip-flops for storage cells is
that each cell requires at least 6 transistors to build, and the cell holds only 1 bit of data. In recent
years, the cells have been made of 4 transistors, which still is too many.

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 INTRODUCTION TO COMPUTING

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 INTRODUCTION TO COMPUTING

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 INTRODUCTION TO COMPUTING
NV-RAM (nonvolatile RAM)
Whereas SRAM is volatile, there is a new type of nonvolatile RAM called NV-RAM. Like other
RAMs, it allows the CPU to read and write to it, but when the power is turned off the contents are
not lost. NV-RAM combines the best of RAM and ROM: the read and write ability of RAM, plus
the nonvolatility of ROM. To retain its contents, every NV-RAM chip internally is made of the
following components:
1. It uses extremely power-efficient (very low-power consumption) SRAM cells built out of
CMOS.
2. It uses an internal lithium battery as a backup energy source.
3. It uses an intelligent control circuitry. The main job of this control circuitry is to monitor the
VCC pin constantly to detect loss of the external power supply. If the power to the VCC pin
falls below out-of-tolerance conditions, the control circuitry switches automatically to its
internal power source, the lithium battery. The internal lithium power source is used to retain
the NV-RAM contents only when the external power source is off.

DRAM (dynamic RAM)

The major advantages are high density (capacity), cheaper cost per bit, and lower power
consumption per bit. The disadvantage is that it must be refreshed periodically because the
capacitor cell loses its charge; furthermore, while DRAM is being refreshed, the data cannot be
accessed.

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 INTRODUCTION TO COMPUTING

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 CPU ARCHITECTURE
Inside CPU
A program stored in memory provides instructions to the CPU to perform an action. See Figure
19. The action can simply be adding data such as payroll data or controlling a machine such as a
robot. The function of the CPU is to fetch these instructions from memory and execute them. To
perform the actions of fetch and execute, all CPUs are equipped with resources such as the
following:

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 CPU ARCHITECTURE
1. Foremost among the resources at the disposal of the CPU are a number of registers. The CPU
uses registers to store information temporarily. The information could be two values to be
processed, or the address of the value needed to be fetched from memory. Registers inside the
CPU can be 8-bit, 16-bit, 32-bit, or even 64-bit registers, depending on the CPU. In general, the
more and bigger the registers, the better the CPU. The disadvantage of more and bigger registers
is the increased cost of such a CPU.

2. The CPU also has what is called the ALU (arithmetic/logic unit). The ALU section of the CPU
is responsible for performing arithmetic functions such as add, subtract, multiply, and divide, and
logic functions such as AND, OR, and NOT.

3. Every CPU has what is called a program counter. The function of the program counter is to
point to the address of the next instruction to be executed. As each instruction is executed, the
program counter is incremented to point to the address of the next instruction to be executed. The
contents of the program counter are placed on the address bus to find and fetch the desired
instruction. In the IBM PC, the program counter is a register called IP, or the instruction pointer.

4. The function of the instruction decoder is to interpret the instruction fetched into the CPU. One
can think of the instruction decoder as a kind of dictionary, storing the meaning of each
instruction and what steps the CPU should take upon receiving a given instruction. Just as a
dictionary requires more pages the more words it defines, a CPU capable of understanding more
instructions requires more transistors to design.
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 CPU ARCHITECTURE
Assume that an imaginary CPU has registers called A, B, C, and D. It has an 8-bit data bus and a
16-bit address bus. Therefore, the CPU can access memory from addresses 0000 to FFFFH (for a
total of 10000H locations). The action to be performed by the CPU is to put hexadecimal value
21 into register A, and then add to register A the values 42H and 12H. Assume that the code for
the CPU to move a value to register A is 1011 0000 (B0H) and the code for adding a value to
register A is 0000 0100 (04H).

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 Harvard and von Neumann architectures
The early computers used the same bus for accessing both the code and data. Such an architecture
is commonly referred to as von Neumann (Princeton) architecture.
In Harvard architecture, we have separate buses for the code and data memory.

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