CS4101 嵌入式系統概論

Analog-to-Digital Converter

Prof. Chung-Ta King

Department of Computer Science
National Tsing Hua University, Taiwan
(Materials from MSP430 Microcontroller Basics, John H. Davies, Newnes, 2008)
 We Have Learned ...

ADC
Clock
System IO

Timer
System

1
 Outline
• Introduction to analog-to-digital conversion
• ADC of MSP430
• Sample code of using ADC10 in MSP430

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 Analog-to-Digital Converter (ADC)
• To know nature phenomena, which is analog,
and make it feasible for computer to handle,
we need to convert it into digital signals
• To transform the analog, continuous signals
into digital ones, the ADC samples the input at
fixed interval and do the conversion
Analog signal Digital signal

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 Analog Signals
• A signal representing continuous things, e.g.
– Fluctuations in air pressure (i.e. sound) strike the
diaphragm of a microphone, which causes
corresponding fluctuations in a voltage or the
current in an electric circuit
– The voltage or current is an "analog" of the sound
strength voltage

time
time 4
 Analog-to-Digital Conversion
• ADC: convert an analog input, e.g., a voltage V,
into a binary value that processor can handle
– The input V(t) is a continuous function, i.e., V can take
any value within a permitted range and can change in
any way as a function of time t
– The output V[n] is a sequence of binary values. Each
has a fixed number of bits and can represent only a
finite number of values.
– Typically input is sampled regularly at intervals of Ts,
so the continuous nature of time has also been lost.

Of course, we also have DAC

(digital-to-analog converter)!
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 Analog-to-Digital Conversion
• Digital representations of analog waveforms

Continuous time
Continuous values

Discrete time
Discrete values

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 Sampling in Time
• The value of the analog signal is measured at
certain intervals in time. Each measurement is
referred to as a sample

A series of “snapshots”

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 Terminologies in Sampling
• Sampling rate:>> chu kỳ và tần số lấy mẫu
– How often analog signal is measured (samples
per second, Hz), e.g. 44,100 Hz?
• Sampling resolution>>độ phân giải của dữ
liệu- số bit của dữ liệu-
• Giá trị số ngõ ra: 0 – 2^n
– Number of bits to represent each sample
4 Samples/cycle
(“sample word 16 Samples/cycle
length,” “bit depth”),
8 Samples/cycle e.g. 16 bit

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 Encoding of Discrete Signals
• If we use N bits to encode the magnitude of
one of the discrete-time samples, we can
capture 2N possible values

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Sampling Rate and Encoding Bits

1-bit

3-bit

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 Outline
• Introduction to analog-to-digital conversion
• ADC of MSP430
• Sample code of using ADC10 in MSP430

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 Requirements of MSP430 for ADC
• Provide continuous sampling of multiple
analog inputs and store sampled data

• ADC10AE0
• INCH in
ADC10CTL1

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 Requirements of MSP430 for ADC
• Provide continuous sampling of multiple
analog inputs and store sampled data

• SHS, ADC10SSEL,
CONSEQ in
ADC10CTL1

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 Requirements of MSP430 for ADC
• Provide continuous sampling of multiple
analog inputs and store sampled data

By software and
interrupts
• ADC10MEM

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 Requirements of MSP430 for ADC
• Provide continuous sampling of multiple
analog inputs and store sampled data

• Data Transfer
Control

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 ADC in MSP430
MSP430 may contain one or more converters:
• Comparator:
– Compare the voltages on its two input terminals and
return 0 or 1, e.g., Comparator_A+
• Successive-approximation ADC:
– Use binary search to determine the closest digital
representation of the input signal, e.g., ADC10 and ADC12
to give 10 and 12 bits of output
• Sigma-delta ADC:
– A more complicated ADC that gives higher resolution
(more bits) but at a slower speed, e.g., SD16 and SD16_A,
both of which give a 16-bit output

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Simplified Block Diagram of ADC10

Conversion trigger
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 Main Components of ADC10
• Sample-and-Hold circuit:
– Vout = Vin when Vsample = 1

Vin
Vout

• SAR (Successive-Approximation Register):

– 10-bit
– Result written to ADC10MEM and raising ADC10IFG

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 Successive-Approximation ADC
• Generate internal analog signal VD/A by DAC
• Compare VD/A with input signal Vin
• Modify VD/A by D0D1D2…DN-1 until closest
possible value to Vin is reached
Vin S&H
Logic
D0 D1 DN-1
VD/A
DAC
Vref

Dr.-Ing. Frank Sill, Department of Electrical Engineering,

Federal University of Minas Gerais, Brazil 19
 Successive-Approximation ADC
111
111
7 110 110
Vref VD/A
8 101 101
Vin
100 100
4
Vref 011
8 011
010 010
Vref 001
001
8
1. 2. 3. final 000
Iterations result
P. Fischer, VLSI-Design - ADC und DAC, Uni Mannheim, 2005
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 Main Components of ADC10
• Built-in voltage reference:
– Two selectable voltage levels, 2.5 V and 1.5 V
– Setting REFON in ADC10CTL0 register to 1 enables
the internal reference
– Setting REF2_5V in ADC10CTL0 to 1 selects 2.5 V
as the internal reference, otherwise 1.5 V
– After voltage reference is turned on, we must wait
about 30µs for it to settle

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 Main Components of ADC10
• Sources of sample-and-hold circuit:
– ADC10SC bit in ADC10CTL0 register, which can be
set (and is thus triggered) by software, or
– OUTx from
Timer_A: for
periodic
sampling

Capture/Compare Block 2
of Timer_A

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 Data Transfer Controller (DTC)
• Transfer conversion 1.5V or 2.5V
results from or Reference
ADC10MEM to
other on-chip
memory locations
– Each load of channel
ADC10MEM Input
triggers a data
transfer until a set
amount
– During each DTC ADC10MEM

transfer, CPU is
halted

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 ADC10 Interrupts
• One interrupt and one interrupt vector
– When DTC is not used (ADC10DTC1 = 0),
ADC10IFG is set when conversion results are
loaded into ADC10MEM
– When DTC is used (ADC10DTC1 > 0), ADC10IFG is
set when a block transfer completes
• If both ADC10IE and GIE bits are set, then
ADC10IFG generates an interrupt request
– ADC10IFG is automatically reset when interrupt
request is serviced, or it may be reset by software
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Enabling Sampling and Conversion

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 Steps for Single Conversion
(1) Configure ADC10, including the ADC10ON bit to
enable the module.
– The ENC bit must be clear so that most bits in
ADC10CTL0 and ADC10CTL1 can be changed.
(2) Set the ENC bit to enable a conversion.
– This cannot be done while the module is being
configured in the previous step.
(3) Trigger the conversion, either by setting the
ADC10SC bit or by an edge from Timer_A.
• ADC10ON, ENC, ADC10SC are all in control
register ADC10CTL0

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 ADC10 Registers
Register
Register Short Form Addr. Initial State
Type
ADC10 input enable register 0 ADC10AE0 Read/write 04Ah Reset with POR
ADC10 input enable register 1 ADC10AE1 Read/write 04Bh Reset with POR
ADC10 control register 0 ADC10CTL0 Read/write 01B0h Reset with POR
Reset with POR
ADC10 control register 1 ADC10CTL1 Read/write 01B2h

ADC10 memory ADC10MEM Read 01B4h Unchanged

ADC10 data transfer control Where the
ADC10DTC0 Read/write 048h Reset with POR
register 0
data is saved
ADC10 data transfer control
ADC10DTC1 Read/write 049h Reset with POR
register 1
ADC10 data transfer start address ADC10SA Read/write 01BCh 0200h with POR

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ADC10CTL0

ideal for the temperature sensor

ideal for the temperature sensor

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 ADC10CTL0 cont’d

ADC10CTL0 = SREF_2 + ADC10SHT_1; // Reference range & SH time

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ADC10CTL1

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 ADC10CTL1 cont’d

ADC10CTL1 = INCH_10 + ADC10DIV_0; // Temp Sensor ADC10CLK 31

 Outline
• Introduction to analog-to-digital conversion
• ADC of MSP430
• Sample code of using ADC10 in MSP430

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 Sample Code 1 for ADC10
• Repetitive single conversion:
– A single sample is made on A1 with reference to
Vcc
– If A1 > 0.5*Vcc, P1.0 set, else reset.
– Software sets ADC10SC to start sample and
conversion. ADC10SC automatically cleared at end
of conversion.
– Use ADC10 internal oscillator to time the sample
and conversion.

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 Sample Code 1 for ADC10
#include "msp430g2231.h"
void main(void) {
WDTCTL = WDTPW + WDTHOLD; // Stop WDT
// H&S time 16x, interrupt enabled
ADC10CTL0 = ADC10SHT_2 + ADC10ON + ADC10IE;
ADC10CTL1 = INCH_1; // Input A1
ADC10AE0 |= 0x02; // Enable pin A1 for analog in
P1DIR |= 0x01; // Set P1.0 to output
for (;;) {
ADC10CTL0 |= ENC + ADC10SC; // Start sampling
__bis_SR_register(CPUOFF + GIE); // Sleep
if (ADC10MEM < 0x1FF) // 0x1FF = 511
P1OUT &= ~0x01; // Clear P1.0 LED off
else
P1OUT |= 0x01; // Set P1.0 LED on }
} 34
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 Sample Code 1 for ADC10
// ADC10 interrupt service routine
#pragma vector=ADC10_VECTOR
__interrupt void ADC10_ISR(void)
{
__bic_SR_register_on_exit(CPUOFF);
// Clear CPUOFF bit from 0(SR)
}

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 Sample Code 2 for ADC10
• Continuous sampling driven by Timer_A
– A1 is sampled 16/second (ACLK/2048) with
reference to 1.5V, where ACLK runs at 32 KHz
driven by an external crystal.
– If A1 > 0.5Vcc, P1.0 is set, else reset.
– Timer_A is run in up mode and its CCR1 is used to
automatically trigger ADC10 conversion, while
CCR0 defines the sampling period
– Use internal oscillator times sample (16x) and
conversion (13x).

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 Sample Code 2 for ADC10
#include "msp430g2231.h"
void main(void) {
WDTCTL = WDTPW + WDTHOLD; // Stop WDT
// TA1 trigger sample start
ADC10CTL1 = SHS_1 + CONSEQ_2 + INCH_1;
ADC10CTL0 = SREF_1 + ADC10SHT_2 + REFON +
ADC10ON + ADC10IE;
__enable_interrupt(); // Enable interrupts.
TACCR0 = 30; // Delay for Volt Ref to settle
TACCTL0 |= CCIE; // Compare-mode interrupt.
TACTL = TASSEL_2 + MC_1; // SMCLK, Up mode.
LPM0; // Wait for settle.
TACCTL0 &= ~CCIE; // Disable timer Interrupt
__disable_interrupt();

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 Sample Code 2 for ADC10
ADC10CTL0 |= ENC; // ADC10 Enable
ADC10AE0 |= 0x02; // P1.1 ADC10 option select
P1DIR |= 0x01; // Set P1.0 output
TACCR0 = 2048-1; // Sampling period
TACCTL1 = OUTMOD_3; // TACCR1 set/reset
TACCR1 = 2046; // TACCR1 OUT1 on time
TACTL = TASSEL_1 + MC_1; // ACLK, up mode

// Enter LPM3 w/ interrupts

__bis_SR_register(LPM3_bits + GIE);
}

Timer_A CCR1 out mode 3: The output (OUT1) is set when the timer counts
to the TACCR1 value. It is reset when the timer counts to the TACCR0 value.

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 Sample Code 2 for ADC10
// ADC10 interrupt service routine
#pragma vector=ADC10_VECTOR
__interrupt void ADC10_ISR(void){
if (ADC10MEM < 0x155) // ADC10MEM = A1 > 0.5V?
P1OUT &= ~0x01; // Clear P1.0 LED off
else
P1OUT |= 0x01; // Set P1.0 LED on
}

#pragma vector=TIMERA0_VECTOR
__interrupt void ta0_isr(void){
TACTL = 0;
LPM0_EXIT; // Exit LPM0 on return
}

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 Summary
• ADC: analog-to-digital conversion
DAC: digital-to-analog conversion
– Conversions will necessarily introduce errors.
Important to understand constraints and limitations
• ADC10 in MSP430
– Convert an analog signal into 10-bit digitals
– Registers associated with ADC10
• Sample program of ADC10
– Single conversion
– Continuous conversion driven by Timer_A

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