Chapter 3

Steady-State Equivalent Circuit Modeling,

Losses, and Efficiency

Let us now consider the basic functions performed by a switching converter, and
attempt to represent these functions by a simple equivalent circuit. The designer of a
converter power stage must calculate the network voltages and currents, and specify the
power components accordingly. Losses and efficiency are of prime importance. The use of
equivalent circuits is a physical and intuitive approach which allows the well-known
techniques of circuit analysis to be employed. As noted in the previous chapter, it is
desirable to ignore the small but complicated switching ripple, and model only the
important dc components of the waveforms.
The dc transformer is used here to model the ideal functions performed by a dc-dc
converter. This simple model correctly represents the relationships between the dc voltages
and currents of the converter. The model can be refined by including losses, such as
semiconductor forward voltage drops and on-resistances, inductor core and copper losses,
etc. The resulting model can be directly solved, to find the voltages, currents, losses, and
efficiency in the actual nonideal converter.

3 . 1 . The dc transformer model

As illustrated in Fig. 3.1, any switching converter contains three ports: a power
input, a power output, and a control input. The input power is processed as specified by
the control input, and then is output to the load. Ideally, these functions are performed with
100% efficiency, and hence
Pin = Pout (3-1)
or,
V g Ig = V I (3-2)
These relations are valid only under equilibrium (dc) conditions: during transients, the net
stored energy in the converter inductors and capacitors may change, causing Eqs. (3-1) and
(3-2) to be violated.

version 1/5/98 10:33 AM

 Chapter 3. Steady-state equivalent circuit modeling, losses, and efficiency

Ig I
In the previous chapter, we found
that we could express the converter output + Switching +
Power Power
input
Vg dc-dc V output
voltage in an equation of the form – –
converter
V = M(D) Vg (3-3)
where M(D) is the equilibrium conversion D
ratio of the converter. For example, M(D)
= D for the buck converter, and M(D) = control input

1/(1-D) for the boost converter. In Fig. 3.1. Switching converter terminal quantities.
general, for ideal PWM converters
operating in the continuous conduction mode and containing an equal number of
independent inductors and capacitors, it can be shown that the equilibrium conversion ratio
M is a function of the duty cycle D and is independent of load.
Substitution of Eq. (3-3) into Eq. (3-2) yields
Ig = M(D) I (3-4)
Hence, the converter terminal currents are related by the same conversion ratio.

Ig 1 : M(D) I
Ig I
+ +
+ + Power Power
Power + Power input
Vg V
output
Vg M(D) I M(D)Vg – V – –
input output
– –

control input
Fig. 3.2. A switching converter equivalent
circuit using dependent sources, Fig. 3.3. Ideal dc transformer model of a dc-dc
corresponding to Eqs. (3-3) and (3-4). converter operating in continuous conduction
mode, corresponding to Eqs. (3-1) – (3-4).

Equations (3-3) and (3-4) suggest that the converter could be modeled using
dependent sources, as in Fig. 3.2. An equivalent but more physically meaningful model,
Fig. 3.3, can be obtained through the realization that Eqs. (3-1) - (3-4) coincide with the
equations of an ideal transformer. In an ideal transformer, the input and output powers are
equal, as stated in Eqs. (3-1) and (3-2). Also, the output voltage is equal to the turns ratio
times the input voltage. This is consistent with Eq. (3-3), with the turns ratio taken to be
the equilibrium conversion ratio M(D). Finally, the input and output currents should be
related by the same turns ratio, as in Eq. (3-4).
Thus, we can model the ideal dc-dc converter using the ideal dc transformer model
of Fig. 3.3. This symbol represents the first-order dc properties of any switching dc-dc

2
 Chapter 3. Steady-state equivalent circuit modeling, losses, and efficiency

converter: transformation of dc voltage and current levels, ideally with 100% efficiency,
controllable by the duty cycle D. The solid horizontal line indicates that the element is ideal
and capable of passing dc voltages and currents. It should be noted that, although standard
magnetic-core transformers cannot transform dc signals (they saturate when a dc voltage is
applied), we are nonetheless free to define the idealized model of Fig. 3.3 for the purpose
of modeling dc-dc converters. Indeed, the absence of a physical dc transformer is one of
the reasons for building a dc-dc switching converter. So the properties of the dc-dc
converter of Fig. 3.1 can be modeled using the equivalent circuit of Fig. 3.3. An advantage
of this equivalent circuit is that, for constant duty cycle, it is time-invariant: there is no
switching or switching ripple to deal with, and only the important dc components of the
waveforms are modeled.
The rules for manipulating and (a)
R1
simplifying circuits containing
+ Switching +
transformers apply equally well to circuits V1
+
Vg dc-dc V R
–
containing dc-dc converters. For example, – converter –

consider the network of Fig. 3.4(a), in

D
which a resistive load is connected to the
converter output, and the power source is (b)
R1 1 : M(D)
modeled by a Thevenin-equivalent voltage
source V1 and resistance R 1 . The +
+ +
V1 Vg V R
converter is replaced by the dc –
– –
transformer model in Fig. 3.4(b). The
elements V1 and R1 can now be pushed
(c)
through the dc transformer as in Fig. M 2(D)R1

3.4(c); the voltage source V 1 is multiplied +

+
by the conversion ratio M(D), and the M(D)V 1
–
V R
2 –
resistor R 1 is multiplied by M (D). This
circuit can now be solved using the Fig. 3.4. Example of use of the dc transformer
voltage divider formula to find the output model: (a) original circuit; (b) substitution
of switching converter dc transformer model;
voltage: (c) simplification by referring all elements to
R secondary side.
V = M(D) V1
R + M 2(D) R1 (3-5)
It should be apparent that the dc transformer / equivalent circuit approach is a powerful tool
for understanding networks containing converters.

3
 Chapter 3. Steady-state equivalent circuit modeling, losses, and efficiency

3 . 2 . Inclusion of inductor copper loss

The dc transformer model of Fig. 3.3 can be extended, to model other properties of
the converter. Nonidealities, such as sources of power loss, can be modeled by adding
resistors as appropriate. In later chapters, we will see that converter dynamics can be
modeled as well, by adding inductors and capacitors to
the equivalent circuit. L RL

Let us consider the inductor copper loss in a

Fig. 3.5. Modeling inductor copper
boost converter. Practical inductors exhibit power loss loss via series resistor RL.
of two types: (1) copper loss, originating in the
resistance of the wire, and (2) core loss, due to
hysteresis and eddy current losses in the magnetic core. A suitable model which describes
the inductor copper loss is given in Fig. 3.5, in which a resistor RL is placed in series with
the inductor. The actual inductor then consists of an ideal inductor, L, in series with the
copper loss resistor RL.
The inductor model of Fig. 3.5 L RL 2
is inserted into the boost converter i +
1
circuit in Fig. 3.6. The circuit can now V + C R v
g –
be analyzed in the same manner as used
–
for the ideal lossless converter, using
the principles of inductor volt-second Fig. 3.6. Boost converter circuit, including inductor
balance, capacitor charge balance, and copper resistance RL.

the small ripple approximation. First,

we draw the converter circuits during the two subintervals, as in Fig. 3.7.
a) b)
L RL i L RL
i
+ vL – + + vL – +
iC iC

Vg + C R v Vg + C R v
– –

– –

Fig. 3.7. Boost converter circuits during the two subintervals, including inductor copper resistance RL:
(a) with the switch in position 1, (b) with the switch in position 2.

For 0 < t < DTs, the switch is in position 1 and the circuit reduces to Fig. 3.7(a).
The inductor voltage vL(t), across the ideal inductor L, is given by
vL(t) = Vg – i(t) RL (3-6)
and the capacitor current iC(t) is

4
 Chapter 3. Steady-state equivalent circuit modeling, losses, and efficiency

iC(t) = -v(t) / R (3-7) vL(t)

Vg – IRL
Next, we simplify these equations by
DTs D' Ts
assuming that the switching ripples in
t
i(t) and v(t) are small compared to Vg – IRL – V
their respective dc components I and
iC (t)
V. Hence, i(t) ≈ I and v(t) ≈ V, and I – V/R

Eqs. (3-6) and (3-7) become

vL(t) = Vg – I RL
iC(t) = -V / R -V/R
(3-8)
For DTs < t < Ts, the switch is
Fig. 3.8. Inductor voltage and capacitor current
in position 2 and the circuit reduces to waveforms, for the nonideal boost converter of Fig. 3.6.
Fig. 3.7(b). The inductor current and
capacitor voltage are then given by
vL(t) = Vg – i(t) RL – v(t) ≈ Vg – I RL – V
iC(t) = i(t) – v(t) / R ≈ I – V / R (3-9)
We again make the small ripple approximation.
The principle of inductor volt-second balance can now be invoked. Equations (3-8)
and (3-9) are used to construct the inductor voltage waveform vL(t) in Fig. 3.8. The dc
component, or average value, of the inductor voltage vL(t) is
Ts
1
vL(t) = vL(t)dt = D(Vg – I R L) + D'(Vg – I R L – V)
Ts 0
(3-10)
By setting <vL> to zero and collecting terms, one obtains
0 = Vg – I RL – D'V (3-11)
(recall that D + D’ = 1). It can be seen that the inductor winding resistance RL adds another
term to the inductor volt-second balance equation. In the ideal boost converter (RL = 0)
example of chapter 2, we were able to solve this equation directly for the voltage
conversion ratio V/V g. Equation (3-11) cannot be immediately solved in this manner,
because the inductor current I is unknown. A second equation is needed, to eliminate I.
The second equation is obtained using capacitor charge balance. The capacitor
current iC(t) waveform is given in Fig. 3.8. The dc component, or average value, of the
capacitor current waveform is
iC(t) = D (-V / R) + D' (I – V / R) (3-12)
By setting <iC> to zero and collecting terms, one obtains
0 = D'I – V / R (3-13)

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 Chapter 3. Steady-state equivalent circuit modeling, losses, and efficiency

We now have two equations, Eqs. (3-11) and (3-13), and two unknowns, V and I.
Elimination of I and solution for V yields
V = 1 1
Vg D' (1 + RL / D'2R) (3-14)
This is the desired solution for the converter output voltage V. It is plotted in Fig. 3.9 for
several values of RL / R. It can be seen that Eq. (3-14) contains two terms. The first, 1/D’,
is the ideal conversion ratio, with RL = 0. The second term, 1/(1 + RL / D’2 R), describes
the effect of the inductor winding resistance. If RL is much less than D’2 R, then the second
term is approximately equal to unity and the conversion ratio is approximately equal to the
ideal value 1/D’. However, as RL is increased in relation to D’2 R, then the second term is
reduced in value, and V/Vg is reduced as well.
5
RL / R = 0
4.5

RL / R = 0.01
4

3.5

3
RL / R = 0.02
V / Vg

2.5

2
RL / R = 0.05

1.5

1 RL / R = 0.1

0.5

0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1

Fig. 3.9. Output voltage vs. duty cycle, boost converter with inductor copper loss.

As the duty cycle D approaches one, the inductor winding resistance RL causes a
major qualitative change in the V/Vg curve. Rather than approaching infinity at D=1, the
curve tends to zero. Of course, it is unreasonable to expect that the converter can produce
infinite voltage, and it should be comforting to the engineer that the prediction of the model
is now more realistic. What happens at D=1 is that the switch is always in position 1. The
inductor is never connected to the output, so no energy is transferred to the output and the
output voltage tends to zero. The inductor current tends to a large value, limited only by the

6
 Chapter 3. Steady-state equivalent circuit modeling, losses, and efficiency

inductor resistance RL. A large amount of power is lost in the inductor winding resistance,
equal to V g2 / R L , while no power is delivered to the load; hence, we can expect that the
converter efficiency tends to zero at D=1.
Another implication of Fig. 3.9 is that the inductor winding resistance RL limits the
maximum voltage which the converter can produce. For example, with RL/R = 0.02, it can
be seen that the maximum V/Vg is approximately 3.5. If it is desired to obtain V/Vg = 5,
then according to Fig. 3.9 the inductor winding resistance RL must be reduced to less than
one percent of the load resistance R. The only problem is that decreasing the inductor
winding resistance requires building a larger, heavier, more expensive inductor. So it is
usually important to optimize the design, by correctly modeling the effects of loss elements
such as R L, and choosing the smallest inductor which will do the job. We now have the
analytical tools needed to do this.

3 . 3 . Construction of equivalent circuit model

Next, let us refine the dc transformer model, to account for converter losses. This
will allow us to determine the converter voltages, currents, and efficiency using well-
known techniques of circuit analysis.
In the previous section, we used the principles of inductor volt-second balance and
capacitor charge balance to write Eqs. (3-11) and (3-13), repeated here:
<vL> = 0 = Vg – I RL – D'V
<iC> = 0 = D'I – V / R (3-15)
These equations state that the dc components of the inductor voltage and capacitor current
are equal to zero. Rather than algebraically solving the equations as in the previous section,
we can reconstruct a circuit model based on these equations, which describes the dc
behavior of the boost converter with inductor copper loss. This is done by constructing a
circuit whose Kirchoff loop and node equations are identical to Eqs. (3-15).

Inductor voltage equation

<vL> = 0 = Vg – I RL – D'V (3-16)
This equation was derived by use of Kirchoff’s voltage law to find the inductor
voltage during each subinterval. The results were averaged and set to zero. Equation (3-16)
states that the sum of three terms having the dimensions of voltage are equal to <vL>, or
zero. Hence, Eq. (3-16) is of the same form as a loop equation; in particular, it describes
the dc components of the voltages around a loop containing the inductor, with loop current
equal to the dc inductor current I.

7
 Chapter 3. Steady-state equivalent circuit modeling, losses, and efficiency

So let us construct a circuit containing a L RL

loop with current I, corresponding to Eq. (3-16). + <vL> – + IRL –

=0
The first term in Eq. (3-16) is the dc input voltage + + D' V
Vg – –
Vg, so we should include a voltage source of value I
V g as shown in Fig. 3.10. The second term is a
voltage drop of value IRL, which is proportional to
Fig. 3.10. Circuit whose loop equation is
the current I in the loop. This term corresponds to identical to Eq. (3-16), obtained by
equating the average inductor voltage
a resistance of value RL. The third term is a voltage
<vL> to zero.
D’V, dependent on the converter output voltage.
For now, we can model this term using a
dependent voltage source, with polarity chosen to satisfy Eq. (3-16).

Capacitor current equation

<iC> = 0 = D'I – V / R (3-17)
This equation was derived using Kirchoff’s current law to find the capacitor current during
each subinterval. The results were averaged, and the average capacitor current was set to
zero.
Equation (3-17) states that the sum of two dc currents are equal to <iC>, or zero.
Hence, Eq. (3-17) is of the same form as a node equation; in particular, it describes the dc
components of currents flowing into a node connected to the capacitor. The dc capacitor
voltage is V.
So now let us construct a circuit containing a node
node connected to the capacitor, as in Fig. 3.11, V/R
whose node equation satisfies Eq. (3-17). The second <iC> +
=0
term in Eq. (3-17) is a current of magnitude V/R,
D' I C V R
proportional to the dc capacitor voltage V. This term
corresponds to a resistor of value R, connected in –
parallel with the capacitor so that its voltage is V and
hence its current is V/R. The first term is a current Fig. 3.11. Circuit whose node equation
is identical to Eq. (3-17), obtained by
D’I, dependent on the dc inductor current I. For now, equating the average capacitor current
we can model this term using a dependent current <iC> to zero.

source as shown. The polarity of the source is chosen

to satisfy Eq. (3-17).

8
 Chapter 3. Steady-state equivalent circuit modeling, losses, and efficiency

Complete circuit model

RL
The next step is to combine the
+
circuits of Figs. 3.10 and 3.11 into a
single circuit, as in Fig. 3.12. This Vg +– I D' V + D' I V R
–
circuit can be further simplified by
–
recognizing that the dependent voltage
and current sources constitute an ideal Fig. 3.12. The circuits of Figs. 3.10 and 3.11, drawn
dc transformer, as discussed in section together.
3.1. The D’V dependent voltage source
RL D' : 1
depends on V, the voltage across the +
I
dependent current source. Likewise,
the D’I dependent current source Vg + –
V R

depends on I, the current flowing –

through the dependent voltage source.
Fig. 3.13. Equivalent circuit model of the boost
In each case, the coefficient is D’. converter, including a D’:1 dc transformer and the
Hence, the dependent sources form a inductor winding resistance RL.
circuit similar to Fig. 3.2; the fact that
the voltage source appears on the primary rather than the secondary side is irrelevant, due
to the symmetry of the transformer. They are therefore equivalent to the dc transformer
model of Fig. 3.3, with turns ratio D’:1. Substitution of the ideal dc transformer model for
the dependent sources yields the equivalent circuit of Fig. 3.13.
The equivalent circuit model can now be RL / D' 2
+
manipulated and solved to find the converter voltages D' I

and currents. For example, we can eliminate the Vg / D' + V R

–
transformer by referring the Vg voltage source and RL
–
resistance to the secondary side. As shown in Fig. 3.14,
the voltage source value is divided by the effective turns Fig. 3.14. Simplification of the
equivalent circuit of Fig. 3.13,
ratio D’, and the resistance RL is divided by the square by referring all elements to
of the turns ratio, D’2. This circuit can be solved directly secondary side.

for the output voltage V, using the voltage divider

formula:
Vg R V 1
V = = g
D' RL D' RL
R+ 1+
D' 2 D'2 R (3-18)
This result is identical to Eq. (3-14). The circuit can also be solved directly for the inductor
current I, by referring all elements to the transformer primary side. The result is:

9
 Chapter 3. Steady-state equivalent circuit modeling, losses, and efficiency

Vg Vg 1
I = =
D'2 R + RL D'2 RL
1+
D'2 R (3-19)

Efficiency
The equivalent circuit model also allows us to compute the converter efficiency η .
Figure 3.13 predicts that the converter input power is
Pin = (Vg) (I) (3-20)
The load current is equal to the current in the secondary of the ideal dc transformer, or D’I.
Hence, the model predicts that the converter output power is
Pout = (V) (D'I) (3-21)
Therefore, the converter efficiency is
(V) (D'I)
η = Pout = = V D'
Pin (Vg) (I) Vg (3-22)
Substitution of Eq. (3-18) into Eq. (3-22) to eliminate V yields
η = 1
RL
1+
D'2 R (3-23)
This equation is plotted in Fig. 3.15, for several values of R L/R. It can be seen from Eq.
(3-23) that, to obtain high efficiency, the inductor winding resistance RL should be much

100%
0.002
90%
0.01
80%

70% 0.02

60% 0.05

η 50% RL/R = 0.1

40%

30%

20%

10%

0%
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1

Fig. 3.15. Efficiency vs. duty cycle, boost converter with inductor copper loss.

10
 Chapter 3. Steady-state equivalent circuit modeling, losses, and efficiency

smaller that D’2R, the load resistance referred to the primary side of the ideal dc
transformer. This is easier to do at low duty cycle, where D’ is close to unity, than at high
duty cycle where D’ approaches zero. It can be seen from Fig. 3.15 that the efficiency is
typically high at low duty cycles, but decreases rapidly to zero near D=1.
Thus, the basic dc transformer model can be refined to include other effects, such
as the inductor copper loss. The model describes the basic properties of the converter,
including (a) transformation of dc voltage and current levels, (b) second-order effects such
as power losses, and (c) the conversion ratio M. The model can be solved to find not only
the output voltage V, but also the inductor current I and the efficiency η . All of the well-
known techniques of circuit analysis can be employed to solve the model, making this a
powerful and versatile approach.
The example considered so far is a relatively simple one, in which there is only a
single loss element, RL. Of course, real converters are considerably more complicated, and
contain a large number of loss elements. When solving a complicated circuit to find the
output voltage and efficiency, it behooves the engineer to use the simplest and most
physically meaningful method possible. Writing a large number of simultaneous loop or
node equations is not the best approach, because its solution typically requires several
pages of algebra, and the engineer usually makes algebra mistakes along the way. The
practicing engineer often gives up before finding the correct solution. The equivalent circuit
approach avoids this situation, because one can simplify the circuit via well-known circuit
manipulations such as pushing the circuit elements to the secondary side of the transformer.
Often the answer can then be written by inspection, using the voltage divider rule or other
formulas. The engineer develops confidence that the result is correct, and does not contain
algebra mistakes.

3 . 4 . How to obtain the input port of the model

Let’s try to derive the model of ig 1 iL L RL

+ vL – +
the buck converter of Fig. 3.16, using
2
the procedure of section 3.3. The Vg + C vC R
–
inductor winding resistance is again
–
modeled by a series resistor RL.
The average inductor voltage Fig. 3.16. Buck converter example.

can be shown to be
<vL> = 0 = DVg – ILRL – VC (3-24)

11
 Chapter 3. Steady-state equivalent circuit modeling, losses, and efficiency

This equation describes a loop with the dc inductor current IL. The dc components of the
voltages around this loop are: (i) the DVg term, modeled as a dependent voltage source,
(ii) a voltage drop ILRL, modeled as resistor RL, and (iii) the dc output voltage VC.
The average capacitor current is
<iC> = 0 = IL – VC/R (3-25)
This equation describes the dc currents flowing into the node connected to the capacitor.
The component of inductor current, IL, flows into this node. The dc load current VC/R (i.e.,
the current flowing through the load resistor R) flows out of this node. An equivalent
circuit which models Eqs. (3-24) and (3-25) is given in Fig. 3.17. This circuit can be
solved to determine the dc output voltage VC.
RL What happened to the dc
+ <vL> – + VC /R transformer in Fig. 3.17? We expect the
=0 <i C>
=0 buck converter model to contain a dc
DVg + VC R
– IL transformer, with turns ratio equal to the
– dc conversion ratio, or 1:D. According to
Fig. 3.2, the secondary of this
Fig. 3.17. Equivalent circuit derived from Eqs. (3- transformer is equivalent to a dependent
24) and (3-25).
voltage source, of value DVg. Such a
source does indeed appear in Fig. 3.17. But where is the primary? From Fig. 3.2, we
expect the primary of the dc transformer to be equivalent to a dependent current source. In
general, to derive this source, it is necessary to find the dc component of the converter
input current ig(t).
The converter input ig(t)
iL (t) ≈ IL
current waveform ig(t) is
sketched in Fig. 3.18. When the area =
switch is in position 1, ig(t) is DTs IL
0 t
equal to the inductor current.
0 DTs Ts
Neglecting the inductor current
ripple, we have ig(t) ≈ IL. When Fig. 3.18. Converter input current waveform ig(t).
the switch is in position 2, ig(t)
is zero. The dc component, or average value, of ig(t) is
Ts
Ig = 1 ig(t) dt = DIL
Ts
0 (3-26)
The integral of ig(t) is equal to the area under the ig(t) curve, or DTsIL according to

12
 Chapter 3. Steady-state equivalent circuit modeling, losses, and efficiency

Fig. 3.18. The dc component Ig is therefore (DTsIL)/Ts = DIL.

Equation (3-26) states that Ig, the dc component of current
Vg + –
Ig D IL
drawn by the converter out of the Vg source, is equal to DIL. An
equivalent circuit is given in Fig. 3.19.
A complete model for the buck converter can now be
Fig. 3.19. Converter input
obtained by combining Figs. 3.17 and 3.19 to obtain Fig. 3.20. port dc equivalent circuit.
The dependent current and voltage sources can be combined into
a dc transformer, since the DVg dependent voltage source has value D times the voltage V g
across the dependent current source, and the current source is the same constant D times the
current IL through the dependent voltage source. So, according to Fig. 3.2, the sources are
equivalent to a dc transformer with turns ratio 1:D, as shown in Fig. 3.21.
Ig IL RL Ig 1:D IL RL
+ +

Vg + D IL + DV VC R Vg + VC R
– g –
–

– –

Fig. 3.20. The circuits of Figs. 3.17 and 3.19, Fig. 3.21. Equivalent circuit of the buck converter,
drawn together. including a 1:D dc transformer and the inductor
winding resistance RL.

In general, to obtain a complete dc equivalent circuit which models the converter

input port, it is necessary to write an equation for the dc component of the converter input
current. An equivalent circuit corresponding to this equation is then constructed. In the case
of the buck converter, as well as in other converters having pulsating input currents, this
equivalent circuit contains a dependent current source which becomes the primary of a dc
transformer model. In the boost converter example of section 3.3, it was unnecessary to
explicitly write this equation, because the input current ig(t) coincided with the inductor
current i(t), and hence a complete equivalent circuit could be derived using only the
inductor voltage and capacitor current equations.

3 . 5 . Example: inclusion of semiconductor conduction losses in the boost

converter model
As a final example, let us
i L
consider modeling semiconductor +
iC
conduction losses in the boost converter
Vg +
– +
C R v
of Fig. 3.22. Another major source of –
DTs Ts
power loss is the conduction loss due to –

semiconductor device forward voltage Fig. 3.22. Boost converter example.

13
 Chapter 3. Steady-state equivalent circuit modeling, losses, and efficiency

drops. The forward voltage of a MOSFET or BJT can be modeled with reasonable
accuracy as an on-resistance R on. In the case of a diode, IGBT, or thyristor, a voltage
source plus an on-resistance yields a model of good accuracy; the on-resistance may be
omitted if the converter is being modeled at a single operating point.
a) b)

L RL i L RL RD
i

+
–
+ vL – + + vL – +
iC iC
VD
Vg + Ron C R v + C R v
– Vg –

– –

Fig. 3.23. Boost converter circuits, (a) when MOSFET conducts, (b) when diode conducts.

vL(t)
Vg – IRL – IRon

DTs D' Ts
When the gate drive signal is t
high, the MOSFET turns on and the Vg – IRL – VD – IRD – V
diode is reverse-biased. The circuit iC (t)
I – V/R
then reduces to Fig. 3.23(a). In the
conducting state, the MOSFET is
-V/R
modeled by the on-resistance R on. The
inductor winding resistance is again
represented as in Fig. 3.5. The Fig. 3.24. Inductor voltage vL(t) and capacitor current
iC(t) waveforms, for the converter of Fig. 3.22.
inductor voltage and capacitor current
are given by
vL(t) = Vg – iRL – iRon ≈ Vg – IRL – IRon
iC(t) = – v/R ≈ – V/R (3-27)
The inductor current and capacitor voltage have again been approximated by their dc
components.
When the gate drive signal is low, the MOSFET turns off. The diode becomes
forward-biased by the inductor current, and the circuit reduces to Fig. 3.23(b). In the
conducting state, the diode is modeled in this example by voltage source V D and resistance
R D . The inductor winding resistance is again modeled by resistance R L. The inductor
voltage and capacitor current for this subinterval are

14
 Chapter 3. Steady-state equivalent circuit modeling, losses, and efficiency

vL(t) = Vg – iRL – VD – iRD – v ≈ Vg – IRL – VD – IRD – V

iC(t) = i – v/R ≈ I – V/R (3-28)
The inductor voltage and capacitor current waveforms are sketched in Fig. 3.24.
The dc component of the inductor voltage is given by
<vL> = D(Vg – IRL – IRon) + D'(Vg – IRL – VD – IRD – V) = 0 (3-29)
By collecting terms and noting that D+D’ = 1, one obtains
Vg – IRL – IDRon – D'VD – ID'RD – D'V = 0 (3-30)
This equation describes the dc D' VD
RL D Ron D' RD

+
–
components of the voltages around a + IRL - + IDRon- + ID'RD -
loop containing the inductor, with + D' V
Vg + – –
loop current equal to the dc inductor I

current I. An equivalent circuit is

given in Fig. 3.25. Fig. 3.25. Equivalent circuit corresponding to Eq. (3-30).
The dc component of the
capacitor current is V/R
<iC> = D(–V/R) + D'(I – V/R) = 0 +
(3-31)
Upon collecting terms, one obtains D' I V R

D'I – V/R = 0 (3-32) –

This equation describes the dc components of the
Fig. 3.26. Equivalent circuit
currents flowing into a node connected to the capacitor, corresponding to Eq. (3-32)
with dc capacitor voltage equal to V. An equivalent
circuit is given in Fig. 3.26.
The two circuits are drawn together in Fig. 3.27. The dependent sources are
combined into an ideal D’:1 transformer in Fig. 3.28, yielding the complete dc equivalent
circuit model.

D' VD
RL D Ron D' RD
+
–

Vg + D' V + D' I V R
– I –

Fig. 3.27. The circuits of Figs. 3.25 and 3.26, drawn together.

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 Chapter 3. Steady-state equivalent circuit modeling, losses, and efficiency

D' VD
RL D Ron D' RD D' : 1

+
–
+

Vg + V R
– I

Fig. 3.28. Equivalent circuit model of the boost converter of Fig. 3.22, including ideal dc transformer,
inductor winding resistance, and MOSFET and diode conduction losses.

Solution of Fig. 3.28 for the output voltage V yields

V = 1 V g – D'V D D'2 R
D' D'2R + RL + DRon + D'R D (3-33)
Dividing by Vg gives the voltage conversion ratio:
V = 1 1 – D'VD 1
Vg D' V g 1 + RL + DRon + D'RD
D'2 R (3-34)
It can be seen that the effect of the loss elements V D , R L, R on, and R D is to decrease the
voltage conversion ratio below the ideal value (1/D’).
The efficiency is given by η = Pout / Pin. From Fig. 3.28, Pin = VgI and Pout = VD’I.
Hence,

1 – D'VD
Vg
η = D' V =
Vg 1 + RL + DRon + D'RD
D'2 R (3-35)
For high efficiency, we require
Vg / D' >> VD
and D'2R >> RL + DRon + D'RD (3-36)

It may seem strange that the equivalent circuit model of Fig. 3.28 contains effective
resistances DRon and D’RD, whose values vary with duty cycle. The reason for this
dependence is that the semiconductor on-resistances are connected in the circuit only when
their respective semiconductor devices conduct. For example, at D = 0, the MOSFET never
conducts, and the effective resistance DRon disappears from the model. These effective
resistances correctly model the average power losses in the elements. For instance, the
equivalent circuit predicts that the power loss in the MOSFET on-resistance is I2DRon. In
the actual circuit, the MOSFET conduction loss is I2Ron while the MOSFET conducts, and
zero while the MOSFET is off. Since the MOSFET conducts with duty cycle D, the
average conduction loss is DI2Ron, which coincides with the prediction of the model.

16
 Chapter 3. Steady-state equivalent circuit modeling, losses, and efficiency

i(t) In general, to predict the power

2I
(c) loss in a resistor R, we must calculate
(b) 1.1 I the root-mean-square current Irms
I
(a)
through the resistor, rather than the
0 t
0 DTs Ts average current. The average power loss
is then given by Irms2R. Nonetheless, the
Fig. 3.29. Transistor current waveform, for various
filter inductor values: (a) with a very large average model of Fig. 3.28 correctly
inductor, such that ∆i ≈ 0; (b) with a typical predicts average power loss, provided
inductor value, such that ∆i = 0.1 I; (c) with a
small inductor value, chosen such that ∆i = I. that the inductor current ripple is small.
For example, consider the MOSFET
conduction loss in the buck converter. The actual transistor current waveform is sketched in
Fig. 3.29, for several values of inductor current ripple ∆i. Case (a) corresponds to use of
an infinite inductance L, leading to zero inductor current ripple. As shown in Table 3.1,
the MOSFET conduction loss is then given by Irms2Ron = DI2Ron, which agrees exactly with
the prediction of the average model. Case (b) is a typical choice of inductance L, leading to
an inductor current ripple of ∆i = 0.1I. The exact MOSFET conduction loss, calculated
using the rms value of MOSFET current, is then only 0.33% greater than the prediction of
the average model. In the extreme case (c) where ∆i = I, the actual conduction loss is 33%
greater than that predicted by the average model. Thus, the dc (average) model correctly
predicts losses in the component nonidealities, even though rms currents are not calculated.
The model is accurate provided that the inductor current ripple is small.

Table 3.1. Effect of inductor current ripple on MOSFET conduction loss

Inductor current ripple MOSFET rms current Average power loss in Ron

(a) ∆i = 0 I D D I2 Ron
(b) ∆i = 0.1 I (1.00167) I D (1.0033) D I2 Ron
(c) ∆i = I (1.155) I D (1.3333) D I2 Ron

3 . 6 . Summary of key points

1. The dc transformer model represents the primary functions of any dc-dc converter:
transformation of dc voltage and current levels, ideally with 100% efficiency, and
control of the conversion ratio M via the duty cycle D. This model can be easily
manipulated and solved using familiar techniques of conventional circuit analysis.

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 Chapter 3. Steady-state equivalent circuit modeling, losses, and efficiency

2. The model can be refined to account for loss elements such as inductor winding
resistance and semiconductor on-resistances and forward voltage drops. The
refined model predicts the voltages, currents, and efficiency of practical nonideal
converters.
3. In general, the dc equivalent circuit for a converter can be derived from the inductor volt-
second balance and capacitor charge balance equations. Equivalent circuits are
constructed whose loop and node equations coincide with the volt-second and
charge balance equations. In converters having a pulsating input current, an
additional equation is needed to model the converter input port; this equation may be
obtained by averaging the converter input current.

P ROBLEMS

3.1. The inductor of a buck-boost converter has winding resistance RL. All other losses can be ignored.
(a) Derive an expression for the nonideal voltage conversion ratio V/Vg.
(b) Plot your result of part (a) over the range 0≤D≤1, for RL/R = 0, 0.01, and 0.05.

3 . 2 . The inductor of a buck-boost converter has winding resistance R L . All other losses can be ignored.
Derive an equivalent circuit model for this converter. Your model should explicitly show the input
port of the converter, and should contain two dc transformers.

L1 RL1 Q1 L2 RL2

i1 + i2 +

Vg + C1 vC1 C2 R v
– D1

– –

Fig. 3.30

3.3. To reduce the switching harmonics present in the input current of a certain buck converter, an input
filter is added as shown in Fig. 3.30. Inductors L1 and L 2 contain winding resistances R L1 and R L2,
respectively. The MOSFET has on-resistance R on , and the diode forward voltage drop can be
modeled by a constant voltage VD plus a resistor RD. All other losses can be ignored.
(a) Derive a complete equivalent circuit model for this circuit.
(b) Solve your model to find the output voltage V.
(c) Derive an expression for the efficiency. Manipulate your expression into a form similar to Eq.
(3-35).

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 Chapter 3. Steady-state equivalent circuit modeling, losses, and efficiency

Q1 1A
– +
Vg

+
–
100µH 5 volts load
1.5 volts

+ DTs Ts –
fs = 40kHz

Fig. 3.31

3.4. A 1.5 volt battery is to be used to power a 5 volt, 1 ampere load. It has been decided to use a buck-
boost converter in this application. A suitable transistor is found with an on-resistance of 35mΩ,
and a schottky diode is found with a forward drop of 0.5 volts. The on-resistance of the schottky
diode may be ignored. The power stage schematic is shown in Fig. 3.31.
(a) Derive an equivalent circuit which models the dc properties of this converter. Include the
transistor and diode conduction losses, as well as the inductor copper loss, but ignore all
other sources of loss. Your model should correctly describe the converter dc input port.
(b) It is desired that the converter operate with at least 70% efficiency under nominal conditions
(i.e., when the input voltage is 1.5V and the output is 5V at 1A). How large can the
inductor winding resistance be? At what duty cycle will the converter then operate? Note:
there is an easy way and a not-so-easy way to analytically solve this part.
(c) For your design of part (b), compute the power loss in each element.
(d) Plot the converter output voltage and efficiency over the range 0≤D≤1, using the value of
inductor winding resistance which you selected in part (b).
(e) Discuss your plot of part (d). Does it behave as you expect? Explain.

For problems 3.5 and 3.6, a transistor having an on-resistance of 0.5Ω is used. To simplify the problems,
you may neglect all losses other than the transistor conduction loss. You may also neglect the dependence
of MOSFET on-resistance on rated blocking voltage. These simplifying assumptions reduce the differences
between converters, but do not change the conclusions regarding which converter performs best in the given
situations.

3.5. It is desired to interface a 500V dc source to a 400V, 10A load using a dc-dc converter. Two possible
approaches, using buck and buck-boost converters, are illustrated in Fig. 3.32. Use the
assumptions described above to:
(a) Derive equivalent circuit models for both converters, which model the converter input and
output ports as well as the transistor conduction loss.
(b) Determine the duty cycles which cause the converters to operate with the specified conditions.
(c) Compare the transistor conduction losses and efficiencies of the two approaches, and conclude
which converter is better suited to the specified application.
10A 10A
+ + – +

–
500V + 400V 500V + 400V
–

– – + –

Fig. 3.32

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 Chapter 3. Steady-state equivalent circuit modeling, losses, and efficiency

3.6. It is desired to interface a 300V battery to a 400V, 10A load using a dc-dc converter. Two possible
approaches, using boost and buck-boost converters, are illustrated in Fig. 3.33. Using the
assumptions described above (before problem 3.5), determine the efficiency and power loss of each
approach. Which converter is better for this application?
10A 10A
+ + – +

300V 400V 300V 400V

– – + –

Fig. 3.33

3 . 7 . A buck converter is operated from the rectified 230V ac mains, such that the converter dc input
voltage is
Vg = 325 ± 20%
A control circuit automatically adjusts the converter duty cycle D, to maintain a constant dc output
voltage of V = 240Vdc. The dc load current I can vary over a 10:1 range:
10A ≥ I ≥ 1A
The MOSFET has an on-resistance of 0.8Ω. The diode conduction loss can be modeled by a 0.7V
source in series with a 0.2Ω resistor. All other losses can be neglected.
(a) Derive an equivalent circuit which models the converter input and output ports, as well as the
loss elements described above.
(b) Given the range of variation of Vg and I described above, over what range will the duty cycle
vary?
(c) At what operating point (i.e., at what value of V g and I) is the converter power loss the
largest? What is the value of the efficiency at this operating point?

3.8. In the Cuk converter of Fig. 3.34, the MOSFET has on-resistance R on and the diode has a constant
forward voltage drop VD. All other losses can be neglected.
(a) Derive an equivalent circuit model for this converter. Suggestion: if you don’t know how to
handle some of the terms in your dc equations, then temporarily leave them as dependent
sources. A more physical representation of these terms may become apparent once dc
transformers are incorporated into the model.
(b) Derive analytical expressions for the converter output voltage and for the efficiency.
(c) For V D = 0, plot V/V g vs. D over the range 0≤D≤1, for (i) R on /R = 0.01, and (ii) R on /R =
0.05.
(d) For VD = 0, plot the converter efficiency over the range 0≤D≤1, for (i) R on /R = 0.01, and (ii)
R on/R = 0.05.
L1 L2
+
C1
Vg + Q1 D1 C2 R V
–

Fig. 3.34

20