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B.E EP 502 CBCS/Old-Sem - V Microprocessor and Microcontroller

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B.

E EP 502 CBCS/Old- Sem –V


Microprocessor and Microcontroller
Question Paper-II
Multiple Choice Questions
Unit 1: 8-bit Microprocessor
1. Which of the following is correct for microprocessor Intel 8085?
a) 8 bit microprocessor
b) 16 bit microprocessor
c) 4 bit microprocessor
d) 32 bit microprocessor
Answer: Option a

2. Which of the following part of the microprocessor is close related to register?


a) Processor
b) CPU
c) ALU
d) Memory
Answer: Option d

3. Which of the following is not a special function register?


a) Program counter
b) Instruction pointer
c) Accumulator
d) Stack pointer
Answer: Option c

4. SP stands for ________________


a) Stack pointer
b) Segment pointer
c) Status pointer
d) State pointer
Answer: Option a

5. How many flags does 8085 have?


a) 4
b) 5
c) 8
d) 9
Answer: Option c

6. Which of the following is used for storing flag registers?


a) Status register
b) Control register
c) Buffer register
d) None of the mentioned
Answer: Option a

7. Which of the following function relate to stack?


a) Push and pop
b) Call and return
c) Both push pop and call return
d) None of the mentioned
Answer: Option a

8. The cycle required to fetch and execute an instruction in a 8085 is which one of the following?
a. Clock cycle
b. Memory cycle
c. Machine cycle
d. Instruction cycle
Answer: Option d

9. Which of the following statements for Intel 8085 is correct?


a. Program counter specifies the address of the instruction last executed
b. Program counter specifies the address of the instruction being executed
c. Program counter specifies the address of the instruction to be executed
d. Program counter specifies the address of the instruction executed so far
Answer: Option c

10. In Intel 8085, ALE signal is made high to


a. Enable the data bus to be used as low order address bus
b. To latch data D0-D7 from data bus
c. To disable data bus
d. To achieve all the functions listed above
Answer: Option a

11. ALU of 8085 microprocessor consists of


a. Accumulator, temporary register, arithmetic and logic circuits
b. Accumulator, arithmetic and logic circuits and five flags
c. Accumulator, arithmetic and logic circuits
d. Accumulator, temporary register, arithmetic, logic circuits and five flags
Answer: Option d

12. Consider the following statements:


In 8085 microprocessor, data bus and address bus are multiplexed in order to
I) Increase the speed of microprocessor
II) Reduce the number of pins
III) Connect more peripheral chips
Which of these statements is/ are correct?
a. (I) only
b. (II) only
c. (II) and (III)
d. (I), (II) & (III)
Answer: Option b

13. Why is READY signal used in 8085 microprocessor?


a. To indicate to the user that the microprocessor is working and ready for use
b. To provide proper WAIT states when the microprocessor is communicating with a slow peripheral
device
c. To slow down a fast peripheral device so as to communicate at the microprocessor’s device.
d. None of the above
Answer: Option b
14. Consider the following registers:
1. Accumulator and flag registers
2. B and C register
3. D and E register
4. H and L register
Which of these 8- bit registers of 8085 microprocessor can be paired together to make a 16 –bit
register?
a. 1, 3 and 4
b. 2, 3 and 4
c. 1, 2 and 3
d. 1, 2 and 4
Answer: Option b

15. The addressing mode depicted in the given figure is

a. Implicit addressing mode


b. Indirect addressing mode
c. Register indirect addressing mode
d. Direct addressing mode
Answer: Option d

16. A stack pointer stores the ____.


a. Address of bottom of stack
b. Address of instruction being executed
c. Address of instruction to be executed
d. Address of top of stack
Answer: Option d

17. Contents of opcode from memory are loaded into Instruction Register (IR) in this T-state:
a. T1 opcode fetch
b. T2 opcode fetch
c. T3 opcode fetch
d. T4 opcode fetch
Answer: Option c

18. In 8085, which addressing mode is called inherent addressing?


a. Direct
b. Register
c. Implicit
d. Immediate
Answer: Option c

19. Which one of the following is not addressing mode in 8085 microprocessor?
a. Immediate
b. Indirect
c. Register Indirect
d. Implicit
Answer: Option b

20. What is the addressing mode of instruction SUI 45H?


a. Direct
b. Register
c. Implicit
d. Immediate
Answer: Option d

Unit 2: Instruction Set & Programming of 8085

1. The instructions based on the stack operations are also known as 'zero address' or 'implied
instructions, because _______.
a. address gets updated automatically in stack pointer
b. processor can refer a memory stack without specifying the address
c. both a & b
d. none of the above
Answer: Option c

2. What is another name of memory stack especially given for the fundamental function performed by
it?
a. Last-in-first-out (LIFO)
b. First-in-last-out (FILO)
c. First-in-first-out (FIFO)
d. Last-in-last-out (LILO)
Answer: Option a

3. What does the last instruction of each subroutine that transfer the control to the instruction in the
calling program with temporary address storage called as?
a. jump to subroutine
b. branch to subroutine
c. return from subroutine
d. call subroutine
Answer: Option c

4. A sequence of two registers that multiplies the content of DE register pair by two and stores the
result in HL register pair (in 8085 assembly language) is
a. XCHG & DAD B
b. XTHL & DAD H
c. PCHL & DAD D
d. XCHG & DADH
Answer: Option d

5. Which of the following instruction have 6 T states?


a. SPHL
b. MOV A, B
c. XCHG
d. CALL 8900 H
Answer: Option a

6. If you wish to save the value of the accumulator on the stack, which of the following instruction
will you use?
a. PUSH PSW
b. PUSH A
c. POP PSW
d. PUSH SP
Answer: Option a

7. Pick the instruction(s) that resets the accumulator


a. CMA
b. CLR A
c. ORA A
d. XRA A
Answer: Option d

8. POP B is a
a. 1 byte instruction
b. 2 byte instruction
c. 3 byte instruction
d. 4 byte instruction
Answer: Option a

9. Upon the execution of the RET instruction:


a. PC gets incremented
b. control goes directly to the next instruction after the calling instruction without any operation
c. control goes directly to the next instruction after the calling instruction without any operation and
also PC will get incremented
d. top of the stack will get popped and get assigned to the PC
Answer: Option d

10. The content of the HL pair after the execution of the following instructions is ___.
XRA A
MOV L, A
MOV H, L
INX H
DAD H
a. 0000H
b. 0001H
c. 0011H
d. 0002H
Answer: Option d

11. To set a bit you can use ___ logic and to reset it you can use ___ logic.
a. NOT, AND
b. OR, AND
c. AND, OR
d. AND, NOT
Answer: Option b

12. To add two 32-bit numbers using an 8085, how many additions would you need to perform?
a. 2
b. 1
c. 8
d. 4
Answer: Option d
13. What type of instructions can potentially change the sequence of operations in a program?
a. Logical instructions
b. Data transfer instructions
c. Branch instructions
d. Arithmetic instructions
Answer: Option c

14. When we use RRC instruction once in 8085, the number is


a. Divided by 4
b. Multiplied by 2
c. Divided by 2
d. Multiplied by 4
Answer: Option c

15. If a microprocessor uses a 5 MHz oscillator. The duration of one T state is


a. 1 μs
b. 0.333 μs
c. 0.2 μs
d. 2 μs
Answer: Option c

16. Which of the following 8085 instructions affect all flags except the CY flag?
a. ADC R
b. INR R
c. ACI data
d. SUI data
Answer: Option b

17. On the execution of PUSH/POP instruction, the contents of the SP are incremented/decremented
by
a. 8
b. 16
c. 2
d. 1
Answer: Option c

18. After the execution of CMP A instruction


a. ZF is set and CY is unchanged
b. ZF is reset and CY is set
c. ZF is set and CY is reset
d. ZF is reset and CY is unchanged
Answer: Option c

19. What will be the value in the memory location 7101H after the execution of the following code?
The data at memory location 7100 is A7H.
LXI H, 7100H
MOV A, M
CMA
INR A
STA 7101H
HLT
a. 59H
b. 58H
c. 5AH
d. none of these
Answer: Option a

20. What will be the value in the memory location 7101H after the execution of the following code?
The data at memory location 7100 is 35H.
LDA 7100H
ADD A
ADD A
STA 7101H
HLT
a. D4H
b. D3H
c. 4DH
d. 3DH
Answer: Option a
Unit 3: Memory Mapping & Interrupts of 8085

1. Select the true statement


a. Some microprocessors have only one type of address space.
b. An address space is a set of all possible addresses which can be generated by a microprocessor.
c. Two types of address spaces are memory and I/O address space.
d. All of the above
Answer: Option d

2. This is a type of interrupt where the external interrupting device supplies the address in addition to
the interrupt request.
a. Non-maskable interrupt
b. Non-vectored interrupt
c. Maskable interrupt
d. Polled interrupt
Answer: Option b

3. For memory mapped I/O, which of the following is true?


a. Devices are accessed using IN and OUT instructions
b. Devices have 8-bit address line
c. There can be maximum of 256 input devices and 256 output devices
d. Arithmetic and logic operations can be directly performed with the I/O data
Answer: Option d

4. In I/O mapped I/O, which of the following is true?


a. Devices have 16-bit address line
b. Devices are accessed using IN and OUT instructions
c. Memory map is shared between I/O and system memory
d. Arithmetic and logic operations can be directly performed with the I/O data
Answer: Option b

5. RST0 - RST7 are the __________ in 8085.


a. hardware interrupts
b. logical interrupts
c. software interrupts
d. conditional interrupts
Answer: Option c
6. Which of the following is not true during the execution of an interrupt service routine, which does
not contain any EI instructions
a. the microprocessor can be interrupted by a non-mask able interrupt
b. the microprocessor cannot be interrupted by any interrupt
c. the microprocessor cannot be interrupted by any maskable interrupt
d. all interrupts except non-maskable interrupt are disabled
Answer: Option b

7. The execution of RST n instruction causes the stack pointer to


a. increment by two
b. decrement by two
c. remain unaffected
d. none of the above
Answer: Option b

8. Which instruction set performs the dual operation of reading the status of interrupts as well as serial
input data bit?
a. RNZ
b. RZ
c. RPO
d. RIM
Answer: Option d

9. Which instruction is used to set the interrupt by maintaining the serial output bit in set mode of
operation?
a. SIM
b. STC
c. SBI Data
d. SUI Data
Answer: Option a

10. Which interrupt has the highest priority?


a. INTR
b. TRAP
c. RST6.5
d. none of these
Answer: Option b

11. What are level Triggering interrupts?


a. INTR & TRAP
b. RST6.5 & RST5.5
c. RST7.5 & RST6.5
d. none of these
Answer: Option b

12. In 8085, example for Non-maskable interrupts are


a. Trap
b. RST6.5
c. INTR
d. none of these
Answer: Option a
13. In memory-mapped scheme, the devices are viewed as
a. distinct I/O devices
b. memory locations
c. only input devices
d. only output devices
Answer: Option b

14. The input and output operations are respectively similar to the operations,
a. read, read
b. write, write
c. read, write
d. write, read
Answer: Option c

15. The number of hardware interrupts in an 8085 microprocessor are


a. 1
b. 4
c. 5
d. 13
Answer: Option c

16. An 8085 microprocessor based system uses a 4kx8 bit RAM whose starting address is AA00H.
The address of last byte in this RAM is
a. 0FFF H
b. 1000 H
c. B9FF H
d. BA00 H
Answer: Option c

17. Vector location Address for RST O Instruction is inflex


a. 0000H
b. 0008H
c. 0010H
d. 0018H
Answer: Option a

18. The maximum number of I\o devices can be interfaced with 8085 in the I/O mapped I/O technique
are
a. 128
b. 256
c. 64
d. 1024
Answer: Option b

19. The maximum number of I\o devices which can be interfaced in the memory mapped I\o
technique are
a. 256
b. 128
c. 65536
d. 32768
Answer: Option c

20. Number of Address lines required to interface 1KB of memory are


a. 10
b. 11
c. 12
d. 13
Answer: Option a

Unit 4: Interfacing Devices & Applications


1. How many pins does the 8255 PPI IC contains?
a. 24
b. 20
c. 32
d. 40
Answer: Option d

2. In which mode do all the Ports of the 8255 PPI work as Input-Output units for data transfer?
a. BSR mode
b. Mode 0 of I/O mode
c. Mode 1 of I/O mode
d. Mode 2 of I/O mode
Answer: Option b

3. Which of the following pins are responsible for handling the on the Read Write control logic unit of
the 8255 PPI?
a. CS'
b. RD'
c. WR'
d. all of the above
Answer: Option d

4. In which of the following modes is the 8255 PPI capable of transferring data while handshaking
with the interfaced device?
a. BSR mode
b. Mode 0 of I/O mode
c. Mode 1 of I/O mode
d. Mode 2 of I/O mode
Answer: Option c

5. How many bits of data can be transferred between the 8255 PPI and the interfaced device at a time?
a. 16 bits
b. 12 bits
c. 8 bits
d. None of the above
Answer: Option c

6. Which port of the 8255 PPI is capable of performing the handshaking function with the interfaced
devices?
a. Port A
b. Port B
c. Port C
d. All of the above
Answer: Option c

7. In which of the following modes of the 8255 PPI, only port C is taken into consideration?
a. BSR mode
b. Mode 0 of I/O mode
c. Mode 1 of I/O mode
d. Mode 2 of I/O mode
Answer: Option a

8. In mode 2 of I/O mode, which of the following ports are capable of transferring the data in both the
directions?
a. Port A
b. Port B
c. Port C
d. All of the above
Answer: Option a

9. In which of the following modes we do not consider the D6, D5 and D4 bits of the control word?
a. BSR mode
b. Mode 0 of I/O mode
c. Mode 1 of I/O mode
d. Mode 2 of I/O mode
Answer: Option a

10. How many data lines in total are there in the 8255 PPI IC?
a. 8 data lines
b. 32 data lines
c. 24 data lines
d. None of the above
Answer: Option c

11. The device that enables the microprocessor to read data from the external devices is
a. printer
b. Joystick
c. Display
d. Reader
Answer: Option b

12. The example of output device is


a. CRT display
b. 7-segment display
c. Printer
d. All of the mentioned
Answer: Option d

13. The input and output operations are respectively similar to the operations,
a. read, read
b. write, write
c. read, write
d. write, read
Answer: Option c

14. The operation, IOWR (active low) performs


a. write operation on input data
b. write operation on output data
c. read operation on input data
d. read operation on output data
Answer: Option b

15. The latch or IC 74LS373 acts as


a. good input port
b. bad input port
c. good output port
d. bad output port
Answer: Option c

16. 8 input DAC has ________


a. 8 discrete voltage levels
b. 64 discrete voltage levels
c. 124 discrete voltage levels
d. 256 discrete voltage levels
Answer: Option d

17. Which of the following statements are true about DAC0808?


a. ADC0804 has 8 bits and MAX1112 has 1 bit for data output
b. ADC0804 is used for adc and dac conversions whereas MAX1112 is used for serial data
transmissions
c. ADC0804 has 32 bits and MAX1112 has 3 bit for data output
d. None of the mentioned
Answer: Option a

18. While programming the ADC0804 IC what steps are followed?


a. select the analog channel, start the conversion, monitor the conversion, display the digital results
b. select the analog channel, activate the ALE signal (L to H pulse), start the conversion, monitor the
conversion, read the digital results
c. select the analog channel, activate the ALE signal (H to L pulse), start the conversion, monitor the
conversion, read the digital results
d. select the channel, start the conversion, end the conversion
Answer: Option b

19. A stepper motor having a resolution of 300 steps/rev and running at 2400 rpm has a pulse rate of-
pps.
a. 4000
b. 8000
c. 6000
d. 10,000
Answer: Option c

20. A stepping motor is a ____________ device.


a. Mechanical
b. Electrical
c. Analogue
d. Incremental
Answer: Option d

Unit 5: Microcontroller

1. 8051 series has how many 16 bit registers?


a. 2
b. 3
c. 1
d. 0
Answer: Option a
2. When 8051 wakes up then 0x00 is loaded to which register?
a. DPTR
b. SP
c. PC
d. PSW
Answer: Option c

3. When the microcontroller executes some arithmetic operations, then the flag bits of which register
are affected?
a. PSW
b. SP
c. DPTR
d. PC
Answer: Option a

4. How are the bits of the register PSW affected if we select Bank2 of 8051?
a. PSW.5=0 and PSW.4=1
b. PSW.2=0 and PSW.3=1
c. PSW.3=1 and PSW.4=1
d. PSW.3=0 and PSW.4=1
Answer: Option d

5. If we push data onto the stack then the stack pointer


a. increases with every push
b. decreases with every push
c. increases & decreases with every push
d. none of the mentioned
Answer: Option a

6. On power up, the 8051 uses which RAM locations for register R0- R7
a. 00-2F
b. 00-07
c. 00-7F
d. 00-0F
Answer: Option b

7. How many bytes of bit addressable memory is present in 8051 based microcontrollers?
a. 8 bytes
b. 32 bytes
c. 16 bytes
d. 128 bytes
Answer: Option c

8. Number of I/O ports in the 8051 microcontroller?


a. 3 ports
b. 4 ports
c. 5 ports
d. 4 ports with last port having 5 pins
Answer: Option b

9. SCON in serial port is used for which operation?


a. Transferring data
b. Receiving data
c. Controlling
d. Controlling and transferring
Answer: Option c

10. Program counter stores what?


a. Address of before instruction
b. Address of the next instruction
c. Data of the before execution to be executed
d. Data of the execution instruction
Answer: Option b

11. Auxiliary carry is set during which condition?


a. When carry is generated from D3 to D4
b. When carry is generated from D7
c. When carry is generated from both D3 to D4 and D7
d. When carry is generated at either D3 to D4 or D7
Answer: Option a

12. Which pin provides a reset option in 8051?


a. Pin 1
b. Pin 8
c. Pin 11
d. Pin 9
Answer: Option d

13. External Access is used to permit ____________


a. Peripherals
b. Power supply
c. ALE
d. Memory interfacing
Answer: Option d

14. What is the address range of SFRs?


a. 80H to FEH
b. 00Hto FFH
c. 80H to FFH
d. 70H to 80H
Answer: Option c

15. How many interrupts are there in micro controller?


a. 3
b. 6
c. 4
d. 5
Answer: Option d

16. Timer 0 is a ________ bit register.


a. 32-bit
b. 8-bit
c. 16-bit
d. 10-bit
Answer: Option c
17. What is the function of the TMOD register?
a. TMOD register is used to set different timer’s or counter’s to their appropriate modes
b. TMOD register is used to load the count of the timer
c. Is the destination or the final register where the result is obtained after the operation of the timer
d. Is used to interrupt the timer
Answer: Option a

18. Auto reload mode is allowed in which mode of the timer?


a. Mode 0
b. Mode 1
c. Mode 2
d. Mode 3
Answer: Option c

19. What steps are followed when we need to turn on any timer?
a. load the count, start the timer, keep monitoring it, stop the timer
b. load the TMOD register, load the count, start the timer, keep monitoring it, stop the timer
c. load the TMOD register, start the timer, load the count, keep monitoring it, stop the timer
d. none of the mentioned
Answer: Option b

20. TF1, TR1, TF0, TR0 bits are of which register?


a. TMOD
b. SCON
c. TCON
d. SMOD
Answer: Option c

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