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Dell Inspirion 15 5551 Compal LA-B912P r1.0

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A B C D E

MODEL NAME : AAL11/AAL21


PCB NO : LA-B912
Vinafix.com
1 1

Compal Confidential
2 Schematic Document 2

Intel Bay Trail M


UMA

2015-01-20 Rev: 1.0


3 3

ZZZ PCB@

PCB 1AS LA-B912P REV0 M/B 1


DA6001AI000

USOC1 SOCR1@

4 4
S IC FH8065301919700 SR1YW C0 2.16G BGA
Part Number = SA00007ZH0L

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/10/24 Deciphered Date 2015/10/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-B912P
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, January 21, 2015 Sheet 1 of 42
A B C D E
5 4 3 2 1

204pin DDR3L-SO-DIMM X1
port 1 port 0 P.18
Memory BUS
XDP-SFF-26Pin Dual Channel
Vinafix.com Debug
D
eDP Conn. HDMI Conn. 1.35V DDR3L 1066/1333
D

P.20 P.21 P.16


Conn.
DDI x2

USB2.0 x4 port 0 port 1 port 2 port 3

PCIE x1 Bay Trail-M USB 2.0 HD Camera USB HUB


USB 3.0
Conn P.25 Conn Conn. FE1.1s(STT)
port 1 P.25 P.20 P.26
C
NGFF SOC Debug Port
C

WLAN/BT4.0 USB3.0
P.28
FCBGA 1170 Pin
SATA II x2 HD Audio
Card Reader Touch BT 4.0 USB2.0
port 1 port 0 RTS5170 Conn.
page 08~17 Port4 P.24 Port1 P.20 Port2 P.28 Port3 P.25

SATA ODD SATA HDD SM BUS LPC BUS


Conn. Conn.
P.27 P.27
SPI HDA Codec
ALC3234
B P.23 B
EC
SPI ROM
ENE KB9022
1.8V (8MB) Speaker Int. MIC
P.32 P.11
P.23 P.23

RTC CKT.
P.10 Touch Pad Int.KBD Combo Jack
P.29 P.29 P.25

DC/DC Interface CKT.


P.30
A A

Power Circuit DC/DC LED/Power On/Off Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/10/24 Deciphered Date 2015/10/31 Title
P.27 Block diagram
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Document Number Rev
0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-B912P
Date: Wednesday, January 21, 2015 Sheet 2 of 42
5 4 3 2 1
A B C D E

Compal Confidential
Project Code : AAL11
File Name : LA-B912P Vinafix.com
1 1

USB2.0 x2
DB

USB conn USB conn


2
MB 2

HP signal

HP

3 3

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/10/24 Deciphered Date 2015/10/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DB block diagram
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B912P
Date: Wednesday, January 21, 2015 Sheet 3 of 42
A B C D E
A B C D E

Voltage Rails Board ID / SKU ID Table for AD channel


Power Plane Description S0 S3 S4/S5
VIN 19V Adapter power supply ON ON ON
BATT+ 12V Battery power supply ON ON ON

1
B+ Vinafix.com
AC or battery power rail for power circuit. (19V/12V) ON ON ON
1

+RTCVCC RTC Battery Power ON ON ON


+1.0VALW +1.0v Always power rail ON ON ON

+1.8VALW +1.8v Always power rail ON ON ON


+3VALW +3.3v Always power rail ON ON ON
+5VALW +5.0v Always power rail ON ON ON
+1.35V +1.35V power rail for DDR3L ON ON OFF
+SOC_VCC Core voltage for SOC ON OFF OFF
+SOC_VNN GFX voltage for SOC ON OFF OFF
BOM Option Table
+0.675VS +0.675V power rail for DDR3L Terminator ON OFF OFF
+1.0VS +1.0v system power rail ON OFF OFF BOARD ID Table Item BOM Structure
2
+1.05VS +1.05v system power rail ON OFF OFF Unpop @ 2

Board ID PCB Revision Connector CONN@


+1.35VS +1.35v system power rail ON OFF OFF
+1.5VS +1.5v system power rail ON OFF OFF
0 0.1 XDP (Debug Port) XDP@
+1.8VS +1.8v system power rail ON OFF OFF
1 0.2 EMC requirement EMI@
+3VS +3.3v system power rail ON OFF OFF
2 0.3 EMC requirement unpop NEMC@
3 1.0
+5VS +5.0v system power rail ON OFF OFF
KBC 9022 9022@
For ODD function ODD@
ESD requirement ESD@
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF. ESD requirement unpop NESD@
For JUMP JP@
For PCB PCB@
3
For CPU SOCR1@ 3

For test pad TEST@


EMC requirement EMC@

43 level BOM table


43 Level Description BOM Structure
4319W931L01 MB AB912 BTM UMA HDMI 46@/9022@/EMI@/ESD@/ODD@/PCB@/SOCR1@/XDP@/EMC@
4319W931L21 MB AB912 BTM UMA HDMI 46@/9022@/EMI@/ESD@/ODD@/PCB@/SOCR1@/XDP@/EMC@

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


2014/10/24 2015/10/31 Title
Issued Date Deciphered Date Notes List
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Document Number Rev
B 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-B912P
Date: Wednesday, January 21, 2015 Sheet 4 of 42
A B C D E
5 4 3 2 1

2.2K 2.2K

2.2K
+1.8VS 2.2K
+3VS

N-MOS 202
BG12 PCU_SMB_CLK EC_SMB_CK2 DIMMA SMBUS Address [00]
BH10 Vinafix.com
PCU_SMB_DATA
N-MOS EC_SMB_DA2 200

D D
2.2K 10K

2.2K
+1.8VS 10K
+3VS_TP

N-MOS
CPU BG25 I2C2_SDA_TP I2C2_SDA_TP_R TP I2C Address [?]
N-MOS
BJ25 I2C2_SCL_TP I2C2_SCL_TP_R
BT-M

2.2K @ 10K @

2.2K @
+1.8VS 10K @
+5VS_TOUCH

N-MOS
BH28 I2C5_SDA_PNL I2C5_SDA_PNL_R
N-MOS
BG28 I2C5_SCL_PNL I2C5_SCL_PNL_R

Reserve
Reserve
C C

2.2K @

+3VS
2.2K @

0 ohm Thermal
79 EC_SMB_CK2_EC THERMAL_SMB_CK2 10 U2407 SMBUS Address [?]
Sensor
80 EC_SMB_DA2_EC
0 ohm THERMAL_SMB_DA2 9

2.2K

+3VALW_EC
2.2K

77 EC_SMB_CK1
0 ohm 10 PU700 POWER SMBUS Address [?]
0 ohm Charger
78 EC_SMB_DA1 11

100 ohm 7
CLK_SMB PBATT1 BATT SMBUS Address [?]
100 ohm CONN
DAT_SMB 6
B B

4.7K
KBC +3VS
4.7K
KB9022
87 TP_CLK 10 TP
Charger
88 TP_DATA 11

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/10/24 Deciphered Date 2015/10/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SMBus block diagram
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-B912P
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, January 21, 2015 Sheet 5 of 42
5 4 3 2 1
5 4 3 2 1

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D
S5->S0 S0->S3 S3->S0 S0->S5 D

ACIN
ACIN 2.267ms

+3VLP
+3VLP 800ns

EC_ON
EC_ON 697.9us

+3VALW
+3VALW 19.2us

+5VALW
+5VALW 13.58ms

SPOK
SPOK 7.875ms

+1.0VALW
+1.0VALW 1.53ms

+1.8VALW
+1.8VALW

ON/OFF
ON/OFF 102.6ms

101ms EC_RSMRST#
EC_RSMRST#
PBTN_OUT#
C
PBTN_OUT# C
126ms
EC_SLP_S4#
EC_SLP_S5# 45us
7.76us
EC_SLP_S3#
EC_SLP_S3#
201.7ms 32.08ms 25.96ms
SYSON
SYSON 662.7us
4ms
+1.35V
+1.35V 4.035ms
4.39ms
28.65ms DDR_PWROK
DDR_PWROK 8.504ms
152ms
VR_ON
VR_ON 2.407ms 36.81ms
11.29ms 2.425ms 4.994ms
+SOC_VCC
+SOC_VCC 34.24ms

+SOC_VNN
+SOC_VNN 224.4ms 26.33ms
223.9us 4.506ms
VGATE
VGATE
263ms 12.36ms 3.31ms 10.6ms 20.98ms
38.74us SUSP#
SUSP# 31.53us
6.201ms 1.613ms
42.34us +1.0VS
+1.0VS 634.2us
8.626ms 1.994ms
1.774ms +1.05VS
+1.05VS 1.74ms
15.82ms 8.106ms
B 1.379ms +1.35VS B
+1.35VS 1.355ms
22.2ms 12.49ms
2.838ms +1.5VS
+1.5VS 2.712ms
14.99ms 12.2ms
+1.8VS
+1.8VS 3.447ms
23.98ms 3.459ms 15.62ms
+3VS
+3VS 4.175ms
28.91ms 4.324ms 21.51ms
+5VS
+5VS
9.797ms
+0.675VS
+0.675VS
51.46ms 22.2ms 51.95ms 12.96ms
KBRST#
KBRST#
61.19ms 5.647ms 60.81ms
PMC_CORE_PWROK
PMC_CORE_PWROK
7.321ms
DDR_CORE_PWROK
DDR_CORE_PWROK
584ms -290.3us
67.73ms PMC_PLTRST#
PMC_PLTRST#

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


2014/10/24 2015/10/31 Title
Issued Date Deciphered Date Power Sequence
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-B912P
Date: Wednesday, January 21, 2015 Sheet 6 of 42
5 4 3 2 1
5 4 3 2 1

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D
S5->S0 S0->S3 S3->S0 S0->S5 D

ACIN
ACIN
+3VLP
+3VLP
EC_ON
EC_ON 531us
10.1ms
+3VALW
+3VALW 3.333us
-3.87ms
+5VALW
+5VALW 13.24ms
-6.494ms
SPOK
SPOK -6.69ms
6.744ms
+1.0VALW
+1.0VALW 1.457ms
-3.617ms
+1.8VALW
+1.8VALW

ON/OFF
ON/OFF 112.3ms

101ms EC_RSMRST#
EC_RSMRST#
5.814us
PBTN_OUT#
C
PBTN_OUT# C
23ms
EC_SLP_S4#
EC_SLP_S5# 43.7us
7.76us
EC_SLP_S3#
EC_SLP_S3#
201.7ms 32.08ms 25.96ms
SYSON
SYSON 662.7us
4ms
+1.35V
+1.35V 4.035ms
4.39ms
28.65ms DDR_PWROK
DDR_PWROK 8.504ms
152ms
VR_ON
VR_ON 2.407ms 36.81ms
11.29ms 2.425ms 4.994ms
+SOC_VCC
+SOC_VCC 34.24ms

+SOC_VNN
+SOC_VNN 224.4ms 26.33ms
223.9us 4.506ms
VGATE
VGATE
263ms 12.36ms 3.31ms 10.6ms 20.98ms
38.74us SUSP#
SUSP# 31.53us
6.201ms 1.613ms
42.34us +1.0VS
+1.0VS 634.2us
8.626ms 1.994ms
1.774ms +1.05VS
+1.05VS 1.74ms
15.82ms 8.106ms
B 1.379ms +1.35VS B
+1.35VS 1.355ms
22.2ms 12.49ms
2.838ms +1.5VS
+1.5VS 2.712ms
14.99ms 12.2ms
+1.8VS
+1.8VS 3.447ms
23.98ms 3.459ms 15.62ms
+3VS
+3VS 4.175ms
28.91ms 4.324ms 21.51ms
+5VS
+5VS
9.797ms
+0.675VS
+0.675VS
51.46ms 22.2ms 51.95ms 12.96ms
KBRST#
KBRST#
61.19ms 5.647ms 60.81ms
PMC_CORE_PWROK
PMC_CORE_PWROK
7.321ms
DDR_CORE_PWROK
DDR_CORE_PWROK
584ms -290.3us
67.73ms PMC_PLTRST#
PMC_PLTRST#

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


2014/10/24 2015/10/31 Title
Issued Date Deciphered Date Power Sequence
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-B912P
Date: Wednesday, January 21, 2015 Sheet 7 of 42
5 4 3 2 1
5 4 3 2 1

Main Func = CPU

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D D

USOC1A USOC1B
18 DDR_A_MA[0..15] DDR_A_D[0..63] 18
DDR_A_MA0 K45 M36 DDR_A_D0 AY45 BG38
DDR_A_MA1 H47 DRAM0_MA_0 DRAM0_DQ_0 J36 DDR_A_D1 BB47 DRAM1_MA_0 DRAM1_DQ_0 BC40
DDR_A_MA2 L41 DRAM0_MA_1 DRAM0_DQ_1 P40 DDR_A_D2 AW41 DRAM1_MA_1 DRAM1_DQ_1 BA42
DDR_A_MA3 H44 DRAM0_MA_2 DRAM0_DQ_2 M40 DDR_A_D3 BB44 DRAM1_MA_2 DRAM1_DQ_2 BD42
DDR_A_MA4 H50 DRAM0_MA_3 DRAM0_DQ_3 P36 DDR_A_D4 BB50 DRAM1_MA_3 DRAM1_DQ_3 BC38
DDR_A_MA5 G53 DRAM0_MA_4 DRAM0_DQ_4 N36 DDR_A_D5 BC53 DRAM1_MA_4 DRAM1_DQ_4 BD36
DDR_A_MA6 H49 DRAM0_MA_5 DRAM0_DQ_5 K40 DDR_A_D6 BB49 DRAM1_MA_5 DRAM1_DQ_5 BF42
DDR_A_MA7 D50 DRAM0_MA_6 DRAM0_DQ_6 K42 DDR_A_D7 BF50 DRAM1_MA_6 DRAM1_DQ_6 BC44
DDR_A_MA8 G52 DRAM0_MA_7 DRAM0_DQ_7 B32 DDR_A_D8 BC52 DRAM1_MA_7 DRAM1_DQ_7 BH32
DDR_A_MA9 E52 DRAM0_MA_8 DRAM0_DQ_8 C32 DDR_A_D9 BE52 DRAM1_MA_8 DRAM1_DQ_8 BG32
DDR_A_MA10 K48 DRAM0_MA_9 DRAM0_DQ_9 C36 DDR_A_D10 AY48 DRAM1_MA_9 DRAM1_DQ_9 BG36
DDR_A_MA11 E51 DRAM0_MA_10 DRAM0_DQ_10 A37 DDR_A_D11 BE51 DRAM1_MA_10 DRAM1_DQ_10 BJ37
DDR_A_MA12 F47 DRAM0_MA_11 DRAM0_DQ_11 C33 DDR_A_D12 BD47 DRAM1_MA_11 DRAM1_DQ_11 BG33
DDR_A_MA13 J51 DRAM0_MA_12 DRAM0_DQ_12 A33 DDR_A_D13 BA51 DRAM1_MA_12 DRAM1_DQ_12 BJ33
DDR_A_MA14 B49 DRAM0_MA_13 DRAM0_DQ_13 C37 DDR_A_D14 BH49 DRAM1_MA_13 DRAM1_DQ_13 BG37
DDR_A_MA15 B50 DRAM0_MA_14 DRAM0_DQ_14 B38 DDR_A_D15 BH50 DRAM1_MA_14 DRAM1_DQ_14 BH38
DRAM0_MA_15 DRAM0_DQ_15 F36 DDR_A_D16 DRAM1_MA_15 DRAM1_DQ_15 AU36
18 DDR_A_DM[0..7] G36 DRAM0_DQ_16 G38 BD38 DRAM1_DQ_16 AT36
DDR_A_DM0 DDR_A_D17
DDR_A_DM1 B36 DRAM0_DM_0 DRAM0_DQ_17 F42 DDR_A_D18 BH36 DRAM1_DM_0 DRAM1_DQ_17 AV40
DDR_A_DM2 F38 DRAM0_DM_1 DRAM0_DQ_18 J42 DDR_A_D19 BC36 DRAM1_DM_1 DRAM1_DQ_18 AT40
DDR_A_DM3 B42 DRAM0_DM_2 DRAM0_DQ_19 G40 DDR_A_D20 BH42 DRAM1_DM_2 DRAM1_DQ_19 BA36
DDR_A_DM4 P51 DRAM0_DM_3 DRAM0_DQ_20 C38 DDR_A_D21 AT51 DRAM1_DM_3 DRAM1_DQ_20 AV36
DDR_A_DM5 V42 DRAM0_DM_4 DRAM0_DQ_21 G44 DDR_A_D22 AM42 DRAM1_DM_4 DRAM1_DQ_21 AY42
DDR_A_DM6 Y50 DRAM0_DM_5 DRAM0_DQ_22 D42 DDR_A_D23 AK50 DRAM1_DM_5 DRAM1_DQ_22 AY40
DDR_A_DM7 Y52 DRAM0_DM_6 DRAM0_DQ_23 A41 DDR_A_D24 AK52 DRAM1_DM_6 DRAM1_DQ_23 BJ41
DRAM0_DM_7 DRAM0_DQ_24 C41 DDR_A_D25 DRAM1_DM_7 DRAM1_DQ_24 BG41
M45 DRAM0_DQ_25 A45 DDR_A_D26 AV45 DRAM1_DQ_25 BJ45
18 DDR_A_RAS# M44 DRAM0_RAS# DRAM0_DQ_26 B46 AV44 DRAM1_RAS# DRAM1_DQ_26 BH46
DDR_A_D27
18 DDR_A_CAS# DRAM0_CAS# DRAM0_DQ_27 DRAM1_CAS# DRAM1_DQ_27
H51 C40 DDR_A_D28 BB51 BG40
18 DDR_A_WE# DRAM0_WE# DRAM0_DQ_28 B40 DRAM1_WE# DRAM1_DQ_28 BH40
DDR_A_D29
K47 DRAM0_DQ_29 B48 DDR_A_D30 AY47 DRAM1_DQ_29 BH48
18 DDR_A_BS0 DRAM0_BS_0 DRAM0_DQ_30 DRAM1_BS_0 DRAM1_DQ_30
K44 B47 DDR_A_D31 AY44 BH47
18 DDR_A_BS1 D52 DRAM0_BS_1 DRAM0_DQ_31 K52 BF52 DRAM1_BS_1 DRAM1_DQ_31 AY52
DDR_A_D32
18 DDR_A_BS2 DRAM0_BS_2 DRAM0_DQ_32 DRAM1_BS_2 DRAM1_DQ_32
C K51 DDR_A_D33 AY51 C
P44 DRAM0_DQ_33 T52 DDR_A_D34 AT44 DRAM1_DQ_33 AP52
18 DDR_A_CS0# DRAM0_CS_0# DRAM0_DQ_34 DRAM1_CS_0# DRAM1_DQ_34
T51 DDR_A_D35 AP51
P45 DRAM0_DQ_35 L51 DDR_A_D36 AT45 DRAM1_DQ_35 AW51
18 DDR_A_CS2# DRAM0_CS_2# DRAM0_DQ_36 L53 DRAM1_CS_2# DRAM1_DQ_36 AW53
DDR_A_D37
DRAM0_DQ_37 R51 DDR_A_D38 DRAM1_DQ_37 AR51
C47 DRAM0_DQ_38 R53 DDR_A_D39 BG47 DRAM1_DQ_38 AR53
18 DDR_A_CKE0 DRAM0_CKE_0 DRAM0_DQ_39 DRAM1_CKE_0 DRAM1_DQ_39
D48 T47 DDR_A_D40 BE46 AP47
F44 RESERVED_D48 DRAM0_DQ_40 T45 DDR_A_D41 BD44 RESERVED_BE46 DRAM1_DQ_40 AP45
18 DDR_A_CKE2 E46 DRAM0_CKE_2 DRAM0_DQ_41 Y40 BF48 DRAM1_CKE_2 DRAM1_DQ_41 AK40
DDR_A_D42
RESERVED_E46 DRAM0_DQ_42 V41 DDR_A_D43 RESERVED_BF48 DRAM1_DQ_42 AM41
T41 DRAM0_DQ_43 T48 DDR_A_D44 AP41 DRAM1_DQ_43 AP48
18 DDR_A_ODT0 DRAM0_ODT_0 DRAM0_DQ_44 DRAM1_ODT_0 DRAM1_DQ_44
T50 DDR_A_D45 AP50
P42 DRAM0_DQ_45 Y42 DDR_A_D46 AT42 DRAM1_DQ_45 AK42
18 DDR_A_ODT2 DRAM0_ODT_2 DRAM0_DQ_46 AB40 DRAM1_ODT_2 DRAM1_DQ_46 AH40
DDR_A_D47
DRAM0_DQ_47 V45 DDR_A_D48 DRAM1_DQ_47 AM45
M50 DRAM0_DQ_48 V47 DDR_A_D49 AV50 DRAM1_DQ_48 AM47
18 DDR_A_CLK0 DRAM0_CKP_0 DRAM0_DQ_49 DRAM1_CKP_0 DRAM1_DQ_49
M48 AD48 DDR_A_D50 AV48 AF48
18 DDR_A_CLK0# DRAM0_CKN_0 DRAM0_DQ_50 DRAM1_CKN_0 DRAM1_DQ_50
AD50 DDR_A_D51 AF50
DRAM0_DQ_51 V48 DDR_A_D52 DRAM1_DQ_51 AM48
P50 DRAM0_DQ_52 V50 DDR_A_D53 DRAM1_DQ_52 AM50
18 DDR_A_CLK2 P48 DRAM0_CKP_2 DRAM0_DQ_53 AB44 AT50 DRAM1_DQ_53 AH44
DDR_A_D54
18 DDR_A_CLK2# DRAM0_CKN_2 DRAM0_DQ_54 DRAM1_CKP_2 DRAM1_DQ_54
Y45 DDR_A_D55 AT48 AK45
DRAM0_DQ_55 V52 DDR_A_D56 DRAM1_CKN_2 DRAM1_DQ_55 AM52
DRAM0_DQ_56 W51 DDR_A_D57 DRAM1_DQ_56 AL51
P41 DRAM0_DQ_57 AC53 DDR_A_D58 DRAM1_DQ_57 AG53
18 DDR_A_RST#_CPU DRAM0_DRAMRST# DRAM0_DQ_58 AC51 AT41 DRAM1_DQ_58 AG51
DDR_A_D59
DRAM0_DQ_59 W53 DDR_A_D60 DRAM1_DRAMRST# DRAM1_DQ_59 AL53
DRAM0_DQ_60 Y51 DDR_A_D61 DRAM1_DQ_60 AK51
AF44 DRAM0_DQ_61 AD52 DDR_A_D62 DRAM1_DQ_61 AF52
+DDR_SOC_VREF DRAM_VREF 0.675V DRAM0_DQ_62 DRAM1_DQ_62
AD51 DDR_A_D63 AF51
DRAM0_DQ_63 DRAM1_DQ_63
100K_0402_5% 1 2 RC1 DDR_TERMN0 AF42 J38 DDR_A_DQS0 BF40
100K_0402_5% 1 2 RC2 DDR_TERMN1 AH42 ICLK_DRAM_TERMN_AF42 DRAM0_DQSP_0 K38 DDR_A_DQS#0 DRAM1_DQSP_0 BD40
ICLK_DRAM_TERMN_AH42 DRAM0_DQSN_0 C35 DDR_A_DQS1 DRAM1_DQSN_0 BG35
DRAM0_DQSP_1 B34 DDR_A_DQS#1 DRAM1_DQSP_1 BH34
DRAM0_DQSN_1 D40 DDR_A_DQS2 DRAM1_DQSN_1 BA38
AD42 DRAM0_DQSP_2 F40 DDR_A_DQS#2 DRAM1_DQSP_2 AY38
B 36 DDR_PWROK DRAM_VDD_S4_PWROK DRAM0_DQSN_2 DRAM1_DQSN_2 B
AB42 B44 DDR_A_DQS3 BH44
11 DDR_CORE_PWROK DRAM_CORE_PWROK DRAM0_DQSP_3 C43 DRAM1_DQSP_3 BG43
DDR_A_DQS#3
DRAM0_DQSN_3 N53 DDR_A_DQS4 DRAM1_DQSN_3 AU53
23.2_0402_1% 1 2 RC3 DDR_RCOMP0 AD44 DRAM0_DQSP_4 M52 DDR_A_DQS#4 DRAM1_DQSP_4 AV52
29.4_0402_1% 1 2 RC4 DDR_RCOMP1 AF45 DRAM_RCOMP_0 DRAM0_DQSN_4 T42 DDR_A_DQS5 DRAM1_DQSN_4 AP42
162_0402_1% 1 2 RC5 DDR_RCOMP2 AD45 DRAM_RCOMP_1 DRAM0_DQSP_5 T44 DDR_A_DQS#5 DRAM1_DQSP_5 AP44
DRAM_RCOMP_2 DRAM0_DQSN_5 Y47 DDR_A_DQS6 DRAM1_DQSN_5 AK47
DRAM0_DQSP_6 Y48 DRAM1_DQSP_6 AK48
Follow CRB v1.15 DDR_A_DQS#6
AF40 DRAM0_DQSN_6 AB52 DDR_A_DQS7 DRAM1_DQSN_6 AH52
AF41 RESERVED_AF40 DRAM0_DQSP_7 AA51 DDR_A_DQS#7 DRAM1_DQSP_7 AJ51
AD40 RESERVED_AF41 DRAM0_DQSN_7 DRAM1_DQSN_7
AD41 RESERVED_AD40
RESERVED_AD41 DDR_A_DQS[0..7] 18
1 OF 13 2 OF 13
DDR_A_DQS#[0..7] 18
DDR_CORE_PWROK 1 2 FH8065301546401_FCBGA131170 FH8065301546401_FCBGA131170
CC1 EMC@
.1U_0402_16V7K @ @
0705:for ESD request

Close To SOC Pin

+1.35V +DDR_SOC_VREF

1 2
RC6 1
4.7K_0402_1%
CC2
1 2 .1U_0402_16V7K
RC7 2
4.7K_0402_1%

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


2014/10/24 2015/10/31 Title
Issued Date Deciphered Date VLV-M SOC Memory DDR3L
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-B912P
Date: Wednesday, January 21, 2015 Sheet 8 of 42
5 4 3 2 1
5 4 3 2 1

Main Func = CPU


USOC1C

AV3 AG3
21 HDMI_TX2+ DDI0_TXP_0 DDI1_TXP_0 EDP_CPU_LANE_P0 20
AV2 1.0V 1.0V AG1
21 HDMI_TX2- DDI0_TXN_0 DDI1_TXN_0 EDP_CPU_LANE_N0 20
AT2 AF3
21 HDMI_TX1+ DDI0_TXP_1 DDI1_TXP_1 EDP_CPU_LANE_P1 20
AT3 AF2
21 HDMI_TX1- DDI0_TXN_1 DDI1_TXN_1 EDP_CPU_LANE_N1 20

D
21
21
HDMI_TX0+
HDMI_TX0-
AR3
AR1
AP3
Vinafix.com
DDI0_TXP_2
DDI0_TXN_2
DDI1_TXP_2
DDI1_TXN_2
AD3
AD2
AC3 D
21
21
HDMI_CLK+
HDMI_CLK-
AP2 DDI0_TXP_3
DDI0_TXN_3
DDI1_TXP_3
DDI1_TXN_3
AC1 eDP Panel
HDMI AL3
DDI0_AUXP 1.0V DDI1_AUXP
AK3 EDP_CPU_AUX 20
AL1 1.0V AK2 EDP_CPU_AUX# 20
DDI0_AUXN DDI1_AUXN
D27 1.8V 1.8V K30
21 HDMI_HPD# DDI0_HPD DDI1_HPD EDP_CPU_HPD 20
C26 1.8V 1.8V P30 DDI1_ENABLE RC8 1 2 2.2K_0402_5% +1.8VS
21 HDMI_DDCDATA DDI0_DDCDATA DDI1_DDCDATA
C28 1.8V 1.8V G30
21 HDMI_DDCCLK DDI0_DDCCLK DDI1_DDCCLK
B28 1.8V N30
DDI0_VDDEN DDI1_VDDEN DDI1_ENVDD 17
C27 1.8V J30
DDI0_BKLTEN DDI1_BKLTEN DDI1_ENBKL 17
B26 1.8V M30
DDI0_BKLTCTL DDI1_BKLTCTL DDI1_PWM 17
AH3
1 RC9 2 DDI0_RCOMPP AK12 VSS_AH3 AH2
DDI0_RCOMP_P VSS_AH2
Follow CRB v1.15 0ohm till to GND
402_0402_1% DDI0_RCOMPN AK13
AM14 DDI0_RCOMP_N AH14
AM13 RESERVED_AM14 RESERVED_AH14 AH13
AM3 RESERVED_AM13 RESERVED_AH13 AF14
AM2 VSS_AM3 RESERVED_AF14 AF13
Follow CRB v1.15 0ohm till to GND VSS_AM2 RESERVED_AF13
BA3
C VGA_RED C
AY2
VGA_BLUE BA1
VGA_GREEN AW1
VGA_IREF AY3
VGA_IRTN
3.3V BD2
VGA_HSYNC BF2
3.3V VGA_VSYNC
No Support CRT

3.3V BC1 CRT_DDC_CLK


VGA_DDCCLK BC2 CRT_DDC_DATA
3.3V VGA_DDCDATA
T2 T7
T3 RESERVED_T2 RESERVED_T7 T9
AB3 RESERVED_T3 RESERVED_T9 AB13
AB2 RESERVED_AB3 RESERVED_AB13 AB12
Y3 RESERVED_AB2 RESERVED_AB12 Y12
Y2 RESERVED_Y3 RESERVED_Y12 Y13
W3 RESERVED_Y2 RESERVED_Y13 V10
W1 RESERVED_W3 RESERVED_V10 V9
V2 RESERVED_W1 RESERVED_V9 T12
V3 RESERVED_V2 RESERVED_T12 T10
R3 RESERVED_V3 RESERVED_T10 V14
R1 RESERVED_R3 RESERVED_V14 V13
+1.8VS AD6 RESERVED_R1 RESERVED_V13 T14
B B
AD4 RESERVED_AD6 RESERVED_T14 T13
AB9 RESERVED_AD4 RESERVED_T13 T6
RESERVED_AB9 RESERVED_T6
1

AB7 T4
@ Y4 RESERVED_AB7 RESERVED_T4 P14
RC10 Y6 RESERVED_Y4 RESERVED_P14
10K_0402_5% V4 RESERVED_Y6 F34
V6 RESERVED_V4 GPIO_S0_NC_15 M32
2

GPIO_NC13 A29 RESERVED_V6 GPIO_S0_NC_16 D28


GPIO_NC14 C29 GPIO_S0_NC_13 GPIO_S0_NC_17 J28
T97 GPIO_S0_NC14 GPIO_S0_NC_18
1

AB14 K34
GPIO_NC12 B30 RESERVED_AB14 GPIO_S0_NC_19 D34
T98 GPIO_S0_NC_12 GPIO_S0_NC_20
RC11 C30 F32
10K_0402_5% RESERVED_C30 GPIO_S0_NC_21 F28
GPIO_S0_NC_22 K28
2

GPIO_S0_NC_23 J34
GPIO_S0_NC_24 N32
GPIO_S0_NC_25 D32
Follow CRB v1.15 3 OF 10 GPIO_S0_NC_26

FH8065301546401_FCBGA131170
@
GPIO_S0_NC[13]:
Multiplexed with Hardware Straps Pin:MDSI_DDCDATA
A A

Security Classification Compal Secret Data Compal Electronics, Inc.


2014/10/24 2015/10/31 Title
Issued Date Deciphered Date VLV-M SOC Display
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-B912P
Date: Wednesday, January 21, 2015 Sheet 9 of 42
5 4 3 2 1
5 4 3 2 1

Main Func = CPU


USOC1D

BF6 AY7
27 SATA_PTX_DRX_P0_C BG7 SATA_TXP_0 PCIE_TXP_0 AY6

D
HDD
27
27 SATA_PTX_DRX_N0_C

SATA_PRX_DTX_P0_C
Vinafix.com
AU16
SATA_TXN_0

SATA_RXP_0
PCIE_TXN_0

PCIE_RXP_0
AT14
for other's platform is PCIE LAN
D
AV16 AT13
27 SATA_PRX_DTX_N0_C SATA_RXN_0 PCIE_RXN_0 +1.8VS
BD10 AV6 PCIE_PTX_DRX_P1 CC5 1 2 0.1U_0402_10V7K RP63
27 SATA_PTX_DRX_P1_C SATA_TXP_1 PCIE_TXP_1 PCIE_PTX_C_DRX_P1 28
BF10 AV4 PCIE_PTX_DRX_N1 CC6 1 2 0.1U_0402_10V7K LAN_CLKREQ# 1 8
27 SATA_PTX_DRX_N1_C SATA_TXN_1 PCIE_TXN_1 PCIE_PTX_C_DRX_N1 28 2 7
ODD WLAN WLAN_CLKREQ#
AY16 AT10 PCIE_PRX_DTX_P1 PCIE_CLKREQ_2# 3 6
27 SATA_PRX_DTX_P1_C BA16 SATA_RXP_1 PCIE_RXP_1 AT9 PCIE_PRX_DTX_N1 PCIE_PRX_DTX_P1 28 4 5
SOC_ODD_DA#
27 SATA_PRX_DTX_N1_C SATA_RXN_1 PCIE_RXN_1 PCIE_PRX_DTX_N1 28
BB10 AT7 10K_0804_8P4R_5%
BC10 VSS_BB10 PCIE_TXP_2 AT6
Follow CRB V1.15 0ohm till to GND VSS_BC10 PCIE_TXN_2
SOC_SCI# BA12 AP12
17 SOC_SCI# AY14 SATA_GP0 / GPIO_S0_SC_0 PCIE_RXP_2 AP10
DEVSLP_SOC
SATA_LED#_SOC AY12 SATA_GP1 / SATA_DEVSLP_0 / GPIO_S0_SC_1 PCIE_RXN_2
Follow CRB v1.15 SATA_LED# / GPIO_S0_SC_2 AP6
1 RC12 2 SATA_RCOMPP AU18 PCIE_TXP_3 AP4
AT18 SATA_RCOMP_P PCIE_TXN_3 DX2
402_0402_1% SATA_RCOMPN
SATA_RCOMP_N AP9 SOC_ODD_DA# 2 1 ODD_DA#
PCIE_RXP_3 ODD_DA# 27
AP7
AT22 PCIE_RXN_3 8411 Pin 36 O/D
RC57 2 @ 1 49.9_0402_1% MMC1_RCOMP MMC1_CLK / GPIO_S0_SC_16 BB7 RB751V-40_SOD323-2
AV20 VSS_BB7 BB5
MMC1_D0 / GPIO_S0_SC_17 VSS_BB5
Follow CRB V1.15 0ohm till to GND
RC59 2 @ 1 49.9_0402_1% SD3_RCOMP AU22
AV22 MMC1_D1 / GPIO_S0_SC_18 BG3 LAN_CLKREQ#
C MMC1_D2 / GPIO_S0_SC_19 PCIE_CLKREQ_0# / GPIO_S0_SC_3 C
AT20 BD7 WLAN_CLKREQ#
AY24 MMC1_D3 / GPIO_S0_SC_20 PCIE_CLKREQ_1# / GPIO_S0_SC_4 BG5 PCIE_CLKREQ_2#
WLAN_CLKREQ# 28 0724: Follow Zero ODD application note, the ODD MD/DA
+3VS AU26 MMC1_D4 / GPIO_S0_SC_21 PCIE_CLKREQ_2# / GPIO_S0_SC_5 BE3 SOC_ODD_DA# pin need route to SCI capable GPIO, BTM SCI apble GPIO
AT26 MMC1_D5 / GPIO_S0_SC_22 PCIE_CLKREQ_3# / GPIO_S0_SC_6 BD5
AU20 MMC1_D6 / GPIO_S0_SC_23 SD3_WP / GPIO_S0_SC_7 is GPIO_S0_SC_[0:7)
RP54 MMC1_D7 / GPIO_S0_SC_24 AP14 PCIE_RCOMPP 1 RC13 2 HDA_BITCLK_AUDIO
8 1 ODD_DA# AV26 PCIE_RCOMP_P AP13 PCIE_RCOMPN 402_0402_1%
7 2 BT_ON# BA24 MMC1_CMD / GPIO_S0_SC_25 PCIE_RCOMP_N 1 2
6 3 WL_OFF# MMC1_RST# / SATA_DEVSLP_0 / GPIO_S0_SC_26 BB4 CC7 EMC@
5 4 MMC1_RCOMP AY18 RESERVED_BB4 BB3 22P_0402_50V8J
MMC1_RCOMP RESERVED_BB3 For EMI
+3VS 8.2K_8P4R_5% AV10
BA18 RESERVED_AV10 AV9
RC68 AY20 SD2_CLK / GPIO_S0_SC_27 RESERVED_AV9 RP64
10K_0402_5% BD20 SD2_D0 / GPIO_S0_SC_28 BF20 HDA_RCOMP 49.9_0402_1% 1 2 RC14 HDA_SYNC 8 1
SD2_D1 / GPIO_S0_SC_29 HDA_LPE_RCOMP HDA_SYNC_AUDIO 23
1 2 ODD_DETECT# BA20 BG22 HDA_RST# HDA_SDOUT 7 2
SD2_D2 / GPIO_S0_SC_30 HDA_RST# / LPE_I2S0_CLK / GPIO_S0_SC_8 HDA_SDOUT_AUDIO 23
@ BD18 BH20 HDA_SYNC HDA_BIT_CLK 6 3 HDA_BITCLK_AUDIO 23
BC18 SD2_D3_CD# / GPIO_S0_SC_31 HDA_SYNC / LPE_I2S0_FRM / GPIO_S0_SC_9 BJ21 HDA_BIT_CLK HDA_RST# 5 4
SD2_CMD / GPIO_S0_SC_32 HDA_CLK / LPE_I2S0_DATAOUT / GPIO_S0_SC_10 HDA_RST_AUDIO# 23
BG20 HDA_SDOUT
HDA_SDO / LPE_I2S0_DATAIN / GPIO_S0_SC_11 BG19
3.3V HDA_SDI0 / LPE_I2S1_CLK / GPIO_S0_SC_12
HDA_SDIN0
HDA_SDIN0 23
33_0804_8P4R_5%
BG21 EMC@
HDA_SDI1 / LPE_I2S1_FRM / GPIO_S0_SC_13 T100
AY26 BH18
T103 AT28 SD3_CLK / GPIO_S0_SC_33 HDA_DOCKRST# / LPE_I2S1_DATAOUT / GPIO_S0_SC_14 BG18 T101
BT_ON#
28 BT_ON# BD26 SD3_D0 / GPIO_S0_SC_34 HDA_DOCKEN# / LPE_I2S1_DATAIN / GPIO_S0_SC_15 T102
B 27 ODD_EN#
ODD_EN# GPIO_S0_SC_63: GPIO_S0_SC_65: B
ODD_DETECT# AU28 SD3_D1 / GPIO_S0_SC_35 BF28
27 ODD_DETECT# SD3_D2 / GPIO_S0_SC_36 LPE_I2S2_CLK / SATA_DEVSLP_1 / GPIO_S0_SC_62 BIOS/EFI Boot Strap (BBS) Security Flash Descriptors
WL_OFF# BA26 BA30 GPIO_S0_SC_63 BIOS Boot Selection 0 = Override
28,32 WL_OFF# SD3_D3 / GPIO_S0_SC_37 LPE_I2S2_FRM / GPIO_S0_SC_63
BC24 BD28
AV28 SD3_CD# / GPIO_S0_SC_38 LPE_I2S2_DATAIN / GPIO_S0_SC_64 BC30 GPIO_S0_SC_65
0 = LPC 1 = Normal Operation
+1.8VS +3VS BF22 SD3_CMD / GPIO_S0_SC_39 LPE_I2S2_DATAOUT / GPIO_S0_SC_65 1 = SPI (Internal PU)
SD3_1P8EN / GPIO_S0_SC_40
0718: follow CRB to change to 73.2ohm
BD22 P34 +1.8VS +1.8VS
SD3_PWREN# / GPIO_S0_SC_41 RESERVED_P34 N34 RC15
RESERVED_N34
1

SD3_RCOMP BF26 73.2_0402_1%


SD3_RCOMP

1
AK9 1 2
RESERVED_AK9 +1.0VS
RC53 AK7
RESERVED_AK7
5

UC10 4.7K_0402_5% RC16 RC17


1.8V 1 C24 10K_0402_5% 10K_0402_5%
P

H_PROCHOT# 32,34
2

NC 4 4 OF 10 PROCHOT# Internal PD 2K EC programing :


DEVSLP0 27

2
DEVSLP_SOC 2 Y GPIO_S0_SC_63 GPIO_S0_SC_65
A 2 "High"for Flash BIOS
G

FH8065301546401_FCBGA131170 NEMC@

1
NL17SZ07DFT2G_SC70-5 CC8 D
3

SA00004BV00 10P_0402_50V8J 2
@ 1 TXE_DBG 32
G
0721: Pop UC10 and RC53 S QC1

3
MESS138W-G_SOT323-3
DEVSLP_SOC Buffer
+1.8VS

A RC18 A
10K_0402_5%
1 2
Pull High 10k at LED Page Security Classification Compal Secret Data Compal Electronics, Inc.
2
G

2014/10/24 2015/10/31 Title


Issued Date Deciphered Date VLV-M SOC SATA/PCI-E/HDA
1 3 SATA_LED#_SOC
28,32 SOC_SATALED# THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Document Number Rev
D

QC2 B 0.3
MESS138W-G_SOT323-3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-B912P
Date: Wednesday, January 21, 2015 Sheet 10 of 42
5 4 3 2 1
5 4 3 2 1

Main Func = CPU


+1.8VALW

1
XTAL_25M_IN
RC21

1
2.2K_0402_5%
RC19

2
YC1 1M_0402_5% DC1
25MHZ_10PF_7V25000014
Vinafix.com PMC_ACIN 2 1
ACIN 32,34,40

2
1 3 XTAL_25M_OUT DB2J31400L_SOD323-2
1 3
1 GND GND 1
D D
CC9 CC10
10P_0402_25V8K 2 4 10P_0402_25V8K
2 2 USOC1E
+1.8VALW
XTAL_25M_IN AH12 AU34
XTAL_25M_OUT AH10 ICLK_OSCIN SIO_UART1_RXD / GPIO_S0_SC_70 AV34
ICLK_OSCOUT SIO_UART1_TXD / GPIO_S0_SC_71 BA34 +3VS
AD9 SIO_UART1_RTS# / GPIO_S0_SC_72 AY34
RESERVED_AD9 SIO_UART1_CTS# / GPIO_S0_SC_73

1
RC23 1 2 4.02K_0402_1% ICLK_ICOMP AD14 BF34
RC22 1 2 47.5_0402_1% ICLK_RCOMP AD13 ICLK_ICOMP SIO_UART2_RXD / GPIO_S0_SC_74 BD34
ICLK_RCOMP SIO_UART2_TXD / GPIO_S0_SC_75 BD32 RC20
SIO_UART2_RTS# / GPIO_S0_SC_76

5
AD10 BF32 UC5 4.7K_0402_5%
AD12 RESERVED_AD10 SIO_UART2_CTS# / GPIO_S0_SC_77 1
1.8V 3.3V

2
RESERVED_AD12 NC 4
Y PLT_RST# 28,32
AF6 PMC_PLTRST# 2
PCIE_CLKN_0 A

G
AF4 D26
PCIE_CLKP_0 PMC_SUSPWRDNACK / GPIO_S5_11 G24 PMC_SUSCLK
PMC_SUSCLK 28
32.768k output NL17SZ07DFT2G_SC70-5

3
AF9 PMC_SUSCLK_0 / GPIO_S5_12 F18 SA00004BV00
28 CLK_PCIE_WLAN# PCIE_CLKN_1 PMC_SLP_S0IX# / GPIO_S5_13
WLAN AF7 F22 PMC_SLP_S4#
28 CLK_PCIE_WLAN PCIE_CLKP_1 PMC_SLP_S4# PMC_SLP_S4# 17
D22 PMC_SLP_S3#
PMC_SLP_S3# J20 PMC_SLP_S3# 17
GPIO_S5_14
AK4
PCIE_CLKN_2
GPIO_S5_14
PMC_ACPRESENT
D20 PMC_ACIN PLT_RST Buffer
AK6 F26 PMC_PCIE_WAKE#
PCIE_CLKP_2 PMC_WAKE_PCIE_0# / GPIO_S5_15 K26 PMC_BATLOW#
AM4 PMC_BATLOW# J26 PMC_PWRBTN#
+1.8VALW AM6 PCIE_CLKN_3 PMC_PWRBTN# / GPIO_S5_16 BG9 1 2 PMC_PWRBTN# 17
Close To SOC <1000mil PMC_RSTBTN#
PCIE_CLKP_3 PMC_RSTBTN# XDP_RSTBTN# 16
F20 PMC_PLTRST# RC24 XDP@ 0_0402_5%
PMC_PLTRST# PMC_PLTRST# 16 +1.8VALW
RC65 1 2 51_0402_5% XDP_H_PRDY# AM9 J24 GPIO_S5_17 T104
AM10 RESERVED_AM9 GPIO_S5_17 G18 SOC_SUS_STAT# RP65
RESERVED_AM10 PMC_SUS_STAT# / GPIO_S5_18 T8 PMC_PCIE_WAKE# 1 8
PMC_BATLOW# 2 7
RP66 GPIO_S5_14 3 6
4 5 XDP_H_TRST# C11 RTC_TEST# 4 5
ILB_RTC_TEST# RTC_TEST# 16
3 6 XDP_H_TCK BH7 C12 RTC_RST#
2 7 XDP_H_TMS BH5 PMC_PLT_CLK_0 / GPIO_S0_SC_96 ILB_RTC_RST# 10K_0804_8P4R_5%
1 8 XDP_H_TDI BH4 PMC_PLT_CLK_1 / GPIO_S0_SC_97
BH8 PMC_PLT_CLK_2 / GPIO_S0_SC_98 B10 EC_RSMRST#
C C
BH6 PMC_PLT_CLK_3 / GPIO_S0_SC_99 PMC_RSMRST# B7 EC_RSMRST# 16,32
51_0804_8P4R_5% PMC_CORE_PWROK
BJ9 PMC_PLT_CLK_4 / GPIO_S0_SC_100 PMC_CORE_PWROK
PMC_PLT_CLK_5 / GPIO_S0_SC_101 +1.0VS
RTC domain
C9 ILB_RTC_X1 EC_RSMRST# 1 2
XDP_H_TCK D14 ILB_RTC_X1 A9 ILB_RTC_X2 RC26 100K_0402_5%
16 XDP_H_TCK TAP_TCK ILB_RTC_X2

1
XDP_H_TRST# G12 B8 ILB_RTC_EXTPAD 1 2
16 XDP_H_TRST# TAP_TRST# ILB_RTC_EXTPAD
XDP_H_TMS F14 P22 +RTCVCC CC15 RC27
16 XDP_H_TMS TAP_TMS RTC_VCC_P22
XDP_H_TDI F12 .1U_0402_16V7K 73.2_0402_1%
16 XDP_H_TDI G16 TAP_TDI
XDP_H_TDO
16 XDP_H_TDO TAP_TDO
XDP_H_PRDY# D18
16 XDP_H_PRDY#

2
XDP_H_PREQ_BUF# F16 TAP_PRDY# B24 VR_SVID_ALERT#_SOC RC28 1 2 20_0402_1%
16 XDP_H_PREQ_BUF# TAP_PREQ# SVID_ALERT# VR_SVID_ALERT# 39
AT34 A25 VR_SVID_DATA_SOC RC29 1 2 16.9_0402_1%
RESERVED_AT34 SVID_DATA VR_SVID_DATA 39
C25 PLT_RST# 1 2
C23 SVID_CLK VR_SVID_CLK 39
SOC_SPI_CS0# CC11 NEMC@
T105 C21 PCU_SPI_CS_0# .1U_0402_16V7K
SOC_SPI_MISO B22 PCU_SPI_CS_1# / GPIO_S5_21 AU32 SOC_TS_INT# PMC_CORE_PWROK 1 2
PCU_SPI_MISO SIO_PWM_0 / GPIO_S0_SC_94 SOC_TS_INT# 20
SOC_SPI_MOSI A21 AT32 CC16 EMC@
SOC_SPI_CLK C22 PCU_SPI_MOSI SIO_PWM_1 / GPIO_S0_SC_95 .1U_0402_16V7K
PCU_SPI_CLK XDP_RSTBTN# 1 2
CC12 EMC@
SOC_KBRST# B18 .1U_0402_16V7K
17 SOC_KBRST# GPIO_S5_0
B16 K24 PMC_PLTRST# 1 2
C18 GPIO_S5_1 / PMC_WAKE_PCIE_1 GPIO_S5_22 N24 CC13 EMC@
A17 GPIO_S5_2 / PMC_WAKE_PCIE_2 GPIO_S5_23 M20 XDP_OBSDATA_A0 16
ILB_RTC_X1 .1U_0402_16V7K
GPIO_S5_3 / PMC_WAKE_PCIE_3 GPIO_S5_24 XDP_OBSDATA_A1 16
SOC_LID_OUT# C17 J18 EC_RSMRST# 1 2
17 SOC_LID_OUT# C16 GPIO_S5_4 GPIO_S5_25 M18 XDP_OBSDATA_A2 16 1 2
ILB_RTC_X2 CC14 EMC@
GPIO_S5_5 / PMU_SUSCLK_1 GPIO_S5_26 XDP_OBSDATA_A3 16
B14 K18 RC31 .1U_0402_16V7K
SOC_SMI# C15 GPIO_S5_6 / PMU_SUSCLK_2 GPIO_S5_27 K20 10M_0402_5% DDR_CORE_PWROK 1 2
17 SOC_SMI# GPIO_S5_7 / PMU_SUSCLK_3 GPIO_S5_28 M22 YC2 CC19 NEMC@
GPIO_S5_29 M24 XDP Connector not ready .1U_0402_16V7K
GPIO_S5_30 1 2
Need to Comfirm 1 2
C13 0705:for ESD request
A13 GPIO_S5_8
GPIO_S5_9 1 1
SOC_TP_INT# C19 AV32 32.768KHZ_12.5PF_CM7V-12520
29 SOC_TP_INT# GPIO_S5_10 SIO_SPI_CS# / GPIO_S0_SC_66 BA28 CC17 CC18
SIO_SPI_MISO / GPIO_S0_SC_67 AY28
SIO_SPI_MOSI / GPIO_S0_SC_68 15P_0402_50V8J 15P_0402_50V8J
1 2 GPIO_RCOMP N26 AY30 2 2
B
RC32 49.9_0402_1% GPIO_RCOMP 5 OF 13 SIO_SPI_CLK / GPIO_S0_SC_69 B
+3VALW +1.35VS
FH8065301546401_FCBGA131170

1
@ 0718: change to the other part to SJ10000M700 RC30
10K_0402_5%

5
UC7
3.3V 1 1.35V

2
NC 4
Y DDR_CORE_PWROK 8
PMC_CORE_PWROK 2
16,32 PMC_CORE_PWROK A

G
NL17SZ07DFT2G_SC70-5

3
1 SA00004BV00
+RTCVCC
CC20
RC34 1U_0402_6.3V6K
+BIOS_SPI +1.8VALW 20K_0402_1% 2
@ 1 2 RTC_TEST#

SPI ROM ( 8MByte ) 1.8V


2 1 1 2 RTC_RST#
+BIOS_SPI RC99 0_0402_1% RC35
1 2 .1U_0402_16V7K JP12
CC21 20K_0402_1% 1 JP@
2 1
UC8 CC22 +CHGRTC 2 1 +3VLP
RC36 1 2 3.3K_0402_5% SPI_CS0# 1 8 RC37 1 2 3.3K_0402_5% 1U_0402_6.3V6K JUMP_43X39 +RTCBATT
SPI_MISO 2 CS# VCC 7 SPI_HOLD# 2
RC38 1 2 3.3K_0402_5% SPI_WP# 3 DO(IO1) HOLD#(IO3) 6 SPI_CLK
WP#(IO2) CLK W=20mils
4 5 SPI_MOSI +CHGRTC +RTCBATT
GND DI(IO0)

1
+RTCVCC RC33
W25Q64DWSSIG_SO8 Reserve for EMI(Near SPI ROM) 1K_0402_5%

+
1 2

RP67 +RTCBATT_R
SPI_CS0# 1 8 SOC_SPI_CS0# 1 2 2 1 SPI_CLK CLR_CMOS 1 2 RTC_TEST# 1 20mil

3
SPI_MISO 2 7 SOC_SPI_MISO CC24 NEMC@ RC39 NEMC@ R1088 0_0402_5%
SPI_CLK 3 6 SOC_SPI_CLK 10P_0402_50V8J 33_0402_5% 1 @ 2 RTC_RST# CC23 20mil

P1

P2
1

SPI_MOSI 4 5 SOC_SPI_MOSI @ R1089 0_0402_5% .1U_0402_16V7K


CLRP1 2 +RTCVCC LBAV70WT1G_SC70-3

N1
A A
22_0804_8P4R_5% SHORT PADS DC3
2

EMC@

1
Clear CMOS JRTC CONN@

-
Close to RAM door LOTES_AAA-BAT-054-K01

2
SP07000H700
0718: change to the other part to SC600001Q00
Security Classification Compal Secret Data Compal Electronics, Inc.
2014/10/24 2015/10/31 Title
Issued Date Deciphered Date VLV-M SOC CLK/PMU/SPI
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-B912P
Date: Wednesday, January 21, 2015 Sheet 11 of 42
5 4 3 2 1
5 4 3 2 1

Main Func = CPU

Vinafix.com
USOC1F
D D
G2 M10
GPIO_S5_31 RESERVED_M10 M9
RESERVED_M9
M3 P6
L1 GPIO_S5_32 RESERVED_P6 P7
K2 GPIO_S5_33 RESERVED_P7
K3 GPIO_S5_34
M2 GPIO_S5_35 M7
N3 GPIO_S5_36 RESERVED_M7 M12 USB3_REXT0 1 2
P2 GPIO_S5_37 USB3_REXT0 RC40
L3 GPIO_S5_38 P10 1.24K_0402_1%
GPIO_S5_39 RESERVED_P10 P12
RESERVED_P12
M4
J3 RESERVED_M4 M6
P3 GPIO_S5_40 RESERVED_M6
H3 GPIO_S5_41 D4
GPIO_S5_42 USB3_RXP0 PCH_USB3_RX0_P 25
B12 E3
GPIO_S5_43 USB3_RXN0 PCH_USB3_RX0_N 25
K6 USB3 Port 0
M16 USB3_TXP0 K7 PCH_USB3_TX0_P 25
25 USB20_P0 USB_DP0 USB3_TXN0 PCH_USB3_TX0_N 25
USB2 Port 0 (USB3.0 P0) K16
25 USB20_N0 USB_DN0
J14
25 USB20_P1 USB_DP1
USB2.0 Port1 G14
25 USB20_N1 USB_DN1
K12
20 USB20_P2 J12 USB_DP2
Camera 20 USB20_N2 USB_DN2
K10
26 USB20_CPU_P3 H10 USB_DP3 H8
26 USB20_CPU_N3 USB_DN3 RESERVED_H8
USB Hub H7
RESERVED_H7
1K_0402_1% 1 2 RC41 ICLK_USB_TERMP D10
1K_0402_1% 1 2 RC42 ICLK_USB_TERMN F10 ICLK_USB_TERMP H4
+1.8VALW ICLK_USB_TERMN RESERVED_H4 H5 +1.8VS
RESERVED_H5
C C
RC44 1 2 10K_0402_5% USB_OC0# USB_OC0# C20
25 USB_OC0# USB_OC_0# / GPIO_S5_19

1
RC46 1 2 10K_0402_5% USB_OC1# USB_OC1# B20 @
25 USB_OC1# USB_OC_1# / GPIO_S5_20 RC43
10K_0402_5%

RC45 1 2 USB_RCOMP D6 BD12 GPIO_S0_SC_56:

2
45.3_0402_1% C7 USB_RCOMPO GPIO_S0_SC_55 BC12 GPIO_S0_SC_56
USB_RCOMPI GPIO_S0_SC_56 A16 Swap Override
BD14 DBG_UART_TXD T106
GPIO_S0_SC_57 / PCU_UART_TXD 0 = Enable

1
BC14 @
RC47 1 @ 2 USB_PLL_MON M13 GPIO_S0_SC_58 BF14 RC48 1 = Disable
0_0402_5% USB_PLL_MON GPIO_S0_SC_59 BD16 Reference EDS Page 216
GPIO_S0_SC_60 10K_0402_5%
BC16 DBG_UART_RXD T107
GPIO_S0_SC_61 / PCU_UART_RXD

2
B4
B5 USB_HSIC0_DATA BH12 SOC_SPKR
USB_HSIC0_STROBE ILB_8254_SPKR / GPIO_S0_SC_54 SOC_SPKR 23

E2
D2 USB_HSIC1_DATA
NOTE: Ref checklist rev2.2 p.25 USB_HSIC1_STROBE BH22
USB_HSIC_RCOMP must NOT float if they are not being used. SIO_I2C0_DATA / GPIO_S0_SC_78 BG23
1 2 HSIC_RCOMP A7 SIO_I2C0_CLK / GPIO_S0_SC_79
RC49 45.3_0402_1% USB_HSIC_RCOMP
BG24 I2C1_SDA T113
SIO_I2C1_DATA / GPIO_S0_SC_80 BH24 I2C1_SCL T114
49.9_0402_1% 1 2 RC50 LPC_RCOMP BF18 SIO_I2C1_CLK / GPIO_S0_SC_81
BH16 LPC_RCOMP / VGA_RCOMP
32 LPC_AD0 ILB_LPC_AD_0 / GPIO_S0_SC_42
BJ17 BG25
32 LPC_AD1 BJ13 ILB_LPC_AD_1 / GPIO_S0_SC_43 SIO_I2C2_DATA / GPIO_S0_SC_82 BJ25 I2C2_SDA_TP 29
ILB_LPC_CLK_0 : Output of 25MHz, 32 LPC_AD2 ILB_LPC_AD_2 / GPIO_S0_SC_44 SIO_I2C2_CLK / GPIO_S0_SC_83 I2C2_SCL_TP 29 Touch Pad
Need Check with EC BG14
32 LPC_AD3 BG17 ILB_LPC_AD_3 / GPIO_S0_SC_45
32 LPC_FRAME# ILB_LPC_FRAME# / GPIO_S0_SC_46
22_0402_5% 1 EMC@ 2 RC51 LPC_CLK_0 BG15 BG26
32 LPC_CLK_EC ILB_LPC_CLK_0 / GPIO_S0_SC_47 SIO_I2C3_DATA / GPIO_S0_SC_84
ILB_LPC_CLK_1 is for CLK_0 feedback.(Input) 22_0402_5% 1 EMC@ 2 RC52 LPC_CLK_1 BH14 BH26
T211 1 2 ILB_LPC_CLK_1 / GPIO_S0_SC_48 SIO_I2C3_CLK / GPIO_S0_SC_85
Set to Outpot for Normal Usage @ LPC_CLKRUN# BG16
RC60 10K_0402_5% BG13 ILB_LPC_CLKRUN# / GPIO_S0_SC_49
17 SOC_SERIRQ ILB_LPC_SERIRQ / GPIO_S0_SC_50 BF27
SIO_I2C4_DATA / GPIO_S0_SC_86 BG27
B
LPC_CLKRUN# SIO_I2C4_CLK / GPIO_S0_SC_87 B
32 LPC_CLKRUN#
BH28
BG12 SIO_I2C5_DATA / GPIO_S0_SC_88 BG28 I2C5_SDA_PNL 20
PCU_SMB_DATA Touch Screen
PCU_SMB_DATA / GPIO_S0_SC_51 SIO_I2C5_CLK / GPIO_S0_SC_89 I2C5_SCL_PNL 20
PCU_SMB_CLK BH10
PCU_SMB_ALERT# BG11 PCU_SMB_CLK / GPIO_S0_SC_52
2 1 LPC_CLK_0 PCU_SMB_ALERT# / GPIO_S0_SC_53 BJ29
CC25 NEMC@ SIO_I2C6_DATA / GPIO_S0_SC_90 BG29
SIO_I2C6_CLK / GPIO_S0_SC_91 / SD3_WP 0718: follow check list, move touch screen to port5
10P_0402_50V8J

2 1 LPC_CLK_1 BH30 GPIO_S0_SC_92 T110


CC26 NEMC@ GPIO_S0_SC_092 BG30 GPIO_S0_SC_93 T111
GPIO_S0_SC_093
PDA (Platform Debug Assistant) Test Points
10P_0402_50V8J 6 OF 13

FH8065301546401_FCBGA131170
@

+1.8VS +1.8VS
RP68
5 4 PCU_SMB_CLK
6 3 PCU_SMB_DATA
7 2 PCU_SMB_ALERT#
8 1
Pull High at EC side 0722: Refer from CRB2.2, change to 2.2K,
2.2K_0804_8P4R_5%
2
G

1 3 PCU_SMB_CLK
18,29,32 EC_SMB_CK2
QC3
D

S
2
G

DDR(18) MESS138W-G_SOT323-3

EC(32) 18,29,32 EC_SMB_DA2


1 3 PCU_SMB_DATA
A QC4 A
D

TP(29) MESS138W-G_SOT323-3

Security Classification Compal Secret Data Compal Electronics, Inc.


2014/10/24 2015/10/31 Title
Issued Date Deciphered Date VLV-M SOC USB/LPC/SMBus
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-B912P
Date: Wednesday, January 21, 2015 Sheet 12 of 42
5 4 3 2 1
5 4 3 2 1

Main Func = CPU

D
Vinafix.com D

USOC1H +1.05VS
325mA 1000mA @
U22 AC32 +1.05VS_SOC 2 1
+1.0VALW UNCORE_V1P0_G3_U22 CORE_V1P0_S3_AC32
V22 Y32 RC100 0_0402_1%
C1034 1 2 1U_0402_6.3V6K C5 UNCORE_V1P0_G3_V22 CORE_V1P0_S3_Y32
UNCORE_V1P0_G3 1uF*4 C1035 1 2 1U_0402_6.3V6K B6 UNCORE_V1P0_G3_C5 AA33
C1036 1 2 1U_0402_6.3V6K UNCORE_V1P0_G3_B6 CORE_V1P05_S3_AA33 AF33
C1037 1 2 1U_0402_6.3V6K Y19 CORE_V1P05_S3_AF33 AG33 C1038 1
@C1038
@ 2 0.47U_0402_6.3V6K
0722: Refer from check list, de-pop
C3 USB3_V1P0_G3_Y19 CORE_V1P05_S3_AG33 AG35
USB3_V1P0_G3 0.01uF*1 C1039 1 2 0.01U_0402_16V7K USB3_V1P0_G3_C3 CORE_V1P05_S3_AG35 U33 C1040 1
@C1040
@ 2 1U_0402_6.3V6K
CORE_V1P05_S3_U33 U35 C1041 1 2 1U_0402_6.3V6K CORE_V1P05_S3 1uF*3
CORE_V1P05_S3_U35 V33 C1042 1 2 1U_0402_6.3V6K
2750mA CORE_V1P05_S3_V33
V32
+1.0VS SVID_V1P0_S3_V32 +1.8VALW
BJ6
AD35 VGA_V1P0_S3_BJ6
AF35 DRAM_V1P0_S0iX_AD35 U24
C1043 1 2 1U_0402_6.3V6K AF36 DRAM_V1P0_S0iX_AF35 UNCORE_V1P8_G3_U24 V25
C1044 1 2 1U_0402_6.3V6K AA36 DRAM_V1P0_S0iX_AF36 PCU_V1P8_G3_V25 N20 C1045 1 2 1U_0402_6.3V6K PMC_V1P8_G3 1uF*1
DRAM_V1P0_S0iX 1uF*4 1 2 AJ36 DRAM_V1P0_S0iX_AA36 USB_V1P8_G3_N20 U25
C1046 1U_0402_6.3V6K
DRAM_V1P0_S0iX_AJ36
65mA PMU_V1P8_G3_U25
C1047 1 2 1U_0402_6.3V6K AK35 AA18
C DRAM_V1P0_S0iX_AK35 UNCORE_V1P8_G3_AA18 C
AK36
Y35 DRAM_V1P0_S0iX_AK36 +1.8VS
1 2 Y36 DRAM_V1P0_S0iX_Y35
C1048 1U_0402_6.3V6K
DRAM_V1P0_S0iX_Y36
10mA
C1049 1 2 1U_0402_6.3V6K AK19 AM30
DDI_V1P0_S0iX 1uF*4 C1050 1 2 1U_0402_6.3V6K AK21 DDI_V1P0_S0iX_AK19 UNCORE_V1P8_S3_AM30 AN32 C1051 1 2 1U_0402_6.3V6K UNCORE_V1P8_S3 1uF*4
C1052 1 2 1U_0402_6.3V6K AJ18 DDI_V1P0_S0iX_AK21 UNCORE_V1P8_S3_AN32 U38 C1053 1 2 1U_0402_6.3V6K
AM16 DDI_V1P0_S0iX_AJ18 UNCORE_V1P8_S3_U38 C1054 1 2 1U_0402_6.3V6K
AN29 DDI_V1P0_S0iX_AM16 C1055 1 2 1U_0402_6.3V6K +1.5VS
AN30 VIS_V1P0_S0iX_AN29
VIS_V1P0_S0iX_AN30
58mA
C1056 1 2 22U_0805_6.3V6M V24 AM32
UNCORE_V1P0_S0iX 22uF*3 C1057 1 2 22U_0805_6.3V6M Y22 VIS_V1P0_S0iX_V24 HDA_V1P5_S3_AM32 C1058 1 2 1U_0402_6.3V6K HDA_LPE_V1P5V1P8_S3 1uF*1
1uF*2 C1059 1 2 22U_0805_6.3V6M Y24 VIS_V1P0_S0iX_Y22 +3VALW
C1060 1 2 1U_0402_6.3V6K AF16 VIS_V1P0_S0iX_Y24 @
C1061 1 2 1U_0402_6.3V6K AF18 UNCORE_V1P0_S3_AF16 N22 +3VALW_SOC 2 1 For EVT measurement
UNCORE_V1P0_S3_AF18
Y18
UNCORE_V1P0_S3_Y18
50mA PCU_V3P3_G3_N22 R1022 0_0603_5%
PCIE_SATA_V1P0_S3 1uF*1 C1062 1 2 1U_0402_6.3V6K G1 N18 C1063 1 2 .1U_0402_16V7K USB_V3P3_G3 0.1uF*1
UNCORE_V1P0_S3 1uF*1 C1064 1 2 1U_0402_6.3V6K AK18 UNCORE_V1P0_S3_G1 USB_V3P3_G3_N18 P18 C1065 1 2 1U_0402_6.3V6K +3VS USB_ULPI_V1P8_S3 1uF*1
PCIE_V1P0_S3 1uF*1 C1066 1 2 1U_0402_6.3V6K AM18 PCIE_V1P0_S3_AK18 USB_V3P3_G3_P18 C1067 1 2 1U_0402_6.3V6K PCU_V3P3_G3 1uF*1
VGA_V1P0_S3 1uF*1 C1068 1 2 1U_0402_6.3V6K AM21 PCIE_V1P0_S3_AM18
USB_V1P0_S3 0.1uF*1 C1069 1 2 AN21 PCIE_V1P0_S3_AM21 1 2
.1U_0402_16V7K
PCIE_V1P0_S3_AN21
33mA @
USB3DEV_V1P0_S3 0.01uF*1 C1070 1 2 0.01U_0402_16V7K AN18 AN24 +3VS_SOC 2 1 For EVT measurement C1075 1U_0402_6.3V6K
GPIO_V1P0_S3 1uF*1 C1071 1 2 1U_0402_6.3V6K AN19 PCIE_SATA_V1P0_S3_AN18 VGA_V3P3_S3_AN24 R1023 0_0603_5%
SVID_V1P0_S3 1uF*1 C1072 1 2 1U_0402_6.3V6K AF21 SATA_V1P0_S3_AN19 AN27
AG21 UNCORE_V1P0_S0iX_AF21 SD3_V1P8V3P3_S3_AN27 +VCC_LPC_SOC 2 1
B +1.8VS B
M14 UNCORE_V1P0_S0iX_AG21 AM27 +VCC_LPC_SOC 1 2 VGA_V3P3_S3 1uF*1 RC102 @ 0_0402_1%
U18 USB_V1P0_S3_M14 LPC_V1P8V3P3_S3_AM27 C1073 1U_0402_6.3V6K
U19 USB_V1P0_S3_U18
AN25 USB_V1P0_S3_U19 +1.0VALW
GPIO_V1P0_S3_AN25
35mA
V18 USB_HSIC_V1P2_G3 1uF*1
USB_HSIC_V1P2_G3_V18 C1074 1 2 1U_0402_6.3V6K Disable HSIC
@ If the USB HSIC is not used, pin V18 can be connected
F1 AD16 Pop when use +1.2VALW
RESERVED_F1 VSS_AD16 AD18 to either +V1P2A or +V1P0A.
T195 TP_CORE_V1P05_S4 AF30 VSS_AD18
TP_CORE_V1P05_S4_AF30
8 OF 13
FH8065301546401_FCBGA131170

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/10/24 Deciphered Date 2015/10/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
VLV-M SOC Power
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Document Number Rev
B 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-B912P
Date: Wednesday, January 21, 2015 Sheet 13 of 42
5 4 3 2 1
5 4 3 2 1

Main Func = CPU


+1.35V
12A +SOC_VCC USOC1G 20mil @ JP14JP@
AA27 AD38 DRAM_VDD_S4_CLK 2 1

D
Vinafix.com
AA29
AA30
CORE_VCC_S0iX_AA27
CORE_VCC_S0iX_AA29
CORE_VCC_S0iX_AA30
DRAM_VDD_S4_AD38
DRAM_VDD_S4_AF38
AF38 RC54 0_0402_1%
JUMP_43X118
D
+SOC_VCC AC27 A48 CC27 1 2 1U_0402_6.3V6K JP15JP@
AC29 CORE_VCC_S0iX_AC27 DRAM_VDD_S4_A48 AK38 CC28 1 2 .1U_0402_16V7K
CORE_VCC_S0iX_AC29 DRAM_VDD_S4_AK38

330U_D2_2.5V_R6M
AC30 AM38
CORE_VCC_S0iX_AC30 DRAM_VDD_S4_AM38 AV41 JUMP_43X118
AD27 DRAM_VDD_S4_AV41 AV42
1 CORE_VCC_S0iX_AD27 DRAM_VDD_S4_AV42
1250mA
@ AD29 BB46
CORE_VCC_S0iX_AD29 DRAM_VDD_S4_BB46 +1.35V_SOC

CD32
+ AD30 BD49
AF27 CORE_VCC_S0iX_AD30 DRAM_VDD_S4_BD49 BD52
AF29 CORE_VCC_S0iX_AF27 DRAM_VDD_S4_BD52 BD53
2 AG27 CORE_VCC_S0iX_AF29 DRAM_VDD_S4_BD53 BF44 +1.35V_SOC
AG29 CORE_VCC_S0iX_AG27 DRAM_VDD_S4_BF44 BG51
AG30 CORE_VCC_S0iX_AG29 DRAM_VDD_S4_BG51 BJ48 CC29 2 1 2.2U_0402_6.3V6M
P26 CORE_VCC_S0iX_AG30 DRAM_VDD_S4_BJ48 C51 CC30 2 1 2.2U_0402_6.3V6M
P27 CORE_VCC_S0iX_P26 DRAM_VDD_S4_C51 D44 CC31 2 1 2.2U_0402_6.3V6M
U27 CORE_VCC_S0iX_P27 DRAM_VDD_S4_D44 F49 CC32 2 1 2.2U_0402_6.3V6M
U29 CORE_VCC_S0iX_U27 DRAM_VDD_S4_F49 F52
V27 CORE_VCC_S0iX_U29 DRAM_VDD_S4_F52 F53
V29 CORE_VCC_S0iX_V27 DRAM_VDD_S4_F53 H46
V30 CORE_VCC_S0iX_V29 DRAM_VDD_S4_H46 M41 @
Y27 CORE_VCC_S0iX_V30 DRAM_VDD_S4_M41 M42 CC33 1 2 10U_0603_6.3V6M
Y29 CORE_VCC_S0iX_Y27 DRAM_VDD_S4_M42 V38 CC34 1 2 10U_0603_6.3V6M
Y30 CORE_VCC_S0iX_Y29 DRAM_VDD_S4_V38 Y38
CORE_VCC_S0iX_Y30 DRAM_VDD_S4_Y38
@
C C
T112 TP2_CORE_VCC_S0iX AA22
TP2_CORE_VCC_S0iX
14A +SOC_VNN +1.35VS
420mA
AM22 AG18
AK32 UNCORE_VNN_S3_AM22 ICLK_V1P35_S3_F2_AG18 AJ19
AK30 UNCORE_VNN_S3_AK32 ICLK_V1P35_S3_F1_AJ19
AK29 UNCORE_VNN_S3_AK30 @
AK27 UNCORE_VNN_S3_AK29 BD1 VGA_V1P35_S3_F1 2 1
AK25 UNCORE_VNN_S3_AK27 VGA_V1P35_S3_F1_BD1 RC67 0_0402_1%
AK24 UNCORE_VNN_S3_AK25 0721: Pop
AK22 UNCORE_VNN_S3_AK24 CC35 1 2 10U_0603_6.3V6M
AJ24 UNCORE_VNN_S3_AK22 AD36 @
AJ22 UNCORE_VNN_S3_AJ24 DRAM_V1P35_S0iX_F1_AD36
+SOC_VNN +SOC_VCC AG24 UNCORE_VNN_S3_AJ22 AG32 CC36 1 2 22U_0805_6.3V6M
AG22 UNCORE_VNN_S3_AG24 UNCORE_V1P35_S0iX_F2_AG32 V36 @
AF24 UNCORE_VNN_S3_AG22 UNCORE_V1P35_S0iX_F3_V36 U36
AF22 UNCORE_VNN_S3_AF24 UNCORE_V1P35_S0iX_F4_U36
UNCORE_VNN_S3_AF22
1

AD22 AA25
AC24 UNCORE_VNN_S3_AD22 UNCORE_V1P35_S0iX_F5_AA25
RC55 RC56 AC22 UNCORE_VNN_S3_AC24
100_0402_1% 100_0402_1% AA24 UNCORE_VNN_S3_AC22
AD24 UNCORE_VNN_S3_AA24
2

UNCORE_VNN_S3_AD24
B B
AF19 CC38 1 2 22U_0805_6.3V6M
BB8 UNCORE_V1P35_S0iX_F6_AF19 AG19 CC39 1 2 1U_0402_6.3V6K
39 VGFX_VSNS UNCORE_VNN_SENSE UNCORE_V1P35_S0iX_F1_AG19
P28 CC40 1 2 1U_0402_6.3V6K
39 VCORE_VSNS N28 CORE_VCC_SENSE_P28 7 OF 13 1 2
CC41 1U_0402_6.3V6K
39 VCORE_GSNS CORE_VSS_SENSE_N28 1 2
CC42 1U_0402_6.3V6K
1

CC43 1 2 1U_0402_6.3V6K
FH8065301546401_FCBGA131170 CC44 1 2 1U_0402_6.3V6K
RC58 CC45 1 2 1U_0402_6.3V6K
100_0402_1% CC46 1 2 1U_0402_6.3V6K
@
CC47 1 2 1U_0402_6.3V6K
2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


2014/10/24 2015/10/31 Title
Issued Date Deciphered Date VLV-M SOC Power
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Document Number Rev
B 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-B912P
Date: Wednesday, January 21, 2015 Sheet 14 of 42
5 4 3 2 1
5 4 3 2 1

Main Func = CPU

D
Vinafix.com D

USOC1I USOC1J USOC1K USOC1L USOC1M

A11 AC36 AG38 AH47 AT24 AY36 BF30 E8 K9 U3


A15 VSS_A11 VSS_AC36 AC38 AH4 VSS_AG38 VSS_AH47 AH48 AT27 VSS_AT24 VSS_AY36 AY4 BF36 VSS_BF30 VSS_E8 F19 L13 VSS_K9 VSS_U3 U30
A19 VSS_A15 VSS_AC38 AD19 AH41 VSS_AH4 VSS_AH48 AH50 AT30 VSS_AT27 VSS_AY4 AY50 BF4 VSS_BF36 VSS_F19 F2 L19 VSS_L13 VSS_U30 U32
A23 VSS_A19 VSS_AD19 AD21 AH45 VSS_AH41 VSS_AH50 AH51 AT35 VSS_AT30 VSS_AY50 AY9 BG31 VSS_BF4 VSS_F2 F24 L27 VSS_L19 VSS_U32 U40
A27 VSS_A23 VSS_AD21 AD25 AH7 VSS_AH45 VSS_AH51 AH6 AT38 VSS_AT35 VSS_AY9 BA14 BG34 VSS_BG31 VSS_F24 F27 L35 VSS_L27 VSS_U40 U42
A31 VSS_A27 VSS_AD25 AD32 AH9 VSS_AH7 VSS_AH6 AM44 AT4 VSS_AT38 VSS_BA14 BA19 BG39 VSS_BG34 VSS_F27 F30 M19 VSS_L35 VSS_U42 U43
A35 VSS_A31 VSS_AD32 AD33 AJ1 VSS_AH9 VSS_AM44 AM51 AT47 VSS_AT4 VSS_BA19 BA22 BG42 VSS_BG39 VSS_F30 F35 M26 VSS_M19 VSS_U43 U45
A39 VSS_A35 VSS_AD33 AD47 AJ16 VSS_AJ1 VSS_AM51 AM7 AT52 VSS_AT47 VSS_BA22 BA27 BG45 VSS_BG42 VSS_F35 F5 M27 VSS_M26 VSS_U45 U46
A43 VSS_A39 VSS_AD47 AD7 AJ21 VSS_AJ16 VSS_AM7 AN1 AU1 VSS_AT52 VSS_BA27 BA32 BG49 VSS_BG45 VSS_F5 F7 M34 VSS_M27 VSS_U46 U48
A47 VSS_A43 VSS_AD7 AE1 AJ25 VSS_AJ21 VSS_AN1 AN11 AU24 VSS_AU1 VSS_BA32 BA35 BJ11 VSS_BG49 VSS_F7 G10 M35 VSS_M34 VSS_U48 U49
AA1 VSS_A47 VSS_AE1 AE11 AJ27 VSS_AJ25 VSS_AN11 AN12 AU3 VSS_AU24 VSS_BA35 BA40 BJ15 VSS_BJ11 VSS_G10 G20 M38 VSS_M35 VSS_U49 U5
C VSS_AA1 VSS_AE11 VSS_AJ27 VSS_AN12 VSS_AU3 VSS_BA40 VSS_BJ15 VSS_G20 VSS_M38 VSS_U5 C
AA16 AE12 AJ29 AN14 AU30 BA53 BJ19 G22 M47 U51
AA19 VSS_AA16 VSS_AE12 AE14 AJ3 VSS_AJ29 VSS_AN14 AN22 AU38 VSS_AU30 VSS_BA53 BB19 BJ23 VSS_BJ19 VSS_G22 G26 M51 VSS_M47 VSS_U51 U53
AA21 VSS_AA19 VSS_AE14 AE3 AJ30 VSS_AJ3 VSS_AN22 AN3 AU51 VSS_AU38 VSS_BB19 BB27 BJ27 VSS_BJ23 VSS_G26 G28 N1 VSS_M51 VSS_U53 U6
AA3 VSS_AA21 VSS_AE3 AE4 AJ32 VSS_AJ30 VSS_AN3 AN33 AV12 VSS_AU51 VSS_BB27 BB35 BJ31 VSS_BJ27 VSS_G28 G32 N16 VSS_N1 VSS_U6 U8
AA32 VSS_AA3 VSS_AE4 AE40 AJ33 VSS_AJ32 VSS_AN33 AN35 AV13 VSS_AV12 VSS_BB35 BC20 BJ35 VSS_BJ31 VSS_G32 G34 N38 VSS_N16 VSS_U8 U9
AA35 VSS_AA32 VSS_AE40 AE42 AJ35 VSS_AJ33 VSS_AN35 AN36 AV14 VSS_AV13 VSS_BC20 BC22 BJ39 VSS_BJ35 VSS_G34 G42 N51 VSS_N38 VSS_U9 V12
AA38 VSS_AA35 VSS_AE42 AE43 AJ38 VSS_AJ35 VSS_AN36 AN38 AV18 VSS_AV14 VSS_BC22 BC26 BJ43 VSS_BJ39 VSS_G42 H19 P13 VSS_N51 VSS_V12 V16
AA53 VSS_AA38 VSS_AE43 AE45 AJ53 VSS_AJ38 VSS_AN38 AN40 AV19 VSS_AV18 VSS_BC26 BC28 BJ47 VSS_BJ43 VSS_H19 H27 P16 VSS_P13 VSS_V16 V19
AB10 VSS_AA53 VSS_AE45 AE46 AK10 VSS_AJ53 VSS_AN40 AN42 AV24 VSS_AV19 VSS_BC28 BC32 BJ7 VSS_BJ47 VSS_H27 H35 P19 VSS_P16 VSS_V19 V21
AB4 VSS_AB10 VSS_AE46 AE48 AK14 VSS_AK10 VSS_AN42 AN43 AV27 VSS_AV24 VSS_BC32 BC34 C14 VSS_BJ7 VSS_H35 J1 P20 VSS_P19 VSS_V21 V35
AB41 VSS_AB4 VSS_AE48 AE50 AK16 VSS_AK14 VSS_AN43 AN45 AV30 VSS_AV27 VSS_BC34 BC42 C31 VSS_C14 VSS_J1 J16 P24 VSS_P20 VSS_V35 V40
AB45 VSS_AB41 VSS_AE50 AE51 AK33 VSS_AK16 VSS_AN45 AN46 AV35 VSS_AV30 VSS_BC42 BD19 C34 VSS_C31 VSS_J16 J19 P32 VSS_P24 VSS_V40 V44
AB47 VSS_AB45 VSS_AE51 AE53 AK41 VSS_AK33 VSS_AN46 AN48 AV38 VSS_AV35 VSS_BD19 BD24 C39 VSS_C34 VSS_J19 J22 P35 VSS_P32 VSS_V44 V51
AB48 VSS_AB47 VSS_AE53 AE6 AK44 VSS_AK41 VSS_AN48 AN49 AV47 VSS_AV38 VSS_BD24 BD27 C42 VSS_C39 VSS_J22 J27 P38 VSS_P35 VSS_V51 V7
AB50 VSS_AB48 VSS_AE6 AE8 AM12 VSS_AK44 VSS_AN49 AN5 AV51 VSS_AV47 VSS_BD27 BD30 C45 VSS_C42 VSS_J27 J32 P4 VSS_P38 VSS_V7 Y10
AB51 VSS_AB50 VSS_AE8 AE9 AM19 VSS_AM12 VSS_AN5 AN51 AV7 VSS_AV51 VSS_BD30 BD35 C49 VSS_C45 VSS_J32 J35 P47 VSS_P4 VSS_Y10 Y14
AB6 VSS_AB51 VSS_AE9 AF10 AM24 VSS_AM19 VSS_AN51 AN53 AW13 VSS_AV7 VSS_BD35 BE19 D12 VSS_C49 VSS_J35 J40 P52 VSS_P47 VSS_Y14 Y16
AC16 VSS_AB6 VSS_AF10 AF12 AM25 VSS_AM24 VSS_AN53 AN6 AW19 VSS_AW13 VSS_BE19 BE2 D16 VSS_D12 VSS_J40 J53 P9 VSS_P52 VSS_Y16 Y21
AC18 VSS_AC16 VSS_AF12 AF25 AM29 VSS_AM25 VSS_AN6 AN8 AW27 VSS_AW19 VSS_BE2 BE35 D24 VSS_D16 VSS_J53 K14 T40 VSS_P9 VSS_Y21 Y25
AC19 VSS_AC18 VSS_AF25 AF32 AM33 VSS_AM29 VSS_AN8 AN9 AW3 VSS_AW27 VSS_BE35 BE8 D30 VSS_D24 VSS_K14 K22 U1 VSS_T40 VSS_Y25 Y33
AC21 VSS_AC19 VSS_AF32 AF47 AM35 VSS_AM33 VSS_AN9 AP40 AW35 VSS_AW3 VSS_BE8 BF12 D36 VSS_D30 VSS_K22 K32 U11 VSS_U1 VSS_Y33 Y41
AC25 VSS_AC21 VSS_AF47 AG16 AM36 VSS_AM35 VSS_AP40 AT12 AY10 VSS_AW35 VSS_BF12 BF16 D38 VSS_D36 VSS_K32 K36 U12 VSS_U11 VSS_Y41 Y44
AC33 VSS_AC25 VSS_AG16 AG25 AM40 VSS_AM36 VSS_AT12 AT16 AY22 VSS_AY10 VSS_BF16 BF24 E19 VSS_D38 VSS_K36 K4 U14 VSS_U12 VSS_Y44 Y7
AC35 VSS_AC33 VSS_AG25 AG36 M28 VSS_AM40 VSS_AT16 AT19 AY32 VSS_AY22 VSS_BF24 BF38 E35 VSS_E19 VSS_K4 K50 U21 VSS_U14 VSS_Y7 Y9
B B
B2 VSS_AC35 9 OF 13VSS_AG36 B52 VSS_M28 10 OF 13 VSS_AT19 VSS_AY32 11 OF 13
VSS_BF38 VSS_E35 12 OF 13 VSS_K50 VSS_U21 13 OF 13 VSS_Y9
A6 VSS_B2 VSS_B52 B53
A52 VSS_A6 VSS_B53 BE1 FH8065301546401_FCBGA131170 FH8065301546401_FCBGA131170 FH8065301546401_FCBGA131170 FH8065301546401_FCBGA131170
A51 VSS_A52 VSS_BE1 BE53
A5 VSS_A51 VSS_BE53 BG1
VSS_A5 VSS_BG1 @ @ @ @
A49 BJ2
A3 VSS_A49 VSS_BJ2 BJ3
BH53 VSS_A3 VSS_BJ3 BJ5
BH52 VSS_BH53 VSS_BJ5 BJ49
BH2 VSS_BH52 VSS_BJ49 BJ51
BH1 VSS_BH2 VSS_BJ51 BJ52
BG53 VSS_BH1 VSS_BJ52 C1
E53 VSS_BG53 VSS_C1 C53
VSS_E53 VSS_C53 E1
VSS_E1
U16
AN16 USB_VSSA_U16
VSSA_AN16

FH8065301546401_FCBGA131170

@
A A

Security Classification Compal Secret Data Compal Electronics, Inc.


2014/10/24 2015/10/31 Title
Issued Date Deciphered Date VLV-M SOC GND
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Document Number Rev
B 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-B912P
Date: Wednesday, January 21, 2015 Sheet 15 of 42
5 4 3 2 1
5 4 3 2 1

Main Func = CPU


+1.8VALW

Vinafix.com

1
XDP@
D RC61 D
200_0402_5%

2
XDP_H_PREQ_BUF#

0625 update
XDP_RSTBTN#

1 @ 2 1 2
+1.8VALW
RC62 CC49 XDP@
1K_0402_5% .1U_0402_16V7K

+1.8VALW
XDP@
RC63 1 2 51_0402_5% XDP_H_TDO

TDO Close To XDP Conn >250 mil

C C

XDP-SFF-26Pin
CONN@

JDB1
XDP_H_PREQ_BUF# 1
11 XDP_H_PREQ_BUF# 1
XDP_H_PRDY# 2
11 XDP_H_PRDY# 3 2
XDP_OBSDATA_A0 4 3
11 XDP_OBSDATA_A0 4
XDP_OBSDATA_A1 5
11 XDP_OBSDATA_A1 6 5
XDP_OBSDATA_A2 7 6
11 XDP_OBSDATA_A2 8 7 1 2
XDP_OBSDATA_A3 XDP_H_PREQ_BUF# PMC_PLTRST# 1 2
11 XDP_OBSDATA_A3 9 8
B CC50 NEMC@ CC51 NEMC@ B
EC_RSMRST# 10 9 .1U_0402_16V7K .1U_0402_16V7K
11,32 EC_RSMRST# 11 10 1 2
XDP_H_PRDY# XDP_RSTBTN# 1 2 EC_RSMRST# 1 2
PMC_CORE_PWROK 12 11 CC52 NEMC@ CC53 NEMC@ CC54 NEMC@
11,32 PMC_CORE_PWROK 13 12
RTC_TEST# .1U_0402_16V7K .1U_0402_16V7K .1U_0402_16V7K
11 RTC_TEST# 14 13 1 2
XDP_H_TDO PMC_CORE_PWROK 1 2
15 14 CC56 NEMC@ CC57 NEMC@
16 15 .1U_0402_16V7K .1U_0402_16V7K
+1.8VALW 16
PMC_PLTRST# 17 XDP_H_TRST# 1 2
11 PMC_PLTRST# 18 17
XDP_RSTBTN# CC59 NEMC@
11 XDP_RSTBTN# 19 18 .1U_0402_16V7K
XDP_H_TDO 20 19 XDP_H_TDI 1 2
11 XDP_H_TDO 21 20
XDP_H_TRST# CC61 NEMC@
11 XDP_H_TRST# 21
XDP_H_TDI 22 .1U_0402_16V7K
11 XDP_H_TDI 23 22 1 2
XDP_H_TMS XDP_H_TMS 0708:for ESD request
11 XDP_H_TMS 24 23 CC63 NEMC@
25 24 27 .1U_0402_16V7K
XDP_H_TCK 26 25 G1 28 XDP_H_TCK 1 2
11 XDP_H_TCK 26 G2 CC65 NEMC@
.1U_0402_16V7K
MOLEX_52435-2671_26P_P0.5
PCB Footprint = MOLEX_52435-2671_26P-T

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


2014/10/24 2015/10/31 Title
Issued Date Deciphered Date VLV-M SOC Debug
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Document Number Rev
B 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-B912P
Date: Wednesday, January 21, 2015 Sheet 16 of 42
5 4 3 2 1
5 4 3 2 1

Main Func = CPU

RP1
DDI1_ENBKL 8 1
DDI1_ENVDD 7 2
+1.8VS
Vinafix.com +1.8VALW DDI1_PWM 6
5
3
4

100K_0804_8P4R_5%

1
D D

1
R8
4.7K_0402_5%
R7

2
@ 4.7K_0402_5%
EC_SCI# 2 1 SOC_SCI#
32 EC_SCI# SOC_SCI# 10

2
@
R29 0_0402_1% @ DDI1_ENBKL 2 1 PANEL_BKLEN
2 1 9 DDI1_ENBKL PANEL_BKLEN 32
EC_SMI# SOC_SMI#
32 EC_SMI# SOC_SMI# 11
R28 0_0402_1%
R31 0_0402_1%

+1.8VALW

2
R34
@
0_0402_1% +3VS

1
ENVDD 1 2
R11 4.7K_0402_5%

5
U68
1

P
NC 4 ENVDD
2 Y ENVDD 20
DDI1_ENVDD
9 DDI1_ENVDD A

G
NL17SZ07DFT2G_SC70-5

3
SA00004BV00
C @ C
PMC_SLP_S4# 2 1 SIO_SLP_S4# @
11 PMC_SLP_S4# SIO_SLP_S4# 32
PMC_SLP_S3# 2 1 SIO_SLP_S3# 1 R30 2
11 PMC_SLP_S3# SIO_SLP_S3# 32
1

R25 0_0402_1% 0_0402_5%

1
@ R1033 R24 0_0402_1% @
10K_0402_5% R1024
@ 10K_0402_5%
2

2
+1.8VALW

2
+3VS
R32
@
0_0402_1% INVT_PWM 1 2
R9 4.7K_0402_5%

1
+1.8VALW

5
U69
1

P
NC 4 INVT_PWM
2 Y INVT_PWM 20
R3 DDI1_PWM
9 DDI1_PWM A

G
4.7K_0402_5%
NL17SZ07DFT2G_SC70-5
2

3
@ SA00004BV00
KB_RST# 2 1 SOC_KBRST#
32 KB_RST# SOC_KBRST# 11
R22 0_0402_1%

B B

@
@ 2 1 SERIRQ
2 1 12 SOC_SERIRQ SERIRQ 32
PBTN_OUT# PMC_PWRBTN#
32 PBTN_OUT# PMC_PWRBTN# 11
R23 0_0402_1%
R27 0_0402_1%

+1.8VALW
1

R4
4.7K_0402_5%
2

@
EC_LID_OUT# 2 1 SOC_LID_OUT#
32 EC_LID_OUT# SOC_LID_OUT# 11
R26 0_0402_1%

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


2014/10/24 2015/10/31 Title
Issued Date Deciphered Date VLV-M SOC Level Shifter
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-B912P
Date: Wednesday, January 21, 2015 Sheet 17 of 42
5 4 3 2 1
5 4 3 2 1

Main Func = DIMM

+1.35V

H=4mm @

1
+DIMM1_VREF_DQ
RD3

Vinafix.com +1.35V

1
JDIMM2
2
+1.35V
2-3A to 1 DIMMs/channel
470_0402_5%

2
3 VREF_DQ VSS 4 DDR_A_D4
VSS DQ4

2.2U_0402_6.3V6M

0.1U_0402_10V7K
D DDR_A_D0 5 6 DDR_A_D5 DDR_A_RST# 1 2 D
7 DQ0 DQ5 8 DDR_A_RST#_CPU 8
DDR_A_D1
9 DQ1 VSS 10 DDR_A_DQS#0 @
Populate RD1, De-Populate RD7 for Intel DDR3 1 1 VSS DQS0#

CD1

CD2
DDR_A_DM0 11 12 DDR_A_DQS0 RD5
VREFDQ multiple methods M1 @ 13 DM0 DQS0 14 0_0402_1%
DDR_A_D2 15 VSS VSS 16 DDR_A_D6
Populate RD7, De-Populate RD1 for Intel DDR3 2 2 DDR_A_D3 17 DQ2 DQ6 18 DDR_A_D7
VREFDQ multiple methods M3 19 DQ3 DQ7 20
DDR_A_D8 21 VSS VSS 22 DDR_A_D12
DDR_A_D9 23 DQ8 DQ12 24 DDR_A_D13
25 DQ9 DQ13 26
DDR_A_DQS#1 27 VSS VSS 28 DDR_A_DM1
DDR_A_DQS1 29 DQS1# DM1 30 DDR_A_RST#
8 DDR_A_DM[0..7] 31 DQS1 RESET# 32 +1.35V +DIMM1_VREF_DQ
DDR_A_D10 33 VSS VSS 34 DDR_A_D14 ESD@
8 DDR_A_DQS#[0..7] DQ10 DQ14 1
DDR_A_D11 35 36 DDR_A_D15 CD3 1 2
37 DQ11 DQ15 38
8 DDR_A_D[0..63]
All VREF traces should VSS VSS
0.1U_0402_10V7K R1027
have 10 mil trace width DDR_A_D16 39 40 DDR_A_D20 4.7K_0402_1% 1
DDR_A_D17 41 DQ16 DQ20 42 DDR_A_D21 2 1 2
8 DDR_A_DQS[0..7] 43 DQ17 DQ21 44 R1028 C1076
DDR_A_DQS#2 45 VSS VSS 46 DDR_A_DM2 4.7K_0402_1%
8 DDR_A_MA[0..15] DQS2# DM2 .1U_0402_16V7K
DDR_A_DQS2 47 48 2
49 DQS2 VSS 50 DDR_A_D22
DDR_A_D18 51 VSS DQ22 52 DDR_A_D23
Layout Note: Note: DDR_A_D19 53 DQ18 DQ23 54 CAD NOTE
55 DQ19 VSS 56 DDR_A_D28
Place near JDIMM1 Check voltage tolerance of DDR_A_D24 57 VSS DQ28 58 DDR_A_D29 PLACE THE CAP NEAR TO +1.35V +DIMM1_VREF_CA
DDR_A_D25 59 DQ24 DQ29 60
DQ25 VSS DIMM RESET PIN
VREF_DQ at the DIMM socket DDR_A_DM3
61
63 VSS DQS3#
62
64
DDR_A_DQS#3
DDR_A_DQS3
1
R1029
2

65 DM3 DQS3 66 4.7K_0402_1%


VSS VSS 1
DDR_A_D26 67 68 DDR_A_D30 1 2
+1.35V DDR_A_D27 69 DQ26 DQ30 70 DDR_A_D31 R1030 C1078
71 DQ27 DQ31 72 4.7K_0402_1%
VSS VSS .1U_0402_16V7K
2
0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K
DDR_A_CKE0 73 74 DDR_A_CKE2
8 DDR_A_CKE0 75 CKE0 CKE1 76 DDR_A_CKE2 8
C 1 1 1 1 1 1 1 1 VDD VDD C
77 78 DDR_A_MA15
NC A15
CD4

CD5

CD6

CD7

CD8

CD9

CD10

CD11

DDR_A_BS2 79 80 DDR_A_MA14
8 DDR_A_BS2 81 BA2 A14 82
2 2 2 2 2 2 2 2 DDR_A_MA12 83 VDD VDD 84 DDR_A_MA11
DDR_A_MA9 85 A12/BC# A11 86 DDR_A_MA7
87 A9 A7 88 M_ODT0 1 @ 2 DDR_A_ODT0
89 VDD VDD 90 DDR_A_ODT0 8
DDR_A_MA8 DDR_A_MA6 RD8 0_0402_1%
DDR_A_MA5 91 A8 A6 92 DDR_A_MA4 M_ODT1 1 @ 2 DDR_A_ODT2
93 A5 A4 94 DDR_A_ODT2 8
RD9 0_0402_1%
DDR_A_MA3 95 VDD VDD 96 DDR_A_MA2
DDR_A_MA1 97 A3 A2 98 DDR_A_MA0
99 A1 A0 100
+1.35V DDR_A_CLK0 101 VDD VDD 102 DDR_A_CLK2
8 DDR_A_CLK0 103 CK0 CK1 104 DDR_A_CLK2 8
DDR_A_CLK0# DDR_A_CLK2#
8 DDR_A_CLK0# 105 CK0# CK1# 106 DDR_A_CLK2# 8
DDR_A_MA10 107 VDD VDD 108 DDR_A_BS1
A10/AP BA1 DDR_A_BS1 8
10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

330U_D2_2.5V_R6M

DDR_A_BS0 109 110 DDR_A_RAS#


8 DDR_A_BS0 111 BA0 RAS# 112 DDR_A_RAS# 8
DDR_A_WE# 113 VDD VDD 114 DDR_A_CS0#
1 8 DDR_A_WE# WE# S0# DDR_A_CS0# 8
1 1@ 1 1 1@ 1 1 1 DDR_A_CAS# 115 116 M_ODT0
8 DDR_A_CAS# CAS# ODT0
CD16

CD17

CD12

CD18

CD19

CD20

CD13

CD14

CD15

+ 117 118
DDR_A_MA13 119 VDD VDD 120 M_ODT1
DDR_A_CS2# 121 A13 ODT1 122 +DIMM1_VREF_CA
2 2 2 2 2 2 2 2 2 8 DDR_A_CS2# 123 S1# NC 124
125 VDD VDD 126 1 2
127 TEST VREF_CA 128
VSS VSS

2.2U_0402_6.3V6M

0.1U_0402_10V7K
DDR_A_D32 129 130 DDR_A_D36 @
DDR_A_D33 131 DQ32 DQ36 132 DDR_A_D37 RD4
133 DQ33 DQ37 134 0_0402_1%
VSS VSS 1 1

CD21

CD22
DDR_A_DQS#4 135 136 DDR_A_DM4
DDR_A_DQS4 137 DQS4# DM4 138
+1.35V 139 DQS4 VSS 140 DDR_A_D38
DDR_A_D34 141 VSS DQ38 142 DDR_A_D39 2 2
DDR_A_D35 143 DQ34 DQ39 144
DQ35 VSS
2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

10P_0402_25V8K

10P_0402_25V8K

10P_0402_25V8K

10P_0402_25V8K

10P_0402_25V8K

1 1 1 1 1 1 1 1 1 1 145 146 DDR_A_D44


@ CD33 DDR_A_D40 147 VSS DQ44 148 DDR_A_D45
@ @ @ @ @ @ @ @ @ - CD42 DQ40 DQ45
CD33

CD34

CD35

CD36

CD37

CD38

CD39

CD40

CD41

CD42

B FOR RF DDR_A_D41 149 150 B


151 DQ41 VSS 152 DDR_A_DQS#5
2 2 2 2 2 2 2 2 2 2 DDR_A_DM5 153 VSS DQS5# 154 DDR_A_DQS5
155 DM5 DQS5 156
DDR_A_D42 157 VSS VSS 158 DDR_A_D46
DDR_A_D43 159 DQ42 DQ46 160 DDR_A_D47
161 DQ43 DQ47 162
DDR_A_D48 163 VSS VSS 164 DDR_A_D52
DDR_A_D49 165 DQ48 DQ52 166 DDR_A_D53
167 DQ49 DQ53 168
DDR_A_DQS#6 169 VSS VSS 170 DDR_A_DM6
Layout Note: DQS6# DM6
DDR_A_DQS6 171 172
Place near JDIMM1.203,204 173 DQS6 VSS 174 DDR_A_D54
DDR_A_D50 175 VSS DQ54 176 DDR_A_D55
DDR_A_D51 177 DQ50 DQ55 178
179 DQ51 VSS 180 DDR_A_D60
DDR_A_D56 181 VSS DQ60 182 DDR_A_D61
DDR_A_D57 183 DQ56 DQ61 184
185 DQ57 VSS 186 DDR_A_DQS#7
DDR_A_DM7 187 VSS DQS7# 188 DDR_A_DQS7
+0.675VS 189 DM7 DQS7 190
DDR_A_D58 191 VSS VSS 192 DDR_A_D62
DDR_A_D59 193 DQ58 DQ62 194 DDR_A_D63
195 DQ59 DQ63 196
RD61 2 10K_0402_5% 197 VSS VSS 198
SA0 EVENT#
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

199 200
+3VS VDDSPD SDA EC_SMB_DA2 12,29,32
1 1 1 1 1 1 1 2 201 202
SA1 SCL EC_SMB_CK2 12,29,32
CD24

CD25

CD26

CD27

CD28

CD29

RD7 10K_0402_5% 203 204


+0.675VS VTT VTT +0.675VS
2.2U_0402_6.3V6M

1 1 1
0.1U_0402_10V7K

0.1U_0402_10V7K

@ 205 206
2 2 2 2 2 2 GND1 GND2
CD30

CD31

CD47

207 208
BOSS1 BOSS2
2 2 2
AS0A621-J4RB-7H
CONN@
Channel A
A A
+0.675VS

+3VS +1.35V <Address: SA1:SA0=00 (A0H)>


2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

10P_0402_25V8K

10P_0402_25V8K

1 1 1 1 CD62
@ @ @ @ CD43 - CD46 1 2
DIMM_1 STD H:4mm
CD43

CD45

CD44

CD46

FOR RF
22U_0603_6.3V6M
2 2 2 2 ESD@

ESD solution
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/10/24 Deciphered Date 2015/10/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDRIII DIMMA
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B912P
Date: Wednesday, January 21, 2015 Sheet 18 of 42
5 4 3 2 1
5 4 3 2 1

MODEL NAME: Power Sequence Block Diagram


PCB NAME: LA-B912 PR01
Vinafix.com
REVISION: 0.2 SPOK PU400, SY8032
+1.8VALW
USB_EN# UI5 SY6288
DATE: 2014/09/16
D D

+5V_USB_PWR1
SPOK PU301, SY8032
A3 B5 +1.0VALW
UI4 SY6288
+5V_USB_PWR2

USB_EN#
7a
SPOK
DDR_PWROK
AD42

9b SOC
SPOK
Level DDR_CORE_PWROK USOC1
UC7 AB42
AC A1 A3 B5 +3VALW 18 26 38 9a
7 PMC_CORE_PWROK
MODE VIN +5VALW 32 B7
PU700 A2
PU100
ISL88731 3
4 EC_RSMRST#
B10
B+ APW8822 A2 B4 100
BATT+ 5 R27
+3VLP,VL
PBTN_OUT# PMC_PWRBTN#
122 Level J26
DC U63
MODE B1
B2 VCOUT0_PH 7b R24
BATT+ PQ706 B+ 104 UE1 SIO_SLP_S3# PMC_SLP_S3#
PMOS 6 Level D22
EC9022QD U54
Bay Trial M , AAL30 , LA-B912PR02
C A5 B7 6a R25 6 C
112
SIO_SLP_S4# PMC_SLP_S4#
2014/09/15 B+ EC_ON 123 Level
U57
F22
A4 B6
ON/OFFBTN# 114 R22
P2 P3 +SOC_VCC KBRST# SOC_KBRST#
AC Adapter VIN 2 B18

19V
PQ704
PMOS
PQ705
PMOS PR700
PU700 Charger
PWM
BATT+ PQ706
PMOS
B+ PU500
PWM 15A PLT_RST#
13
Level
U61 9
ISL88731 Page. 40 ISL95833HRTZ +SOC_VNN F20
Page. 34 10A
B+ Page. 40 Page. 39

PJP202 +0.675VS 1A 121 97 116 95 B24


A25 PMC_PLTRST#
PJPDC1 PJP200
PU200
PWM
+1.35V SYSON
7
+1.35V,+0.675VS C25
RT8207MZQW PJP201
4A 8 Level

VGATE
Page. 36
PU200 ,RT8207 UC5

VR_ON_EC
+1.35V_SOC SUSP#
JP14
Battery BATT++ JP15 1.25A 7 10
PLT_RST#
PL4 8

SVID Bus
Page. 34
9V 34 7a
Page. U12 +1.35VS SUSP# U60, ME4856
LOAD SWITCH JP39
AOZ1311 0.5A +1.0VS 8a
DDR_PWROK
PBATT1 Page. 30

SUSP# U11,AOZ1311
PU301 +1.0VALW +5VS
PJP302 PWM Page. 37 PJP303 5.5A 7f
+3VS
MOSFET 8e
SY8032ABC
U60 Page. 30 +1.0VS 7d
MOSFET
B ME4856 5.5A SUSP#
U12,AOZ1311
8c B
PU100 +3VALW
PWM PJP101 6A +1.35VS,+1.8VS 8d
APW8822
Page. 35

U11 +3VS 3A SUSP# PU300,SY8032


LOAD SWITCH JP36 8e
AOZ1311 +1.05VS
Page. 30
+LCD_VDD 3,4,5
UX4 ,SY6288
UX1 ,APL3512 1.5A

SVID Bus
Page. 20

VGATE
PU400 +1.8VALW
SUSP# PU400, APL5930
PJP400 PWM PJP401 1A +1.5VS LDO 8f
7f
SY8032ABC
Page. 38

U12 +1.8VS
15 7e
+SOC_VCC
LOAD SWITCH JP38
AOZ1311
Page. 30
1A 7c
VR_ON PU500
ISL95833 +SOC_VNN 7e
PU402 +1.5VS
PJP404 LDO PJP405
APL5930KAI 0.5A
Page. 38

PU300 +1.05VS
PJP300 PWM PJP301
SY8032ABC 1A
Page. 37

A 6.5A A
+5VALW U11 +5VS
PJP100 LOAD SWITCH JP37 3.5A
AOZ1311
Page. 30 +5V_ODD_R1
JP7

QS2
+5VALW SI3456
+5V_HDD
JP13 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/10/24 Deciphered Date 2015/10/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
eDP to LVDS converter
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-B912P
Date: Wednesday, January 21, 2015 Sheet 19 of 42
5 4 3 2 1
5 4 3 2 1

Main Func = LCD LCD PWR CTRL

+LCDVDD +3VS
LVDS Connector
UX4 @
1 5 1 2
+3VS OUT IN RX25 0_0402_5% 40
DX1 +5VS_TOUCH 40
2 39

1
RX10
2 3
GND

OC EN Vinafix.com
4 ENVDD_R
32 BKOFF#
2 1 DISPOFF# TOUCH_RST#_R
TS_INT#
38
37
39
38
37

1
10K_0402_5% 36
RB751V-40_SOD323-2 USB20_Hub_P1 35 36
10K_0402_5% 26 USB20_Hub_P1 34 35
D SY6288C20AAC_SOT23-5 USB20_Hub_N1 D
RX9 26 USB20_Hub_N1 33 34
32 33
+3VS_CAM

2
USB20_CAM_P2_R 31 32
USB20_CAM_N2_R 30 31
29 30
MIC_DATA 28 29
+LCDVDD +LCDVDD_CONN 23 MIC_DATA 27 28
MIC_CLK
+3VS +3VS_LCDIN 23 MIC_CLK 26 27
W=60mils MIC_GND
UX1 25 26
W=60mils 1 1 2 +LCDVDD_CONN 24 25
@
2 1 +3VS_LCDIN 5 VOUT FBMA-L11-201209-221LMA30T_0805 @ 23 24
RV299 0_0805_5% VIN LX1 2 1 USB20_CAM_P2_R 22 23
12 USB20_P2 22

0.1U_0402_10V7K
CX11

10U_0805_10V6K
2 RX22 0_0402_1% DISPOFF# 21
4 GND @ 20 21
SS 1 1 17 INVT_PWM 20

CX8
1 1 2 1 USB20_CAM_N2_R 19
3 12 USB20_N2 1 2 0.1U_0402_10V7K CPU_EDP_P1_C 18 19
RX21 0_0402_1% EDP_CPU_LANE_P1 CX45
EN 9 EDP_CPU_LANE_P1 1 2 0.1U_0402_10V7K CPU_EDP_N1_C 17 18
CX7 CX9 @ EDP_CPU_LANE_N1 CX47
2 2 9 EDP_CPU_LANE_N1 16 17
4.7U_0805_10V4Z 0.1U_0402_10V7K APL3512ABI-TRG_SOT23-5
2 2 EDP_CPU_LANE_P0 CX42 1 2 0.1U_0402_10V7K CPU_EDP_P0_C 15 16
9 EDP_CPU_LANE_P0 1 2 0.1U_0402_10V7K CPU_EDP_N0_C 14 15
APL3512 PIN
@ 4 tire to VIN EDP_CPU_LANE_N0 CX46
9 EDP_CPU_LANE_N0 13 14
EDP_CPU_AUX# CX43 1 2 0.1U_0402_10V7K CPU_EDP_AUX#_C 12 13
9 EDP_CPU_AUX# 1 2 0.1U_0402_10V7K CPU_EDP_AUX_C 11 12
EDP_CPU_AUX CX44
9 EDP_CPU_AUX 10 11
@ LCD_TEST
17 ENVDD
2 1 ENVDD_R SS table 32 LCD_TEST
EDP_HPD 9 10
9
RX7 0_0402_1% DBC_EN_R 8
7 8
6 7
Css Tss 6
5
4 5
0.1uF 100mS W=80mils +LCDVDD_CONN 4
3 42
2 3 G2 41
10nF 10mS +INV_PWR_SRC 2 G1
1
1
1nF 1mS W=60mils JEDP
Open or 1mS @ CONN@
C tied to DBC_EN 2 1 DBC_EN_R C
32 DBC_EN
VIN RX19 0_0402_1%

1
@
RX23
0_0402_5%

INVT_PWM
LCD backlight PWR CTRL

2
D2401
1 2 2 R5205 1 TS_INT#
29,32 LID_SW#
33_0402_5%
RB751V-40_SOD323-2

1
MIC_GND 1 2 GND RX26
RX20 0_0402_5% 100K_0402_5% @ Note: Follow BDW design
B+ +INV_PWR_SRC

2
FX2 60mil
60mil 2 1

1.5A_24V_MINISMDC150F/24~D
1 1
CX10 CX5
0.1U_0603_25V7K 0.1U_0603_25V7K
2 2 * Touch Screen Panel +5VS_TOUCH

1
+V_TS @ 100K_0402_5%
RX24

2
+5VS +V_TS @
B B
@ 1 2 TOUCH_RST#_R
Webcam PWR CTRL 2
RX28
1
0_0603_1%
1
CX6
32 TOUCH_RST#
RX1 0_0402_5%

0.1U_0402_16V7K
2

+3VS +3VS_CAM
+1.8VS +5VS_TOUCH

1
2 1
0724: update BOM structure for RX28, CX6, RX1 and RX24

1
RX27 0_0603_5% RX42
RX41 10K_0402_5%
10K_0402_5% @

2
G
@

2
2
3 1 TS_INT#
11 SOC_TS_INT#
@ QE12

D
2 1 MESS138W-G_SOT323-3
+1.8VS RX30 0_0603_5% @

+V_TS +1.8VS +5VS_TOUCH


+5VS_TOUCH
1

+3VS UX3
10K_0402_5% 1
VOUT

1
R3406 5
VIN
1

1
0.1U_0402_10V7K
CX50

4.7U_0805_10V4Z
CX49
RX39 RX40
2

2 1 1 RX2 RX3 10K_0402_5% 10K_0402_5%


RT17 @1 4 GND @ 2.2K_0402_5% @ @ 2.2K_0402_5% @ @
9 EDP_CPU_HPD SS

2
G
100K_0402_5% 1 @

2
0.1U_0402_10V7K
CX52

CX51 @ 3
2

2
@ 4.7U_0805_10V4Z EN 2 2 I2C5_SDA_PNL 3 1 I2C5_SDA_PNL_R
2 12 I2C5_SDA_PNL T109
CPU_EDP_AUX#_C APL3512ABI-TRG_SOT23-5 QE10

D
CPU_EDP_AUX_C 2 @ MESS138W-G_SOT323-3

2
G
A @ A
1

D I2C5_SCL_PNL 3 1 I2C5_SCL_PNL_R
2 12 I2C5_SCL_PNL T99
Q9 EDP_HPD QE11

D
32 TS_EN
2N7002K_SOT23-3 G RT18 MESS138W-G_SOT323-3
1

S 100K_0402_5% @
R3405
Closed to JEDP
3

100K_0402_5% @
2

AUX termination Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/10/24 Deciphered Date 2015/10/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LVDS/webcam/touch
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B912P
Date: Wednesday, January 21, 2015 Sheet 20 of 42
5 4 3 2 1
5 4 3 2 1

Main Func = HDMI

46@ ROYALTY HDMI W/LOGO


Part Number Description

RO0000002HM HDMI W/Logo:RO0000002HM

Vinafix.com
W=40mils
D Place close to JHDMI1 D

+VDISPLAY_VCC

TMDS_TXCN 1 2 TMDS_L_TXCN

2
R2358 8.2_0402_1% +5VS
2 1
RC70
CX12 2 1 0.1U_0402_10V7K TMDS_TXCN R1071 1 2 619_0402_1% 150_0402_1% FX1
9 HDMI_CLK-
CX13 2 1 0.1U_0402_10V7K TMDS_TXCP R1072 1 2 619_0402_1% 1.5A_6V_1206L150PR~D

10U_0603_6.3V6M
0.1U_0402_16V7K
9 HDMI_CLK+ 1 1

CX21
TMDS_TXCP 1 2 TMDS_L_TXCP

1
CX14 2 1 0.1U_0402_10V7K TMDS_TX0N R1073 1 2 619_0402_1% R2359 8.2_0402_1% +3VS CX22
9 HDMI_TX0-
CX15 2 1 0.1U_0402_10V7K TMDS_TX0P R1074 1 2 619_0402_1%
9 HDMI_TX0+ 2 2

HDMI_GND
CX16 2 1 0.1U_0402_10V7K TMDS_TX1N R1075 1 2 619_0402_1%
9 HDMI_TX1-
CX17 2 1 0.1U_0402_10V7K TMDS_TX1P R1076 1 2 619_0402_1%
9 HDMI_TX1+

1
CX18 2 1 0.1U_0402_10V7K TMDS_TX2N R1077 1 2 619_0402_1% @ RX12
9 HDMI_TX2-
CX19 2 1 0.1U_0402_10V7K TMDS_TX2P R1078 1 2 619_0402_1% TMDS_TX0N 1 2 TMDS_L_TX0N 10K_0402_5%
9 HDMI_TX2+

2
R2360 8.2_0402_1%
RC71

2
150_0402_1% JHDMI1

3
HDMI_HPLUG 19
5 G
D
Q14A TMDS_TX0P 1 2 TMDS_L_TX0P 18 HP_DET
+3VS

1
S DMN66D0LDW-7_SOT363-6 R2361 8.2_0402_1% 17 +5V
CPU_DPB_CTRLDAT_R 16 DDC/CEC_GND

4
CPU_DPB_CTRLCLK_R 15 SDA
SCL

1
@ 14
+1.8VS R122 13 Reserved
100K_0402_5% TMDS_L_TXCN 12 CEC
11 CK- 23
CK_shield GND3
1

TMDS_TX1N 1 2 TMDS_L_TX1N TMDS_L_TXCP 10 22

2
CK+ GND2

2
R376 R2362 8.2_0402_1% TMDS_L_TX0N 9 21
RC72 8 D0- GND1 20
10K_0402_5% D0_shield GND0
150_0402_1% TMDS_L_TX0P 7
TMDS_L_TX1N 6 D0+
2

TMDS_TX1P 1 2 TMDS_L_TX1P 5 D1-


9 HDMI_HPD#

1
R2363 8.2_0402_1% TMDS_L_TX1P 4 D1_shield
C D1+ C
6

TMDS_L_TX2N 3
Q14B
D
G 2 HDMI_HPLUG 2 D2-
DMN66D0LDW-7_SOT363-6 S TMDS_L_TX2P 1 D2_shield
D2+
1
1

R121 C-K_96067-3K28-192-124
100K_0402_5% CONN@

TMDS_TX2P 1 2 TMDS_L_TX2P
2

2
R2364 8.2_0402_1%
RC73
150_0402_1%

TMDS_TX2N 1 2 TMDS_L_TX2N

1
R2365 8.2_0402_1%

+1.8VS
RP15
HDMI_DDCDATA 5 4 +VDISPLAY_VCC
HDMI_DDCCLK 6 3
CPU_DPB_CTRLDAT_R 7 2
CPU_DPB_CTRLCLK_R 8 1

2.2K_0804_8P4R_5%
B B

+1.8VS
2
G

HDMI_DDCCLK 3 1 CPU_DPB_CTRLCLK_R
9 HDMI_DDCCLK
Q57
S

D
2
G

MESS138W-G_SOT323-3

HDMI_DDCDATA 3 1 CPU_DPB_CTRLDAT_R
9 HDMI_DDCDATA
Q58
S

MESS138W-G_SOT323-3

0721: add net name

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/10/24 Deciphered Date 2015/10/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDMI
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B912P
Date: Wednesday, January 21, 2015 Sheet 21 of 42
5 4 3 2 1
5 4 3 2 1

D
Vinafix.com D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/10/24 Deciphered Date 2015/10/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LAN RTL8106E
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-B912P
Date: Wednesday, January 21, 2015 Sheet 22 of 42
5 4 3 2 1
5 4 3 2 1

Main Func = Audio

JACK_PLUG Delay circutis


+1.5VS +CODEC_AVDD2
+3VS +3VS
1 @ 2
RA8 0_0402_1%

1
JACK_SENSE#
RA1 RA2

Vinafix.com
+5V_PVDD +5VS +5V_AUDIO
@ 100K_0402_5% @ 100K_0402_5%

2
@

3
+3VS

CA71
4.7U_0603_6.3V6K

CA51
0.1U_0402_16V7K
2 1 1
5
D
RV54 0_0805_5% 1
G QA5A
D +5V_AUDIO +5VS D
S DMN66D0LDW-7_SOT363-6
QA5B @

4
6
@ 2 DMN66D0LDW-7_SOT363-6
2 1 1

0.1U_0402_16V7K
CA60

4.7U_0603_6.3V6K
CA59
2 1 JACK_PLUG# 1 2 2
D
G

RV59 0_0603_5% S @
+3VS RA3 @

1
2 2 10K_0402_5% 1 1
CA57,CA58 close 0.1U_0402_16V7K 1 1 Digital power for HDA link
CA58

4.7U_0603_6.3V6K
CA57
1 +CODEC_AVDD2 @ @
CA61 CA1 CA2
to UA1 pin1 (Bay Trail M -- Pin9 -->1.5VS) 10U_0603_6.3V6M 10U_0603_6.3V6M 2 2 10U_0603_6.3V6M
2 2
UA1 2
1 26
DVDD AVDD1 +5V_PVDD
40 1 1
9 AVDD2 CA53 CA54
+1.5VS DVDD-IO 4.7U_0603_6.3V6K 0.1U_0402_16V7K CA71, CA51 place close to Pin 26
36
CPVDD 41 2 2 0721: pop all components for this portions
6 PVDD1 46
10 HDA_BITCLK_AUDIO BCLK PVDD2 +5V_PVDD
1 2 1
+3VS

CA55
4.7U_0603_6.3V6K

CA56
0.1U_0402_16V7K
5 RA155 EMI@ 100K_0402_5% 1
10 HDA_SDOUT_AUDIO SDATA-OUT 13 1 2 JACK_SENSE# RA4
10 HP/LINE1 JD(JD1) 14 RA34 200K_0402_1% JACK_PLUG# 2 1 JACK_SENSE#
10 HDA_SYNC_AUDIO SYNC MIC2/LINE2 JD(JD2) 2
15 0_0402_5%
RA130 1 2 22_0402_5% 8 SPDIFO/FRONT JD(JD3)/GPIO3 2
RA34 place close to UA1
NEMC@
10 HDA_SDIN0
11
SDATA-IN
RA155 Reserve for ESD Request Reserve for cancel Delay circutis
10 HDA_RST_AUDIO# RESETB
R2355 32 HPOUT-L
0_0402_5% HPOUT-L(PORT-I-L) 33 HPOUT-R
2 1 HDA_BITCLK_AUDIO LINE1-R 21 HPOUT-R(PORT-I-R)
LINE1-L 22 LINE1-R(PORT-C-R)
1 LINE1-L(PORT-C-L)
NEMC@ Line1-VREFO-R 30
CA21 Line1-VREFO-L 31 LINE1-VREFO-R 42 INT-SPK-L+
22P_0402_50V8J 23 LINE1-VREFO-L SPK-OUT-L+ 43 INT-SPK-L-
2 24 LINE2-R(PORT-E-R) SPK-OUT-L- 45 INT-SPK-R+
LINE2-L(PORT-E-L) SPK-OUT-R+ 44 INT-SPK-R- RA29 1 2 0_0603_5%
SPK-OUT-R-
16 RA30 1 2 0_0603_5%
+MIC2-VREFO MONO-OUT
2 LA1 EMC@ RA31 1 2 0_0603_5%
GPIO0/DMIC-DATA MIC_DATA 20
2 1 SLEEVE +MIC2-VREFO 29 3 MIC_CLK_C 1 2
+MIC2-VREFO MIC2-VREFO GPIO1/DMIC-CLK MIC_CLK 20
RA53 2 1 2.2K_0402_5% RING2 RING2 17 48 1 BLM15BB221SN1D_2P RA32 1 2 0_0603_5%
RA1109 2.2K_0402_5% SLEEVE 18 MIC2-L(PORT-F-L)/RING SPDIF-OUT/GPIO2 NEMC@
2 1 MIC1-L 19 MIC2-R(PORT-F-R)/SLEEVE CA22
10U_0603_6.3V6M CA74 MIC_CAP 37 22P_0402_50V8J SM01000BV00
PCB trace width of SLEEVE & CBP 35 2 1 CA24 2
CBN
1U_0402_6.3V6K
need CIS symbol
RING2 are required at least 40 +3VALW R2356 2
2
1 0_0402_5%
1
20
NC 2 1
GNDA GND
+3VS 10K_0402_5% RA54 2.2U_0603_6.3V6K CA23
C mil and its length should be 32 EC_MUTE#
EC_MUTE# 47
PDB
C
1 EMI@ 2 28
as short as possible. RA154 100K_0402_5% VREF 12 CA65 1 2 RA79 1 2 PC_BEEP
CA62 1 2 10U_0603_6.3V6M 27 PCBEEP 34 0.1U_0402_16V7K 1K_0402_1% Place on the moat between GND & GNDA.
CA63 1 2 10U_0603_6.3V6M 39 LDO1-CAP CPVEE @
100K is used to speed up the discharge CA64 1 2 10U_0603_6.3V6M 7 LDO2-CAP CA25 2 1 CA69 1 2 100P_0402_50V8J
for LDO1. It could solve the pop sound LDO3-CAP 1U_0402_6.3V6K
during system boot up and reboot. 4 25 RA81 2 1 10K_0402_5%
RA154 place close to Pin 26 DVSS AVSS1 38 DA8
49 AVSS2 2
GND EC Beep 32 BEEP# P1
ALC3234-CG_MQFN48_6X6 1 PC_BEEP
RA154 Reserve for ESD Request N1
3
MCU Beep 12 SOC_SPKR P2

1
BAT54C-7-F_SOT23-3 @
0724: change the cymbal to correct IC part and schematics RA19
10K_0402_5%

2
Line1-VREFO-L
PC Beep
Line1-VREFO-R
Close to UA1
1

RA166 RA165
Pin11,13,14,16
4.7K_0402_5%
4.7K_0402_5%
close to Codec JSPK
INT-SPK-R+ LA3 2 @ 1 0_0603_5% SPK_R+_CONN 1
2

LINE1-L CA67 1 2 1 2 INT-SPK-R- LA4 2 @ 1 0_0603_5% SPK_R-_CONN 2 1


4.7U_0603_6.3V6K RA80 1K_0402_1% INT-SPK-L+ LA5 2 @ 1 0_0603_5% SPK_L+_CONN 3 2
LINE1-R CA68 1 2 1 2 INT-SPK-L- LA6 2 @ 1 0_0603_5% SPK_L-_CONN 4 3
4.7U_0603_6.3V6K RA82 1K_0402_1% universal type Combo Jack 5
6
4
G1
EMI@ G2
40mil 40mil Trace width for SPK-L+/SPK-L-/SPK-R+/SPK-R-

1000P_0402_50V7K

1000P_0402_50V7K

1000P_0402_50V7K

1000P_0402_50V7K
SLEEVE LA7 2 1 BLM15PX330SN1D 0402 1 1 1 1 ACES_50224-0040N-001
SLEEVE_R 25
EMI@

CA29

EMC@ CA30

EMC@ CA31

EMC@ CA32
40mil 40mil
RING2 LA10 2 1 BLM15PX330SN1D 0402
RING2_R 25 Speaker 4 ohm : 40mil CONN@
HPOUT-L 1 2 Line-IN-L LA8 1 2 0_0603_5% 2 2 2 2

EMC@
HPOUT-R
RA55
1
10_0402_1%
2 Line-IN-R LA9 1 2 0_0603_5%
AUD_HP_OUT_L_CN 25
Speaker 8 ohm : 20mil
AUD_HP_OUT_R_CN 25
RA56 10_0402_1%
JACK_PLUG#
JACK_PLUG# 25
1

@ @
RA84 RA83
B B
10K_0402_5% 10K_0402_5%
2

RA57, RA58 Reserve for ESD Request


Grounding Circuit dummy
+3VALW

1
+3VS +RTCVCC RA17

@ 100K_0402_5%~D SLEEVE

1
0718: change the net name to +3VS RA16

2
2
@ 100K_0402_5%~D

3
RA18 QA1B D
@ 10K_0402_5%~D 5

2
G
DMN66D0LDW-7_SOT363-6~D

1
@ S

4
6
QA1A D
2
G GNDA
0804: change to the part name
1

RA20
@ S DMN66D0LDW-7_SOT363-6~D

1
@ 100K_0402_5%~D
2

GNDA

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/10/24 2015/10/31 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Audio Codec ALC3234
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B912P
Date: Wednesday, January 21, 2015 Sheet 23 of 42
5 4 3 2 1
5 4 3 2 1

Main Func = Card Reader

+3VS

2
@
1
+3VS_CARD
Vinafix.com
RR9 0_0603_5%
+3VS_CARD
D D

SD_CD#
1 1
CR1 CR2 1
CR9 NESD@
0.1U_0402_10V7K 4.7U_0603_6.3V6K
2 2 22P_0402_50V8J
+3VS_CARD +VCC_3IN1 2

Trace width:40mil For EMI request. Place close to UR1

5
UR1
0724: vendor review to remove for compatility

CARD_3V3
3V3_IN
RR1 2 1 6.19K_0402_1% RREF 1 22
RREF SP14 21 SD_D2
@ SP13 20 MS_D1_SD_D3
26 USB20_Hub_P4
USB20_Hub_P4 2 1 USB20_CR_P3_R USB20_CR_N3_R 2
DM
SP12
SP11
19 close to chip side
RR4 0_0402_1% USB20_CR_P3_R 3 18 SD_CMD
@ DP SP10 16
USB20_Hub_N4 2 1 USB20_CR_N3_R SP9 15 MS_D2_SD_CLK_R 1 EMC@ 2 MS_D2_SD_CLK
26 USB20_Hub_N4 SP8
RR5 0_0402_1% RR2 22_0402_5%

RTS5179-GR_QFN24
14
7 SP7 13 SD_CD#
23 XD_CD# SP6 12
17 XD_D7 SP5 11 SD_D0
GPIO0 SP4 10 SD_D1

Thermal pad
6 SP3 9
V18 24 SDREG SP2 8 MS_CLK_SD_WP
C V18 SP1 C

CR6
1
2 2
RTS5170-GR_QFN24_4X4 EMC@

25
1U_0402_6.3V6K
CR3

1U_0402_6.3V6K
CR4

5P_0402_50V8C
2
1 1

0724: doesn't support MS function and remove

+VCC_3IN1

+VCC_3IN1 JREAD
MS_D1_SD_D3 1
CD/DAT3
SD_CMD 2
CMD
3
VSS1
1 1 4
CR8 CR7 VDD
MS_D2_SD_CLK 5
4.7U_0603_6.3V6K 0.1U_0402_10V7K CLK
2 2 6
VSS2
B B
SD_D0 7
DAT0
SD_D1 8 12
DAT1 G1
SD_D2 9 13
DAT2 G2
Close to JREAD SD_CD# 10
CD G3
14

MS_CLK_SD_WP 11 15
WP G4
S SOCKET TAI TWUN PSDAT4-11GLBS1NN4H2 SD
CONN@

SD_CMD

1
CR11 NESD@

22P_0402_50V8J
2

For EMI request.


Place close to JREAD
0724: vendor review to remove for compatility

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/10/24 Deciphered Date 2015/10/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Card Reader RTS5179
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B912P
Date: Wednesday, January 21, 2015 Sheet 24 of 42
5 4 3 2 1
5 4 3 2 1

Main Func = USB3.0

USB 3.0 +5V_USB_PWR1


W=80mils JUSB1
@ 1
VBUS

100U_1206_6.3V M X5R

10U_0603_6.3V6M

0.1U_0402_16V7K
2 1 USB20_JUSB1_N0_R 2
R2366 0_0402_1% USB20_JUSB1_P0_R 3 D-
4 D+
1 1 1

Vinafix.com USB3RN2_JUSB1_R 5 PGND


SSRX-

CI1

CI40

CI2
PCH_USB3_RX0_P USB3RP2_JUSB1_R USB3RP2_JUSB1_R 6 10
12 PCH_USB3_RX0_P +5VALW 3.0A +5V_USB_PWR1
2 2 2
7
8
SSRX+
GND
GND
GND
11
12
UI5 USB3TN2_JUSB1_R
D PCH_USB3_RX0_N USB3RN2_JUSB1_R 1 80mil USB3TP2_JUSB1_R 9 SSTX- GND 13 D
12 PCH_USB3_RX0_N 5 OUT SSTX+ GND
@ IN 2 PUBAUN-09FLBS1NN4H0
GND

47U_0805_6.3V4Z

4.7U_0805_10V4Z

0.1U_0402_16V7K
2 1 1 1 1 USB_EN# 4 CONN@
32 USB_EN# EN

CI18

CI12

CI14
R2367 0_0402_1% 3 USB_OC0#
OCB USB_OC0# 12
1
@ CI13 SY6288D20AAC_SOT23-5 1
2 1 2 2 2 CI15

0.1U_0402_16V7K
R2368 0_0402_1% @
2 0.1U_0402_16V7K
PCH_USB3_TX0_P 2 1 PCH_USB3_TX0_P_C USB3TP2_JUSB1_R 2
12 PCH_USB3_TX0_P
CI4 0.1U_0402_10V7K

PCH_USB3_TX0_N 2 1 PCH_USB3_TX0_N_C USB3TN2_JUSB1_R


12 PCH_USB3_TX0_N
CI3 0.1U_0402_10V7K
@
2 1
R2369 0_0402_1%

ESD@
DI1
USB3RN2_JUSB1_R 1 10 USB3RN2_JUSB1_R D27 ESD@
USB20_JUSB1_N0_R 2
EMC@ USB3RP2_JUSB1_R 2 9 USB3RP2_JUSB1_R 1
HCM2012GA900AE_4P USB20_JUSB1_P0_R 3
USB20_P0 4 3 USB20_JUSB1_P0_R USB3TN2_JUSB1_R 4 7 USB3TN2_JUSB1_R
12 USB20_P0
AZC199-02S
USB3TP2_JUSB1_R 5 6 USB3TP2_JUSB1_R
USB20_N0 1 2 USB20_JUSB1_N0_R
12 USB20_N0 3
LI2
8

IP4292CZ10-TBR_XSON10_2.5X1~D

C C

USB/B

+5VALW
3.0A +5V_USB_PWR2 EMC@
HCM2012GA900AE_4P
UI4 USB20_P1 4 3 USB20_JUSB2_P1_R
1 80mil 12 USB20_P1
5 OUT
IN 2 USB20_N1 1 2 USB20_JUSB2_N1_R
GND 12 USB20_N1
4.7U_0805_10V4Z

0.1U_0402_16V7K

1 1 USB_EN# 4
EN LI5
CI6

CI7

3 USB_OC1#
OCB USB_OC1# 12
0.1U_0402_16V7K

1
CI26

SY6288D20AAC_SOT23-5 1 24 26
2 2 24 GND
0.1U_0402_16V7K

CI17

23 25
USB20_JUSB2_N1_R 22 23 GND
2 +5V_USB_PWR2 USB20_JUSB2_P1_R 21 22
2 20 21
USB20_JUSB3_P3_R 19 20
USB20_JUSB3_N3_R 18 19
17 18
1 17
CI19 16
+ 15 16
150U_B15G_6.3VM_R70M 14 15
13 14
EMC@ 2 12 13
HCM2012GA900AE_4P 11 12
B 11 B
USB20_Hub_N3 4 3 USB20_JUSB3_N3_R 10
26 USB20_Hub_N3 9 10
AUD_HP_OUT_L_CN 8 9
1 2 23 AUD_HP_OUT_L_CN 7 8
USB20_Hub_P3 USB20_JUSB3_P3_R AUD_HP_OUT_R_CN
26 USB20_Hub_P3 23 AUD_HP_OUT_R_CN 6 7
SLEEVE_R
LI6 23 SLEEVE_R 5 6
RING2_R 4 5
23 RING2_R 3 4
JACK_PLUG# 2 3
23 JACK_PLUG# 1 2
1
JIO1
CONN@

For ESD request

D25 NESD@
USB20_JUSB2_N1_R 2
1
USB20_JUSB2_P1_R 3

AZC199-02S

D26 NESD@
USB20_JUSB3_N3_R 2
1
USB20_JUSB3_P3_R 3

A AZC199-02S A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/10/24 Deciphered Date 2015/10/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
USB3.0
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B912P
Date: Wednesday, January 21, 2015 Sheet 25 of 42
5 4 3 2 1
5 4 3 2 1

Main Func = USB Hub

Vinafix.com
D D

+3V_HUB

1
C1119 R1050
@ 0_0603_5% +5V_HUB +3V_HUB
Vonder suggest Voltage up 10V
0725: vendor review=> OVCJ need pull high +5V

1
+5V_USB_PWR2
1 R1046 R1051 @
0725: vendor review=> tire to together @ 10K_0402_5% 10K_0402_5%
1 2 C1119
+3V_HUB R1053 10U_0603_10V6M

2
0_0603_5% 2 HUB_OVCJ
+5VALW +5V_HUB
1
1 2 +5V_HUB C1121
R1047 1 2 100K_0402_5% HUB_XRSTJ R1045 0_0603_5% 1 1 0.01U_0402_16V7K
2
1
HUB_BUSJ C1117 C1118
C1120 .1U_0402_16V7K .1U_0402_16V7K U58
HUB_VBUSM 2 2 20 10 USB20_Hub_N1
10U_0603_6.3V6M VDD5 DM1 USB20_Hub_N1 20
2 11 USB20_Hub_P1 To Touch Panel
1 2 21 DP1 USB20_Hub_P1 20
C1122 0.01U_0402_16V7K
VDD33F 8 USB20_Hub_N2
15 DM2 9 USB20_Hub_N2 28
USB20_CPU_N3 USB20_Hub_P2 To BT
12 USB20_CPU_N3 16 DMU DP2 USB20_Hub_P2 28
Source USB20_CPU_P3
12 USB20_CPU_P3 DPU 6 USB20_Hub_N3
25 DM3 7 USB20_Hub_P3 USB20_Hub_N3 25
PWRJ DP3 USB20_Hub_P3 25 To USB Conn
C 26 C
OVCJ 4 USB20_Hub_N4
DM4 5 USB20_Hub_P4 USB20_Hub_N4 24
DP4 USB20_Hub_P4 24 To CardReader
@ HUB_XRSTJ 17
2 1 HUB_XOUT HUB_VBUSM 18 XRSTJ 27
R1049 0_0402_1% HUB_BUSJ 19 VBUSM TESTJ 23
BUSJ LED1
1

22 24
RC69 DRV LED2
@ 1M_0402_5% 12
HUB_XIN 3 NC1 13
Y9 HUB_XOUT 2 XIN NC2 28
2

4 3 HUB_XIN XOUT NC3


1 2 1 14
VSS REXT

1
12MHZ_12PF_5YEA12000122IFA2Q3 FE1.1S-BSOP28BCTR_SSOP28
1 1
2.7K_0402_1%
@ C1132 @ C1133 R1048
12P_0402_50V8J~N 12P_0402_50V8J~N

2
2 2

0718: change to SSOP package

0725: vendor review=> reserve for EMI

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


2014/10/24 2015/10/31 Title
Issued Date Deciphered Date USB2.0 hub
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B912P
Date: Wednesday, January 21, 2015 Sheet 26 of 42
5 4 3 2 1
A B C D E F G H

Main Func = HDD


CONN@
SATA HDD Connector ACES_51625-01201-001
14
13 GND
GND
12
SATA_PTX_DRX_P0_C CS30 1 2 0.01U_0402_16V7K SATA_PTX_DRX_P0 SATA_PTX_DRX_P0 11 12
10 SATA_PTX_DRX_P0_C 11
SATA_PTX_DRX_N0_C CS32 1 2 0.01U_0402_16V7K SATA_PTX_DRX_N0 SATA_PTX_DRX_N0 10

Vinafix.com
10 SATA_PTX_DRX_N0_C 10
9
SATA_PRX_DTX_N0_C CS34 1 2 0.01U_0402_16V7K SATA_PRX_DTX_N0 SATA_PRX_DTX_N0 8 9
10 SATA_PRX_DTX_N0_C 8
SATA_PRX_DTX_P0_C CS31 1 2 0.01U_0402_16V7K SATA_PRX_DTX_P0 SATA_PRX_DTX_P0 7
10 SATA_PRX_DTX_P0_C 6 7
1 @ 2 DEVSLP0_R 5 6
1 10 DEVSLP0 5 1
1 @ 2 RS8 JHDD_P10
0_0402_1% 4
+3VS 4
RS7 0_0402_1% 3
2 3
+5V_HDD 2
1
1

1000P_0402_50V7K

0.1U_0402_25V6K
JHDD

10U_0805_10V6K
1 1 1
CS5 CS6 CS7
2 2 2

+5V_HDD Source
+5V_HDD JP@ +5VS
JP13
1 2
1 2
JUMP_43X79

SHORT DEFAULT

2 2

ODD Power Control SATA ODD Connector


JP@JP7
JP@ JP7
1 2 +5VS_ODD
1 2

3 JUMP_43X79 3
+5VS
+5VS_ODD +5VS_ODD_R1

1000P_0402_50V7K

0.1U_0402_25V6K

10U_0805_10V6K
QS2 +5VS_ODD_R1
1 1 1
D

6 @
S

CS11
CS10

CS12
5 4 2 1
1U_0402_6.3V6K

@ 1 2 RS12 0_0805_5% ODD@ ODD@ ODD@


1 2 2 2
CS13 SI3456BDV-T1-E3 1N TSOP6
G
3

B+ 2 @
2

RS6
@ 100K_0402_5% DC021409120 CONN@
AECS_51519-02001-001
1

ODD_EN 20 22
19 20 GND2
@ 18 19
ODD_DA# 1 2 17 18
10 ODD_DA# 17
1

D 1 RS10 0_0402_5% 16
2 CS17 15 16
ODD_EN# QS3 RS9 @ CS16
10 ODD_EN# G 2 1 14 15
@ 470K_0402_5% 0.1U_0603_25V7K
@ 13 14
2N7002KW_SOT323-3 S 2 12 13

Low Active
3

@ 0.1U_0402_25V6K 11 12
10 11
9 10
ODD_DETECT#1 @ 2 8 9
10 ODD_DETECT# RS09 0_0402_5% 7 8
CS15 2 1 0.01U_0402_16V7K SATA_PRX_DTX_P1 6 7
10 SATA_PRX_DTX_P1_C 2 1 0.01U_0402_16V7K 5 6
CS14 ODD@ SATA_PRX_DTX_N1
10 SATA_PRX_DTX_N1_C 4 5
ODD@
CS9 2
ODD@ 1 0.01U_0402_16V7K SATA_PTX_DRX_N1 3 4
10 SATA_PTX_DRX_N1_C 3
CS8 2
ODD@ 1 0.01U_0402_16V7K SATA_PTX_DRX_P1 2
10 SATA_PTX_DRX_P1_C 2
4
1 4
1 21
GND1
JODD1

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/10/24 Deciphered Date 2015/10/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDD/ODD
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B912P
Date: Wednesday, January 21, 2015 Sheet 27 of 42
A B C D E F G H
5 4 3 2 1

Main Func = WLAN


RM7 closed to pin 2, 4 closed to pin 64, 66
1 2
+3VS +3VS_WLAN_NGFF
0_1206_5% +3VS_WLAN_NGFF +3VS_WLAN_NGFF
FOR RF

@
22U_0603_6.3V6M~D

0.1U_0402_10V7K~D

2.2U_0402_6.3V6M

10P_0402_50V8J

22U_0603_6.3V6M~D

0.1U_0402_10V7K~D
1 1 1 1 1 1

CM4

CM6
+3VS_WLAN_NGFF

CM5

CM9

CM8

CM7
Vinafix.com JNGFF
2 2 2 2 2 2

1 2
USB20_Hub_P2 3 GND 3.3VAUX 4
D 26 USB20_Hub_P2 USB_D+ 3.3VAUX D
USB20_Hub_N2 5 6
26 USB20_Hub_N2 7 USB_D- LED1# 8
9 GND PCM_CLK 10
11 SIDO_CLK PCM_SYNC 12
1 R490 2 WLAN_WAKE# 13 SDIO_CMD PCM_IN 14
+3VS_WLAN_NGFF SDO_DAT0 PCM_OUT
10K_0402_5% 15 16
17 SDO_DAT1 LED2# 18
19 SDO_DAT2 GND 20
21 SDO_DAT3 UART_WAKE# 22
23 SDIO_WAKE# UART_RX
SDIO_RESET#

FOR RF
24 0721: change power rail to +3VS_WLAN_NGFF
25 UART_TX 26
PCIE_PTX_C_DRX_P1 27 GND UART_CTS 28 RM11 2 1 100K_0402_5%
10 PCIE_PTX_C_DRX_P1 PETP0 UART_RTS
PCIE_PTX_C_DRX_N1 29 30 EC_TX
10 PCIE_PTX_C_DRX_N1 PETN0 RESERVED EC_TX 32
31 32 EC_RX
33 GND RESERVED 34 EC_RX 32 +3VS_WLAN_NGFF +3VS_WLAN_NGFF
@ PCIE_PRX_DTX_P1
2 1 10 PCIE_PRX_DTX_P1 35 PERP0 RESERVED 36
11 CLK_PCIE_WLAN CLK_PCIE_WLAN_R PCIE_PRX_DTX_N1
10 PCIE_PRX_DTX_N1 37 PERN0 COEX3 38
RI5 0_0402_1%
GND COEX2

1
@ CLK_PCIE_WLAN_R 39 40 QM30
REFCLKP0 COEX1

2
11 CLK_PCIE_WLAN#
2 1 CLK_PCIE_WLAN#_R CLK_PCIE_WLAN#_R 41 42 SUSCLK_R 1 RM8 @ 2 PMC_SUSCLK 11 RM110 2N7002K_SOT23-3
RI6 0_0402_1% 43 REFCLKN0 SUSCLK 44 PLT_RST# 0_0402_5%

G
GND PERST0# PLT_RST# 11,32 10K_0402_5%
WLAN_CLKREQ# 45 46 NGFF_BT_ON# 1 @ 2
10 WLAN_CLKREQ# 47 CLKEQ0# W_DISABLE2# 48 BT_ON# 10 1 3
WLAN_WAKE# WLAN_RADIO_DIS#_R
RM9 0_0402_1% WL_OFF#
32 WLAN_WAKE# WL_OFF# 10,32

2
49 PEWAKE0# W_DISABLE1# 50 E51_RX2

S
GND I2C_DATA T15
51 52
53 RSRVD/PETP1 I2C_CLK 54
55 RSRVD/PETN1 ALERT 56
57 GND RESERVED 58
59 RSRVD/PERP1 RESERVED 60
61 RSRVD/PERN1 RESERVED 62
63 GND RESERVED 64
65 RESERVED 3.3VAUX 66
67 RESERVED 3.3VAUX
GND
C C

69 68
MTG77 MTG76

LCN_DAN05-67406-0100
CONN@

TEMP CONN

+3VS
HDD LED R6110
1 2 SATA_LED#_R
@
+3VS
10KR2J-3-GP
2

2N7002KW_SOT323-3
G

Q6103
Q6104
@ LED2 32 SATA_LED#_R
APU-->EC and LED @ R2
3
+5VS

3
3 1 SATA_LED#_B 2 R6108
10,32 SOC_SATALED#
From EC
S

1 1 2 2 1
R1
SATA_LED SATA_LED_R

2
@ 2N7002KW_SOT323-3

G
@ LED-W-27-GP-U
DDTA144VCA-7-F-GP 330R2J-3-GP
B R6106 B
2nd = 83.00110.R70 @
1 2 3rd = 083.11204.0070 SOC_SATALED# 3 1 PWR_PWM_LED_R#

D
@
0R2J-2-GP
For EMI Reserved
Q6105
SATA HDD LED SATA_LED EC6104 1 2 SCD1U16V2KX-3GP

LOW actived from PCH GPIO @

Power / Battery LED

+5VALW (AMBER_LED)
Low actived from KBC GPIO Q6101 Battery LED1 12-22A/Y2T7D-C30/2C YELLOW/WHITE
3
R2
@
BATT_LOW_LED# 2 1BATT_LOW_LED_R# 2 R6103 470R2J-2-GP
32 BATT_LOW_LED#
1 2 1 1
R1
R6105 0_0402_1% BATT_LOW_LED BAT_AMBER

R6107 2 1 390R2J-3-GP BAT_WHITE 3


DDTA144VCA-7-F-GP
2
+5VALW
Low actived from KBC GPIO Q6102 LED1
3
R2
@
PWR_PWM_LED# 2 1PWR_PWM_LED_R# 2
A
32 PWR_PWM_LED#
R6104 0_0402_1%
R1
1 PWR_PWM_LED
Battery LED2 A

DDTA144VCA-7-F-GP

(WHITE_LED)

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/10/24 Deciphered Date 2015/10/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Mini Card/LED
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B912P
Date: Wednesday, January 21, 2015 Sheet 28 of 42
5 4 3 2 1
5 4 3 2 1

Main Func = Touch Pad


LID Switch FAN Control circuit
C2/C3 reserve for ESD team and closed to JPWR. +FAN_POWER
ON/OFF switch +3VALW_EC
40mil
TOP Side
C3
Vinafix.com
JXT_FP202DH-004M10M

2.2U_0603_6.3V6K

1000P_0402_50V7K
1 1

1
SW1 0.1U_0402_16V4Z 4 6

D
1
SMT1-05-A_4P
3
LID_SW#
ON/OFFBTN#
3
2
1
4 GND
3 GND
2
5
POWER/B @
R1
47K_0402_5%
2
CE24
2
CE23
+5VS
CE25
D
+3VALW_EC 1
2 4 2.2U_0603_6.3V6K

2
C2 JPWR CONN@ 1 2
@ SP010022U00 (CIS OK)
6
5

0.1U_0402_16V4Z LID_SW#
20,32 LID_SW#
UE3
1 8
@ 2 VEN GND 7
Power ON Circuit 3 VIN
VO
GND
GND
6

2
32 EN_DFAN1 EN_DFAN1 4 5
U70 VSET GND
Bottom Side

VCC
VOUT
+3VLP NCT3942S_SO8

SW2 @

GND
SMT1-05-A_4P C1

2
1 3 @
RE49 TCS20DLR_SOT23F-3 0.1U_0402_16V4Z +3VS

1
2 4 100K_0402_5%

1
+FAN_POWER
6
5

1
RE50
10K_0402_5%
ON/OFFBTN# 32
@ JFAN
1 40mil

2
1
CE20 2 1
0.1U_0402_16V7K 32 FAN_SPEED1 3 2
2 3
Pop only before MP 4
1 GND
5 CONN@
CE32 GND
0.01U_0402_16V7K
2 ACES 50224-0030N-001

SP02000PU10(CIS OK)

C C

Touch pad 1
RE26
2
0_0603_5%

+3VS_TPIN
@

UE4
+3VS_TP INT_KBD Connector
+3VALW +3VS_TPIN 1 7
@ 2 VIN VOUT 8
2 1 VIN VOUT 30 32

0.1U_0402_10V6K
1 30 GND
RE2 0_0603_5% 3 6 KSI7 29 31
32 TP_EN ON CT 29 GND

CE59
KSI6 28

2200P_0402_25V7K
2 1 28

CE60
@ KSI4 27
CE61 4 2 KSI2 26 27
@ VBIAS 5 @ KSI5 25 26
1U_0402_6.3V6K GND 25
1 9 2 KSI1 24
GND KSI3 23 24
KSI[0..7] KSI0 22 23
32 KSI[0..7] 21 22
TPS22967DSGR_SON8_2X2 KSO5
KSO[0..16] KSO4 20 21
32 KSO[0..16] 19 20
KSO7
KSO6 18 19
KSO8 17 18
KSO3 16 17
KSO1 15 16
+3VS_TP KSO2 14 15
+1.8VALW KSO0 13 14
JTP KSO12 12 13
1 KSO16 11 12
I2C2_SDA_TP_R 2 1 KSO15 10 11
I2C2_SCL_TP_R 3 2 +3VS_TP KSO13 9 10
4 3 @ KSO14 8 9
B 4 8 B
TP_INT# 5 2 1 KSO9 7
5 7

1
PTP_DIS# 6 R36 0_0402_1% +5VS KSO11 6
6 6
1

32 PTP_DIS# TP_DATA 7 RE20 RE60 KSO10 5


32 TP_DATA 8 7 1 2 4 5
TP_CLK 10K_0402_5% KB_CAPS_PWR
32 TP_CLK 9 8 3 4
RE34
10 GND CONN@ 2.2K_0402_5% 240_0402_1% 2 3
GND 2 2
3

2
G

1
32 CAPS_LED
2

1
PESD5V0U2BT_SOT23-3~D
DE3

JXT_FP202DH-008M10M
SOC_TP_INT# 3 1 TP_INT# JKB
11 SOC_TP_INT#
QE9
S

NEMC@
SP010020L00 (CIS OK) MESS138W-G_SOT323-3 CONN@
S H-CONN ACES 51510-0304N-P01 30P P0.8
1 2
32 EC_TP_INT#
RE29 0_0402_5% SP01001H600(CIS OK)
@
1

+3VS_TP
1

RE28
@ 10K_0402_5%
2

+1.8VS +3VS_TP PTP_DIS#


1

RE19 RE17
Event PCH-TP_INT# PCH-TP_INT#
RE30 RE31 2.2K_0402_5% 2.2K_0402_5%
2.2K_0402_5% 2.2K_0402_5%
S0 Interrupt X
2
G
2

I2C2_SDA_TP 3 1 I2C2_SDA_TP_R
A 12 I2C2_SDA_TP
QE7
S3 X Wake A
S

MESS138W-G_SOT323-3
1. Clamshell closed or Lid closed
2
G

I2C2_SCL_TP 3 1 I2C2_SCL_TP_R
2. Tablet mode for Convertile design X X
12 I2C2_SCL_TP 3.Disable TP function by ht-key
QE8
S

MESS138W-G_SOT323-3

1 2
12,18,32 EC_SMB_DA2
RE32 0_0402_5% Security Classification Compal Secret Data Compal Electronics, Inc.
@ Issued Date 2014/10/24 Deciphered Date 2015/10/31 Title

12,18,32 EC_SMB_CK2
1 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FAN/TP/PWR SW
RE33 0_0402_5% Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0.3
@ DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B912P
Date: Wednesday, January 21, 2015 Sheet 29 of 42
5 4 3 2 1
A B C D E

Main Func = DC Interface

+5VS and +3VS Switch


VIH=1.2~5.5V Rise Time:
3.3V@100k/0.1uF=3.538ms
3.3V@120k/0.1uF=4.272ms Vinafix.com
+3VALW
+3VS_OUT
JP36JP@
+3VS
3.3V@330pF = 889.68us
5.0V@330pF = 1348us
+3VALW +5VALW +5VS +3VS

+5VALW JUMP_43X118
1
1 2 C1138 2 1@ .1U_0402_16V7K 1
1 2 C1143 @ U11
JUMP_43X118

C2316

10U_0603_6.3V6M

C2318

10U_0603_6.3V6M

C2306

10U_0603_6.3V6M

C2305

10U_0603_6.3V6M

C2307

10U_0805_10V4Z

C2308

10U_0603_6.3V6M

C2324

10U_0603_6.3V6M

C2323

10U_0603_6.3V6M
C1144 @ 1U_0402_6.3V6K 1 10
1U_0402_6.3V6K 5 IN1 OUT1 6 +5VS_OUT
IN2 OUT2 +5VS 1 1 1 1 1 1 1 1
11
R927 3 VCC_PAD JP37JP@
+5VALW VBIAS
100K_0402_5% 8 C976 2 1 @ @
SUSP# 2 1 3VS_ON 2 GND 7 2 1 330P_0402_50V7K C1139 @ .1U_0402_16V7K 2 2 2 2 2 2 2 2
32,36,37,38 SUSP# 4 ON1 CT2 9
C980 2 1 ON2 CT1
.1U_0402_16V7K AOZ1331DI_DFN14-10
10mil 1 2 5VS_ON 2 1
R926 330P_0402_50V7K
0701 update 120K_0402_5% C967
1 2
C979
.1U_0402_16V7K 0718: change the other part to SA00006U300

P11 is GND pad

JP38JP@ Rise Time:


+1.8VS_OUT +1.8VS 1.8V@330pF = 485.28us +1.8VS +1.35VS
+1.8VALW 1.35V@330pF = 363.96us
VIH=1.2~5.5V +1.35V JUMP_43X79
3.3V@82k/0.1uF=3.042ms 1 2 C1124 2 1@ .1U_0402_16V7K
1 2 C1145 @ U12
3.3V@47k/0.1uF=1.893ms C1146 @ 1U_0402_6.3V6K 1 10 JP39JP@
IN1 OUT1 1 1
1U_0402_6.3V6K 5 6 +1.35VS_OUT +1.35VS @ @
IN2 OUT2 11 C1147 C1148
R1055 3 VCC_PAD JUMP_43X79 1U_0402_6.3V6K 1U_0402_6.3V6K
2 +5VALW VBIAS 2 2 2
82K_0402_5% 8 C1123 C1126 2 1@ .1U_0402_16V7K
SUSP# 2 1 1.8VS_ON 2 GND 7 2 1 330P_0402_50V7K
4 ON1 CT2 9
C1125 1 2 ON2 CT1
.1U_0402_16V7K AOZ1331DI_DFN14-10
10mil 2 1 1.35VS_ON 2 1
R1056 330P_0402_50V7K
0701 update 47K_0402_5% C1127
1 2
C1128
.1U_0402_16V7K 0718: change the other part to SA00006U300

+1.0VALW TO +1.0VS

0708:Change to SB00000PZ00 / need apply footprint


+5VALW +1.0VALW U60 +1.0VS
ME4856_SO8
8 1 +0.675VS +1.05VS
2 7 2 2
C1129 6 3 C1130
1

1
4.7U_0603_6.3V6K 5 4.7U_0603_6.3V6K
R2314 R2315
R10 1 1 22_0603_5% 470_0603_5%
4

2
100K_0402_5% @
@
2

1 2

1 2
SUSP R1052
3 470_0603_5% 3
1

+5VALW D D

1
D 2 SUSP 2 SUSP
SUSP# 2 Q8 2 1 1.0VS_GATE +1.0VS_R G G

1
G 2N7002K_SOT23-3 0618 update R1061 S Q2307 S Q2308
S 10K_0402_5% 1 D 2N7002K_SOT23-3 2N7002K_SOT23-3

3
1

C1131 2 SUSP @
3

R16 D .1U_0402_16V7K G
100K_0402_5% SUSP 2 S Q71 @
G 2 2N7002K_SOT23-3
3

Q70 S
2

2N7002K_SOT23-3
3

For Intel S3 Power Reduction

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/10/24 Deciphered Date 2015/10/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DC/DC Interface
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B912P
Date: Wednesday, January 21, 2015 Sheet 30 of 42
A B C D E
5 4 3 2 1

Main Func = Thermal Sensor


Fintek thermal sensor +3VS

placed near by TOP DDR3

1
+3VS +3VS

Vinafix.com R2449 R2451

1
2.2K_0402_5% 2.2K_0402_5%
R2448

2
U2407 10K_0402_5%
D @ D

2
1 10
VCC SCL THERMAL_SMB_CK2 32
REMOTE1+ 2 9
DP1 SDA THERMAL_SMB_DA2 32
1
C2498 REMOTE1- 3 8
0.1U_0402_10V6K DN1 ALERT#
REMOTE2+ 4 7 R2450 1 @ 2MAINPWON
2 DP2 THERM# T217
0_0402_5%
REMOTE2- 5 6
DN2 GND

Address 1001_101xb
2nd source
SA000029210-->EMC1403-2-AIZL-TR

REMOTE1,2 (+/-) :
REMOTE1+ BOTTOM DDR3
Close U2407 Trace width/space:10/10 mil

1
REMOTE1+ C
1 @ C2500 2 Q2407 Trace length:<8"
2200P_0402_25V7K B MMST3904-7-F_SOT323-3

2
C2502 E

3
2200P_0402_25V7K REMOTE1-
2 REMOTE1-

REMOTE2+

C
1
REMOTE2+ BOTTOM CPU C
C2504
1

1
2200P_0402_25V7K C
2 REMOTE2- @ C2505 2 Q2408
2200P_0402_25V7K B MMST3904-7-F_SOT323-3
2

3
REMOTE2-

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/10/24 Deciphered Date 2015/10/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
GCLK
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B912P
Date: Wednesday, January 21, 2015 Sheet 31 of 42
5 4 3 2 1
5 4 3 2 1

Main Func = KBC SD028000080 0_0402_5%


SD034120280 12K_0402_1%
+3VALW_EC +3VALW_EC SD034100300 27K_0402_1%
Board ID1 Board ID0
SD034430280 43K_0402_1%

2
@
+1.8VALW RE11 RE3 SD034560280 56K_0402_1%
EMC@ Ra 100K_0402_1% Ra 100K_0402_1%
LE1 +EC_VCCA SD034750280 75K_0402_1%
FBMA-L11-160808-800LMT_0603
SD034100380 100K_0402_1%
Vinafix.com

1
1

@ AD_BID1 AD_BID0
RE25 2 1 +3VALW_EC 1 2 +EC_VCCA
0_0603_5%
+3VALW
RE6 0_0805_5% 1 1 2 2 @ 1 @ 1
SD034130380 130K_0402_1%

2
CE1 CE2 NEMC@ NEMC@
D
@
0.1U_0402_10V7K 0.1U_0402_10V7K CE5 CE6 +3VLP
1
CE7 Rb RE7 CE10 Rb RE5 CE8 SD034160380 160K_0402_1% D
2

1000P_0402_50V7K 1000P_0402_50V7K 0.1U_0402_10V7K 0.1U_0402_10V7K 0.1U_0402_10V7K


2 2 1 1
0_0402_5%
2
20K_0402_1%
2 SD034200380 200K_0402_1%

+VCC_LPC
+VCC_LPC 2
SD000001B80 240K_0402_1%

1
ECAGND
SD00000G280 270K_0402_1%
SD034330380 330K_0402_1%

111
125
22
33
96

67
UE1

9
SD028430380 430K_0402_1%

VCC0
VCC_LPC
VCC
VCC
VCC

VCC

AVCC
PLT_RST#
1
SD034330280 33K_0402_1%
CE36 NESD@
1 21 VCCST_PG_EC
2 GATEA20/GPIO00 EC_VCCST_PG/GPIO0F 23 T209
0.047U_0402_16V4Z KB_RST# BEEP#
2 17 KB_RST# 3 KBRST#/GPIO01 BEEP#/GPIO10 26 BEEP# 23
SERIRQ
17 SERIRQ LPC_FRAME# 4 SERIRQ EC_FAN_PWM/GPIO12 27 ACOFF
12 LPC_FRAME# LPC_FRAME# PWM Output AC_OFF/GPIO13 ACOFF 40
Place CC30 LPC_AD3 5
12 LPC_AD3 7 LPC_AD3 2 1 100P_0402_50V8J ECAGND
LPC_AD2 CE9
close to RC51.1 NEMC@
12 LPC_AD2
LPC_AD1 8 LPC_AD2 63 BATT_TEMP
12 LPC_AD1 10 LPC_AD1 VCIN1_BATT_TEMP/AD0/GPIO38 64 BATT_TEMP 34,40
CE12 0.1U_0402_10V7K LPC_AD0 LPC & MISC VCIN1_BATT_DROP +3VS_TP
2 1 1 NEMC@ 2 12 LPC_AD0 LPC_AD0 VCIN1_BATT_DROP/AD1/GPIO39 65 VCIN1_BATT_DROP 34
ADP_I
12 ADP_I/AD2/GPIO3A 66 ADP_I 34,40
R2354 0_0402_5% LPC_CLK_EC AD Input AD_BID0
12 LPC_CLK_EC 13 CLK_PCI_EC AD_BID/AD3/GPIO3B 75 2 1
PLT_RST# AD_BID1 TP_CLK
11,28 PLT_RST# 37 PCIRST#/GPIO05 AD4/GPIO42 76 PANEL_BKLEN 4.7K_0402_5% RE9
20 EC_RST# AD5/GPIO43 PANEL_BKLEN 17 2 1
EC_SCI# TP_DATA
17 EC_SCI# 38 EC_SCI#/GPIO0E
PTP_DIS# 4.7K_0402_5% RE10
29 PTP_DIS# CLKRUN#/GPIO1D
68 EN_INVPWR
DA0/GPIO3C 70 T197
DA Output EN_DFAN1
55 EN_DFAN1/DA1/GPIO3D 71 EN_DFAN1 29
KSI0
LPC_CLKRUN# 1 @ 2 PTP_DIS# KSI1 56 KSI0/GPIO30 DA2/GPIO3E 72 LCD_TEST
12 LPC_CLKRUN# 57 KSI1/GPIO31 DA3/GPIO3F LCD_TEST 20
RX4 0_0402_5% KSI2
KSI3 58 KSI2/GPIO32 83 EC_MUTE#
+3VALW_EC KSI[0..7] 59 KSI3/GPIO33 EC_MUTE#/PSCLK1/GPIO4A 84 EC_MUTE# 23
KSI4 USB_EN# VR_ON
29 KSI[0..7] 60 KSI4/GPIO34 USB_EN#/PSDAT1/GPIO4B 85 USB_EN# 25
KSI5 1
KSO[0..16] KSI6 61 KSI5/GPIO35 PSCLK2/GPIO4C 86 WLAN_WAKE# TP_EN 29 CE34 ESD@
C 29 KSO[0..16] KSI6/GPIO36 PS2 Interface PSDAT2/GPIO4D WLAN_WAKE# 28 C
R488 1 2 10K_0402_5% EC_SMI# KSI7 62 87 TP_CLK
KSI7/GPIO37 TP_CLK/GPIO4E TP_CLK 29
@ KSO0 39 88 TP_DATA 0.1U_0402_10V7K
40 KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA 29 2
KSO1
KSO2 41 KSO1/GPIO21
KSO3 42 KSO2/GPIO22 97 VGATE @
KSO4 43 KSO3/GPIO23 ENKBL/GPXIOA00 98 WL_OFF#_EC
VGATE 39 1 2
Place CE34
KSO5 44 KSO4/GPIO24 WOL_EN/GPXIOA01 99 TXE_DBG RE14 0_0402_5%
WL_OFF# 10,28 between DE1 and RE12
+3VALW_EC KSO6 45 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 109 VCIN0_PH
TXE_DBG 10
KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH1/GPXIOD00 VCIN0_PH 34
+3VS RP36 KSO8 47 KSO7/GPIO27 VCCST_PG_EC
KSO8/GPIO28 SPI Device Interface
5 4 EC_SMB_CK1 KSO9 48 119 1
6 3 EC_SMB_DA1 KSO10 49 KSO9/GPIO29 MISO/GPIO5B 120 CE35
7 2 EC_SMB_CK2 KSO11 50 KSO10/GPIO2A MOSI/GPIO5C 126 @
KSO11/GPIO2B SPI Flash ROM SPICLK/GPIO58
8 1 EC_SMB_DA2 KSO12 51 128 220P_0402_50V8J
KSO13 52 KSO12/GPIO2C SPICS#/GPIO5A 2
2.2K_0804_8P4R_5% KSO14 53 KSO13/GPIO2D
KSO15 54 KSO14/GPIO2E 73 ERP_LOT6
81 KSO15/GPIO2F EC_CIR_RX/AD6/GPIO40 74 ERP_LOT6 34 Place CE35
KSO16 EC_TP_INT#
2 1 PMC_CORE_PWROK 82 KSO16/GPIO48 SYS_PWROK/AD7/GPIO41 89 DBC_EN
EC_TP_INT# 29 between DE1 and UE1
T212 KSO17/GPIO49 GPIO50 90 DBC_EN 20
RE18 100K_0402_1%
BATT_CHG_LED#/GPIO52 91 CAPS_LED
77 CAPS_LED#/GPIO53 92 CAPS_LED 29
EC_SMB_CK1 GPIO PWR_PWM_LED#
34,40 EC_SMB_CK1 78 EC_SMB_CLK1/GPIO44 PWR_LED#/GPIO54 93 PWR_PWM_LED# 28
Charger EC_SMB_DA1 BATT_LOW_LED# BATT_LOW_LED# 28
34,40 EC_SMB_DA1 79 EC_SMB_DAT1/GPIO45 BATT_LOW_LED#/GPIO55 95
EC_SMB_CK2_EC SYSON
80 EC_SMB_CLK2/GPIO46 SYSON/GPIO56 121 1 2 SYSON 36
EC_SMB_DA2_EC VR_ON_EC @ VR_ON
EC_SMB_DAT2/GPIO47 VR_ON/GPIO57 127 VR_ON 39
RE12 0_0402_1% 1
DPWROK_EC/GPIO59

2
SM Bus @
EC_SMB_CK2 1 @ 2 EC_SMB_CK2_EC RE1 CE26
12,18,29 EC_SMB_CK2 1 2 6 100
EC_SMB_DA2 RE15 0_0402_5% EC_SMB_DA2_EC SIO_SLP_S3# EC_RSMRST# 10K_0402_5% 0.1U_0402_10V7K
12,18,29 EC_SMB_DA2 17 SIO_SLP_S3# 14 PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 101 EC_RSMRST# 11,16 2
RE16 @ 0_0402_5% EC_LID_OUT#
1 2 15 GPIO07 GPXIOA04 102 EC_LID_OUT# 17
@ EC_SMI# VCIN1_PROCHOT
31 THERMAL_SMB_CK2 17 EC_SMI# VCIN1_PROCHOT 34

1
1
RE22 @ 2
0_0402_1% PS_ID 16 GPIO08 VCIN1_ADP_PROCHOT/GPXIOA05 103 VCOUT1_PH
31 THERMAL_SMB_DA2 34 PS_ID 17 GPIO0A VCOUT1_PROCHOT#/GPXIOA06 104 VCOUT1_PH 34
RE23 0_0402_1% VCOUT0_PH
18 GPIO0B VCOUT0_MAIN_PWR_ON/GPXIOA07 105 VCOUT0_PH 35
SPOK BKOFF#
35,37,38 SPOK 19 GPIO0C BKOFF#/GPXIOA08 106 BKOFF# 20
TS_EN GPIO GPO +1.05V_PGOOD
20 TS_EN 25 AC_PRESENT/GPIO0D GPXIOA09 107 2 1 T210
28 PWM2/GPIO11 PCH_PWR_EN/GPXIOA10 108 T218
B FAN_SPEED1 ACIN_65W RE36 43_0402_1% B
29 FAN_SPEED1 29 FAN_SPEED1/GPIO14 PWR_VCCST_PG/GPXIOA11 T221
TOUCH_RST#
20 TOUCH_RST# 30 FANFB1/GPIO15
28 EC_TX EC_TX NESD@
EC_RX 31 EC_TX/GPIO16 110 ACIN PMC_CORE_PWROK 1 2
Reserve for ESD 28 EC_RX
PMC_CORE_PWROK 32 EC_RX/GPIO17 VCIN1_AC_IN/GPXIOD01 112 EC_ON
ACIN 11,34,40
CE31 0.1U_0402_10V7K
11,16 PMC_CORE_PWROK 34 PCH_PWROK/GPIO18 EC_ON/GPXIOD02 114 EC_ON 35 1 2
AD_I_HW2 ON/OFFBTN# @ SATA_LED#_R
2 1 34 AD_I_HW2 36 SUSP_LED#/GPIO19 ON/OFF#/GPXIOD03 115 ON/OFFBTN# 29 SATA_LED#_R 28
SIO_SLP_S3# AD_I_HW1 GPI LID_SW# RD15 0_0402_1%
34 AD_I_HW1 NUM_LED#/GPIO1A LID_SW#/GPXIOD04 116 LID_SW# 20,29
SUSP#
SUSP#/GPXIOD05 117 SUSP# 30,36,37,38 1 2
CE27 NESD@ @
0.1U_0402_10V7K GPXIOD06 118 PECI_KB9012 1 2 RX5 0_0402_1% SOC_SATALED# 10,28
122 PECI/GPXIOD07 T203 +1.8VALW
PBTN_OUT# RE43 @ 43_0402_1%
2 1 17 PBTN_OUT# 123 PBTN_OUT#/GPIO5D 124 2 1
SIO_SLP_S4# SIO_SLP_S4# +V18R @
17 SIO_SLP_S4# PM_SLP_S4#/GPIO5E V18R/VCC_IO2
1 RE21 0_0603_5%
AGND

CE28 NESD@ CE16


GND
GND
GND
GND
GND

0.1U_0402_10V7K Place CE31 close to UE1


Please close to EC 9012@ 4.7U_0805_10V4Z
2
11
24
35
94
113

69

LE2
ECAGND 2 1 ACIN 2 1
FAN_SPEED1 FBMA-L11-160808-800LMT_0603 CE18 100P_0402_50V8J

CE29
1 20mil
+3VALW_EC
220P_0402_50V8J
2

2
Please close to EC @ @
R696 R697
VR_HOT# 10K_0402_5% 10K_0402_5%
39 VR_HOT#

1
1

VCIN0_PH
R44 VCIN1_PROCHOT
0_0402_1%
A @ A
2

10,34 H_PROCHOT# H_PROCHOT# 1 @ 2 VCOUT1_PH


RE13 0_0402_1%

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/10/24 Deciphered Date 2015/10/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EC ENE-KB9012
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B912P
Date: Wednesday, January 21, 2015 Sheet 32 of 42
5 4 3 2 1
5 4 3 2 1

Main Func = Screw hole

Vinafix.com
D D

CLIP1
1 @
1
EMIST-SQ-26G_1P

Screw Hole 1
CLIP2

1
@

EMIST_SQ-55G_1P

H1 H2 H3 H4
H_3P2 H_4P0N H_3P0 H_3P0 CLIP3
@ @ @ @ 1 @
1
1

1
EMIST_SQ-55G_1P
H9 H10 H7
C H_3P0 H_3P0 H_3P0x3P8N C
@ @ @
1

H5 H6 H11 H12
H_3P3 H_3P3 H_3P3 H_3P3
@ @ @ @ CPU StandOff
1

FD1 FD2 FD3 FD4


B @ FIDUCAL @ FIDUCIAL @ FIDUCAL @ FIDUCIAL B
1

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/10/24 Deciphered Date 2015/10/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Screw Hole
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B912P
Date: Wednesday, January 21, 2015 Sheet 33 of 42
5 4 3 2 1
A B C D

EMI@
PL1
VIN PSID@ PR1
PSID@

FBMJ4516HS720NT_2P 33_0402_5%
@ PJPDC1 ADPIN 1 2 1 3 PSID-3 1 2 PS_ID 32

S
PQ1
8 EMI@ FDV301N_G 1N SOT23-3
GND 7 EMI@ EMI@

1000P_0402_50V7K

1000P_0402_50V7K

G
2
GND

1
100K_0402_1%
EMI@ PSID@

100P_0402_50V8J

100P_0402_50V8J
PR3

2
6 PSID@ PR4
6

Vinafix.com

PC1

PC2

PC3

PC4

PR2
5 PSID-2 2 1 2.2K_0402_5%
5 +5VALW
4 @EMI@ PL2

2
4 3 FBMJ4516HS720NT_2P 10K_0402_1%

2
3 2 1 2 PSID@ +3VALW

1
2

1
1 1 C 1
1 @ PJP1 2
PSID-1 PQ2
1 2 B

15K_0402_1%
PSID@ MMST3904-7-F_SOT323~D

2
ACES_50458-00601-001 E

3
PR5
PSID@
PAD-OPEN 1x3m
PL3
BLM15AG102SN1D_2P

1
PSID 2 1
EMI@

@ PJP4
BATT+ 1 2 BATT++
1 2
JUMP_43X79
@EMI@
BATT+

PL4
FBMJ4516HS720NT_2P
1 2 BATT++
1

1000P_0402_50V7K
0.01U_0402_25V7K
1

PC6
PC5

1
2

1
PD2 EMI@
PD1 EMI@ TVNST52302AB0_SOT523-3
TVNST52302AB0_SOT523-3

3
2

3
SMART 2015/1/16
BATT_TEMP 32,40
Battery: @ PBATT1
1
01.GND 1 2 PR6 PR7
2
2
02.GND 3
3 SYS_PRES 200_0402_5% 10K_0402_1% 2
4 BATT_PRS 1 2 1 2
03.SYS_PRES 4 5 DAT_SMB +3VALW
5
04.BATT_PRS 6
6 CLK_SMB
7
05.DAT_SMB 7 8
8 9
06.CLK_SMB GND
PR8
10 100_0402_5%
07.BATT1+ GND 1 2 EC_SMB_CK1 32,40
08.BATT2+ SUYIN_200277GR008M270ZR

1 2 EC_SMB_DA1 32,40
PR9
100_0402_5%
CPU thermal protection at 91 +/- 3 degree C ( shutdown )
Other component (37.1)
+EC_VCCA ADP_I 32,40
Erp lot6 Circuit VIN

1
Delay adaptor OC H_PROCHOT# PR10
16.9K_0402_1%
PR11
30.1K_0402_1%
3.3K_1206_5%~D

2ms while hybrid power @


1

ERP_LOT6 32
PR13

2
transition 2 1
PR12

H_PROCHOT# H_PROCHOT# 10,32 32 VCIN0_PH


0_0402_5% @
PR14 PR15
2

ACIN 11,32,40 1 2
VCIN1_PROCHOT 32
3 2

1M_0402_1%
0_0402_5%
@
6

PR17
L2N7002DW1T1G_SC88-6

1
PQ3B

160K_0402_1%
1

L2N7002DW1T1G_SC88-6
1

5 PR22 PR23
PQ4A

@ PR16 VCOUT1_PH 1 2 2 60.4K_0402_1% 115K_0402_1%


6

1 2 VCOUT1_PH 32
L2N7002DW1T1G_SC88-6

0.01U_0402_25V7K
4

200K_0402_1% @ PR18

2
1
PQ3A

10K_0402_1%
1

PR19
PC9

DMN66D0LDW-7 2N SOT363-6
2

1
3 3
2

0.01U_0402_25V7K
DMN66D0LDW-7 2N SOT363-6
1

1
10K_0402_1%

1M_0402_1%
1

1
1

PR21 1

PQ10B
2

PC12
@ PC8 @ @ PC7
1

PQ10A
PH1 1000P_0402_50V7K PR20

2
0.1U_0402_25V6 100K 1% 0402 B25/50 4250K 5 787K_0402_1%

2
@
2

2
4
2

1
B+
Adapter protection:
if battery removed, adaptor only, 32 AD_I_HW2
32 AD_I_HW1
then trigger the H_PROCHOT#,
2

keep @ in BOM since battery can not @ PR34


be removed by end user 80.6K_0402_1%
ADP_I(with selector) to support "PWC" function.
1

@ PR36
0_0402_5%
H_PROCHOT# 1 2 VCIN1_BATT_DROP 32
H_PROCHOT# AD_I_HW1 AD_I_HW2

35W 0 0
1
3

PC11 @ PR35
.1U_0402_16V7K @ PC10 45W 1 0
L2N7002DW1T1G_SC88-6

10K_0402_1%
PQ4B

BATT_TEMP 1 2 5 0.1U_0402_25V6
2

55W 0 1
100K_0402_1%

4
1
PR26

65W 1 1
4 4
2

DELL CONFIDENTIAL/PROPRIETARY
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/02/26 Deciphered Date 2015/02/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P34-PWR_DCIN/BATT CONN/OTP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B912P
Date: Wednesday, January 21, 2015 Sheet 34 of 42
A B C D
A B C D E

5VALWP
3VALWP TDC 5.03A
TDC 3.64A Peak Current 7.18A
Peak Current 5.2A OCP current 9.33A
OCP current 6.76A

Vinafix.com +3VLP
PC105
1U_0603_10V6K
1 2
1 1

@ PC106 @PC107
@ PC107
100P_0402_50V8J 100P_0402_50V8J
1 2 1 2

PR100 PR101
6.49K_0402_1% 15K_0402_1%
1 2 1 2
VFB=2V VFB=2V

PR102 PR103
10K_0402_1% 10K_0402_1%
1 2 1 2

@PJP102
JUMP_43X118
1 2
1 2 B+_3/5V
PR104 PR105
133K_0402_1% 180K_0402_1%
PL102 @EMI@ 1 2 1 2
FBMJ4516HS720NT_2P
B+ 1 2 B+_3/5V

10U 25V K X5R 0805


1

PC108
FB_3V

FB_5V
2200P_0402_50V7K

CS2

CS1
0.1U_0402_25V6

10U 25V K X5R 0805

PU100

2
1

1
@ PC109

PC110

PC111

TPS51225CRUKR QFN 20P PWM

5
5

1
2 PR106 2
2

10K_0402_5%

CS2

VFB2

VREG3

VFB1

CS1
+3VALWP 1 2
PAD
21
EN_3V 6
EN2 20 EN_5V
PQ101 PQ102
4 EN1 @PR117
@ PR117 4
MDV1528URH_PDFN33-8-5 7 0_0402_5% MDV1528URH_PDFN33-8-5
32,37,38 SPOK PGOOD 19 1 2
VCLK
LX_3V 8

3
2
1
1
2
3

PL100 PC112 @ SW2 18 LX_5V


4.7UH_5.5A_20%_7X7X3_M 0.1U_0603_25V7K PR107 SW1 @ PC113 PL101
1 2 1 2 1 2 BST_3V 9 PR108 0.1U_0603_25V7K 4.7UH_5.5A_20%_7X7X3_M
+3VALWP VBST2 17 BST_5V 1 2 1 2 1 2
VBST1 +5VALWP
0_0603_5%
1
4.7_1206_5%

4.7_1206_5%
UG_3V 10 0_0603_5%
DRVH2

1
@ PR109

@ PR110
16 UG_5V

VREG5
DRVL2

DRVL1
DRVH1

VO1
5

5
VIN

ESR=15m ohm
150U_D2_6.3VY_R15M

150U_D2_6.3VY_R15M
PQ103 PQ104
1 SNB_3V 2
ESR=15m ohm

1 1

11

12

13

14

15

1 SNB_5V 2
MDV1527URH_POWERDFN33-8-5 MDV1527URH_POWERDFN33-8-5

680P_0603_50V8J
PC102

PC103
+ +
4 4
680P_0603_50V8J

LG_3V LG_5V

2 2
@ PC114

@ PC115
PR111
2.2_1206_1% +5VALWP
1
2
3

3
2
1
2

2
B+_3/5V 1 2
VL

1U_0603_25V6K

1U_0603_10V6K
1

1
@ PC116

PC117
3 3

2
@
PR112
EN_5V 1 2
0_0402_5%

EN @
Rising=1.6~0.3V @ EN_3V 1
PR113
2

0_0402_5% 0_0402_5%
PR114
1 2
32 VCOUT0_PH
PR115
2.2K_0402_1%
1 2 EN_5V3V
32 EC_ON
@PJP100
JUMP_43X118
+5VALWP 1 2 +5VALW
1 2
4.7U_0805_25V6-K
402K_0402_1%
1

1
@ PR116

PC118

@ PJP101
JUMP_43X118
4 +3VALWP 1 2 +3VALW 4
2

1 2
2

DELL CONFIDENTIAL/PROPRIETARY
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/02/26 Deciphered Date 2015/02/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P35-PWR-3.3VALWP/5VALWP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Custom
LA-B911P 0.2

Date: Wednesday, January 21, 2015 Sheet 35 of 42


A B C D E
A

1.35VP
TDC 1.8A Vinafix.com
Peak Current 2.57A
OCP current 3.34A

Pin19 need pull separate from +1.35VP.


If you have +1.35V and +0.675V sequence question, 0.675Volt +/- 5%
@ PJP200
JUMP_43X118
you can change from +1.35VP to +1.35VS. TDC 0.84A
1 2 B+_1.35VP @ Peak Current 1.2A
B+ 1 2 PR200

2200P_0402_50V7K
BST_1.35VP 1 2 BOOT_1.35VP

0.1U_0402_25V6

10U 25V K X5R 0805

10U 25V K X5R 0805


+1.35VP
1

1
@ PC203

PC204

PC205

PC206
0_0603_5%

2 DH_1.35VP +0.675VSP

2
SW_1.35VP

10U_0805_6.3V6K

10U_0805_6.3V6K
1

1
PC207

PC208

PC209
5
0.1U_0603_25V7K

16

17

18

19

20
2
PU200

2
BOOT

VTT
PHASE

UGATE

VLDOIN
21
PAD
PQ201 4 DL_1.35VP 15 1
MDV1528URH_PDFN33-8-5 LGATE VTTGND

14 2
PL200 PR201 PGND VTTSNS

1
2
3
1UH_11A_20%_7X7X3_M 6.2K_0402_1%
1 2 1 2 CS_1.35VP 13 3
+1.35VP PC210 CS RT8207MZQW_WQFN20_3X3 GND
1

1U_0603_10V6K

5
1 2 12 4 VTTREF_1.35VP
220U_D2_2VY_R15M

@ PR202 PR203 VDDP VTTREF


1
4.7_1206_5% 5.1_0603_5%
ESR=15m ohm

+
PC201

1 2 VDD_1.35VP 11 5
+5VALW +1.35VP
1 2

VDD VDDQ

1
PC212

PGOOD
2
4

TON
1
1
2 @ PC211 PC213 PR209 0.033U_0402_16V7K
1

FB
S5

S3

2
680P_0402_50V7K 2.2_0603_5% @ PC216
2

PQ203 1U_0603_10V6K 220P_0402_25V8J

10

6
1 2

1
1
2
3

MDV1527URH_POWERDFN33-8-5

FB_1.35VP
TON_1.35VP

EN_1.35VP

EN_0.675VSP
+5VALW PR204
8 DDR_PWROK 54.9K_0402_1%
PR205 1 2 +1.35VP
1 2 887K_0402_1%
+1.35VP B+_1.35VP 1 2
PR210

1
10K_0402_5%

PR206
@ PR207 68.1K_0402_1%
1 2

2
Mode Level +0.75VSP VTTREF_1.5V 32 SYSON
0_0402_5%
S5 L off off

1
@ PC214
S3 L off on 0.1U_0402_10V7K
S0 H on on

2
Note: S3 - sleep ; S5 - power off
PR208 @ PJP201
1 2 JUMP_43X118
30,32,37,38 SUSP# +1.35VP 1 2 +1.35V
0_0402_5% 1 2

1
@
@ PC215
0.1U_0402_10V7K

2
@ PJP202
JUMP_43X39
1 2
+0.675VSP 1 2 +0.675VS

DELL CONFIDENTIAL/PROPRIETARY
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/02/26 Deciphered Date 2015/02/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P36-PWR-1.35VP/0.675VSP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-B912P
Date: Sheet 36 of 42
A
5 4 3 2 1

PC300 @ PJP301
22U_0603_6.3V6M
1 2
1 2 +1.05VSP 1 2 +1.05VS
@ PJP300 PU300 PL300
JUMP_43X39
1UH +-20% 2.3A 2.5X2X1.2 FERRITE
+3VALW 1 2 4 3 LX_1.05VSP 1 2
1 2 IN LX +1.05VSP
5 2

68P_0402_50V8J
JUMP_43X39 PG GND

Vinafix.com

1
PC301
6 1

22U_0603_6.3V6M

22U_0603_6.3V6M
FB EN

1
@ PR301

PC302

PC303
SY8032ABC_SOT23-6

2
D PR300 4.7_0603_5% PR302 +1.05VSP D

2
2.55K_0402_1% 15K_0402_1%
30,32,36,38 SUSP#
1 2 +1.05VSP_ON TDC 0.7A

2
Rup Peak Current 1A

1
@ OCP current 3.5A

1
PR303 PC304 FB_1.05VSP
1M_0402_1% .1U_0402_16V7K

1
2

1
@ PC305 PR304
680P_0402_50V7K 20K_0402_1%
VFB=0.6V
Rdown

2
Vout=0.6V* (1+Rup/Rdown)

2
C C

PC307
22U_0603_6.3V6M

1 2
@ PJP302 PU301 PL301
1UH +-20% 2.3A 2.5X2X1.2 FERRIT
+3VALW 1 2 4 3 LX_1.0VALWP 1 2
1 2 IN LX +1.0VALWP
5 2

68P_0402_50V8J
JUMP_43X39 PG GND

1
PC310
6 1

22U_0603_6.3V6M

22U_0603_6.3V6M
FB EN

1
@ PR306

PC311

PC308
SY8032ABC_SOT23-6

2
PR308 4.7_0603_5% PR307

2
10K_0402_5% 13.7K_0402_1%
1 2 +1.0VALWP_ON
32,35,38 SPOK

2
Rup
1

@
1

PR305 PC309 FB_1.0VALWP


1M_0402_1% .1U_0402_16V7K
@ PJP303
2

1
B 1 2 B
+1.0VALWP
2

+1.0VALW
1

1 2
@ PC306 PR309
680P_0402_50V7K 20K_0402_1%
VFB=0.6V JUMP_43X79
Rdown
2

Vout=0.6V* (1+Rup/Rdown)

2
+1.0VALWP
TDC 1.51A
Peak Current 2.15A
OCP current 3.5A

A A

DELL CONFIDENTIAL/PROPRIETARY
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/02/26 Deciphered Date 2015/02/25 Title
P37-PWR-1.05VSP/1.0VALWP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Custom
LA-B911P 0.2

Date: Sheet 37 of 42
5 4 3 2 1
A B C D

PC400
22U_0603_6.3V6M

1 2 @ PJP401
PU400 PL400
1UH +-20% 2.3A 2.5X2X1.2 FERRITE
need re-link FB R 1 2
+3VALW +1.8VALWP +1.8VALW
Vinafix.com
1 2 4 3 LX_+1.8VSP 1 2 1 2
1 2 IN LX +1.8VALWP
5 2 JUMP_43X39

68P_0402_50V8J
@ PJP400 JUMP_43X39 PG GND

1
1 1
6 1

PC401

22U_0603_6.3V6M

22U_0603_6.3V6M
FB EN

1
@ PR401

PC402

PC403
SY8032ABC_SOT23-6

2
PR400 4.7_0603_5% PR402

2
20K_0402_1% 40.2K_0402_1%
1 2 +1.8VSP_ON
32,35,37 SPOK +1.8VALWP

2
Rup
TDC 0.62A

1
@ PR403 PC404 FB_+1.8VSP Peak Current 0.88A
1M_0402_1% .1U_0402_16V7K
OCP current 3.5A

1
2

1
@ PC405 PR404
680P_0402_50V7K 20K_0402_1%
VFB=0.6V
Rdown

2
Vout=0.6V* (1+Rup/Rdown)

2
Vout=1.806V

2 2

+1.8VALW +5VALW
1

PC411
1

1U_0402_6.3V6K
JUMP_43X39
2
2

@ PJP404
2

PC412 PU402
1

APL5930KAI-TRG_SO8
4.7U_0603_6.3V6K 6
5 VCNTL 3 @ PJP405
2

PR409 9 VIN VOUT 4


51.1K_0402_1% VIN VOUT
+1.5VSP +1.5VSP 1
1 2
2 +1.5VS

1
1 2 8

17.8K_0402_1%
30,32,36,37 SUSP# EN

1
7 2
GND

POK FB JUMP_43X39

PR410
PC413
1

0.01U_0402_25V7K
Rup
.1U_0402_16V7K

1
3 3
PC415

PC414
1

2
@ PR411 22U_0603_6.3V6M
2

100K_0402_1%

2
2

1
+1.5VSP
TDC 0.81A
PR412
Rdown 20K_0402_1% Peak Current 1.15A
OCP current 3A
2

Vout=0.8V* (1+Rup/Rdown)
Vout=1.512V

4 4

DELL CONFIDENTIAL/PROPRIETARY
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/02/26 Deciphered Date 2015/02/25 Title
P38-PWR-1.8VALW/1.5VSP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

LA-B911P
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: W ednesday, January 21, 2015 Sheet 38 of 42
A B C D
5 4 3 2 1

+SOC_VNN

1
@ PC502
1000P_0402_50V7K Imax = 9.8A

2
14 VGFX_VSNS
Ipeak = 14A
Iocp(minimum) = 21A

1
PC503
0.01UF_0402_25V7K

2
VCORE_GSNS

Vinafix.com CPU_B+

D PC504 PC505 D
120P_0402_50V8J
470P_0402_50V7K
PC506 1 2 1 2 1 2
6800P_0402_25V7K PR501

10U 25V K X5R 0805


10U 25V K X5R 0805
PC507 499_0402_1%
1 2

2200P_0402_50V7K
1000P_0402_50V8-J

1
2K_0402_1%

PC509

PC510
1 2 1 2 1 2 @

1
@ PC508
PR503 PR504 PR506

PR502

1
137K_0402_1% 2.05K_0402_1% 0_0603_5%
Close GFX choke

2
UGATEG1-1 2 1 UGATEG1

2
21K_0402_1%
PH500 PR507
PR505

1
PR508
10K 1% 0402 B25/50 3370K 215_0402_1%
1 2 2K_0402_1% PC515
VSUMG-

1 2
1
0.1U_0603_25V7K 0.22uH DCR= 0.98+-5% m ohm

1
2 12 1 BOOTG
PC511
+3VALW PL500

D1

D1

D1

G1
0.033U 25V K X7R 0402

2
.1U_0402_16V7K 820PF_0402_50V7K PR511 @ +SOC_VNN

2
0.22UH_24A_20%_7X7X4_MOLDING
1

11K_0402_1%
PC512 0_0603_5%

0.1U_0603_25V7K
1 2

1
10 9 1 4

2.61K_0402_1%

1.91K_0402_1%
PHASEG
D1 D2/S1

1
PC514
PR509

PC513
2

2 3
PR500 BOOTG PQ501

G2
S2

S2

S2
2

1
AON7934_DFN3X3A-8-10

2
2 UGATEG1

1
LGATEG PR512 @
VSUMG+ PHASEG 4.7_0603_5%
3.65K_0603_1%

PR510

1 2
PR513
Close GFX L/S MOS LGATEG +5VALW

2
PU500 PC516 @

33

32

31

30

29

28

27

26

25
PR514 680P_0402_50V7K

VSUMG+
61.9K_0402_1%

VSUMG-
ISUMPG

ISUMNG

RTNG

FBG

COMPG

PGOODG

BOOTG

UGATEG
PAD
C C
1 2

1U_0603_10V6K
PR515 PR518

1
3.83K_0402_1% 0_0603_5%

1
1 2
PH501 NTCG_1 1 2 NTCG 1 24 PR519

PC517
@ NTCG PHASEG @ 1_0603_5%
PR516
1 2 470K +-5% 0402 B25/50 4700K VR_ON_R 2 23 @ PJP500
32 VR_ON

2
VR_ON LGATEG 1 2

2
0_0402_5% 1 2

1
1 PR520 2 VR_SVID_CLK_R 3 22
11 VR_SVID_CLK SCLK VCCP
20_0402_1% JUMP_43X79
PR521 VR_SVID_ALERT# 4 ISL95833HRTZ-T_TQFN32_4X4 21
11 VR_SVID_ALERT# ALERT# VDD

1U_0603_10V6K
16.9_0402_1% @ PR522 1.91K_0402_1% PL502

PC518
1 2 VR_SVID_DATA_R 5 20 1 2 HCB2012KF-121T50_0805
11 VR_SVID_DATA SDA PW M2

1
1 2
CPU_B+ B+
6 19 LGATE1
32 VR_HOT# VR_HOT# LGATE1

0.1U_0402_25V6
@EMI@

10U 25V K X5R 0805

10U 25V K X5R 0805


1 1

2
7 18
3.83K_0402_1%

NTC PHASE1
NTC PHASE1
1

+ +

33U_D2_25VM_R40M

33U_D2_25VM_R40M
For VR_HOT#, already PR524

1
PR523

PC522

PC519

PC501

PC536
1 2 8 17

PGOOD

PC521
pull high at power side.

BOOT1
ISUMN
ISUMP
ISEN2 UGATE1

COMP
ISEN1

RTN
0_0402_5%
1

@ PC520 2 2
499_0402_1%

69.8_0402_1%

69.8_0402_1%

FB
470K +-5% 0402 B25/50 4700K

2
1

47P_0402_50V8J @
2

@
PR525

PR526

PR527

UGATE1
2

10

11

12

13

14

15

16
NTC_1 @
PH502

61.9K_0402_1%

BOOT1 PR528
UGATE1-1 2 1 UGATE1 @ @
2

@
+5VALW VGATE 32
PR529

0_0603_5%
@
+1.0VS 1 2 +3VALW PC524 PR531 0.22uH DCR= 0.98+-5% m ohm

1
2 1 2 1 BOOT1
1

2
1

1.91K_0402_1% PR530 PL501

D1

D1

D1

G1
B B
@ PC523 0.1U_0603_25V7K 0_0603_5% +SOC_VCC
0.1U_0402_16V7K 0.22UH_24A_20%_7X7X4_MOLDING
2

10 9 PHASE1 1 4
D1 D2/S1
Close CPU L/S MOS

1
2 3

680P_0402_50V7K 4.7_0603_5%
PQ503

@ PR532
G2
S2

S2

S2
AON7934_DFN3X3A-8-10

8
PC525 PR533 PR534

2
820PF_0402_50V7K 2K_0402_1% 64.9K_0402_1% VSUM+ LGATE1

1
1 2 1 2 1 2

2.61K_0402_1%
1

PC526 @
1
3.65K_0603_1%

PR535
PR536

11K_0402_1%
2K_0402_1%

PC527 PC528
0.033U 25V K X7R 0402

2
1
PR539

470P_0402_50V7K 180P_0402_50V8J
0.1U_0603_25V7K

2
1

1
182_0402_1%

PC529

1 2 1 2 1 2
1

1
PR540

PR538
PC530

499_0402_1% 1 PH503
10K 1% 0402 B25/50 3370K
2

PR541

VSUM+
Close CPU choke
2

2
6800P_0402_25V7K

PR542 PC531
1
PC532

1.78K_0402_1% 1000P_0402_50V8-J
1 2 1 2 1 2
2

PR543 +SOC_VCC VSUM-


2

137K_0402_1%
VSUM- Imax = 8.4A
.1U_0402_16V7K

@ PC533
330P_0402_50V7K Ipeak = 12A
1

PC534

1 2
Iocp(minimum) = 18A
A A
2

14 VCORE_VSNS 1 2
DELL CONFIDENTIAL/PROPRIETARY
PC535
0.01UF_0402_25V7K
14 VCORE_GSNS Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/02/26 Deciphered Date 2015/02/25 Title
P39-PWR-CPU_CORE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
LA-B911P
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Sheet 39 of 42
5 4 3 2 1
A B C D

VIN
PQ705 Iada=0~3.34A(65W)
PQ704 SI4483ADY_SO8 P3
AO4407AL_SO8 P2
8 1 1 8 ADP_I = Iadapter*Rsense*Current sense amplifier vlotage gain
7 2 2 7
6 3 3 6
5 5
PR700 B+ PQ706
0.01_1206_1% AO4407AL_SO8

4
1 8

Vinafix.com 1 4 2 7

1
3 6

0.1U_0603_25V7K
3

1
PQ707 2 3 CSIN @PJP700 5

200K_0402_1%
PC700

PR701
LMUN5113T1G PNP SOT323-3 JUMP_43X118

5600P_0402_25V7K
1

1 1
CSIP 1 2

4
1 2

2
2

PC701
200K_0402_1%

2
CHG_B+
PR702

PL701
1UH_2.8A_30%_4X4X2_F

1
1 2
2

@EMI@

2200P_0402_25V7K

0.1U_0603_25V7K
1
PQ708

10U_0805_25V6K

10U_0805_25V6K
LMUN5236T1G NPN SOT323-3

PC702

PC703
10_0402_5%

10_0402_5%
@

1
V1 2 VIN
1

1
PR704

PR705

PC704

PC705
PR703

0.1U_0603_25V7K

2
150K_0402_1%

DMN66D0LDW-7 2N SOT363-6
PR706

0.1U_0603_25V7K
3

3
200K_0402_1%
2

2
1 2
VIN

2
PQ710B
PR707
DMN66D0LDW-7 2N SOT363-6

2
5

PC706

PC707
BATT_TEMP 10_1206_1%
6

2
1 2 PC709

0.1U_0402_10V7K

1
1

2
ISL88731_ICREF
PC708
PQ709A

PQ709B 0.047U_0603_25V7M PC710

1
1
5 DMN66D0LDW -7 2N SOT363-6 1 2 1U_0603_10V6K PR708

1
2 PC711 47K_0402_1%

2
1 VDDP_LDO

@ 1U_0603_25V6K PR709
4

2
4.7_0603_5%
1

1 1
VIN 2 1

232K_0402_1%
PC712 @ PC713

LMUN5236T1G NPN SOT323-3


2
0.01U_0402_50V7K PR713 0.1U_0603_25V7K
100K_0402_1%

28

27
PR714

1
PU700

PQ711
1 2

PR711
2 1 BST_CHGA 1 2
PR710

2 1 2 V1

ICREF

CSSP

CSSN
2 DCIN 22 26 0_0603_5% 2

DCIN ICOUT
PR715

1
1 2 ACSETIN 2 100K_0402_1%
ACIN
2

MDV1525URH 1N PDFN33-8
5
PR712 25 BST 1 2
BOOT

3
200K_0402_5% ACIN 49.9K_0402_1% 13
11,32,34 ACIN ACOK
ACIN 1 2 +5VALW PC714
1

11 1U_0603_10V6K
158K_0402_1%

VDDSMB

PQ701
PR716

0.1U_0402_10V7K

@
LMUN5236T1G NPN SOT323-3

10 4
PR717 SCL
1

32,34 EC_SMB_CK1
1

PC715

1 2
9 21 VDDP_LDO
SDA VDDP
2

0_0402_5% PR720
2

ACOFF 32 14
PR718 @ PR719 PL700
NC

3
2
1
32,34 EC_SMB_DA1 24 DH_CHG
PQ712

1 2 2 1 2 0.01_1206_1%
UGATE
0_0402_5%
8
VICM 23 LX_CHG
10UH_3.5A_20%_7X7X3_M BATT+
1 2 CHG
1 4
10K_0402_5% 6 PHASE

4.7_1206_5%
FBO
2 3
DMN66D0LDW-7 2N SOT363-6

1
5
EAI

MDV1525URH 1N PDFN33-8
6

PR721
4 20 DL_CHG
PQ710A

2ISL88731_VREF
4.7K_0402_5%

EAO LGATE

10U 25V K X5R 0805

10U 25V K X5R 0805

10U 25V K X5R 0805

10U 25V K X5R 0805


2

10_0402_5%
@

1 2

1
PQ703
PR723

PC717

PC718

PC719

PC720
PR722 SNB_CHG
100_0402_1% ISL88731_VREF 3 19 4

680P_0402_50V7K
34 BATT_TEMP VREF PGND
1

18

PC716

PR724
CSOP

2
@
221K_0402_1%
1

2
7 17
CE CSON

2
PR725

@
@

3
2
1
15 VFB 1 PR726 2
63.4K_0402_1% 287K_0402_1%

VFB BATT+
2

12
2200P_0402_25V7K

32,34 ADP_I GND 16


PR727

100_0402_5%
0.1U_0402_10V7K

NC
1

3 3
29
PC721

PC722
TP
1 2
1
PC723
2

ISL88731_ICREF ISL88731CHRTZ-T TQFN 28P PW M 0.22U_0603_25V7K


@ PC726
2
2

@ 1 2
28.7K_0402_1%
2

PR729
0.01U_0402_25V7K

PR728

PC725 0.1U_0603_25V7K
1
PC727

0.1U_0402_16V7K
1

@
2

For DT Mode
VIN
3.3K_1206_5%~D

1
PR730

V1
DMN66D0LDW-7 2N SOT363-6
3 2

4 4
DMN66D0LDW-7 2N SOT363-6
6

PQ713B
PQ713A

ACOFF 5
BATT_TEMP 2 DELL CONFIDENTIAL/PROPRIETARY
4

Security Classification Compal Secret Data Compal Electronics, Inc.


1

Issued Date 2014/02/26 Deciphered Date 2015/02/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P40-PWR-Charger
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

LA-B911P
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: W ednesday, January 21, 2015 Sheet 40 of 42
A B C D
5 4 3 2 1

Vinafix.com
D D

+SOC_VNN
+SOC_VCC +1.35V
PC913 1 2 22U_0603_6.3V6M
PC901 1 2 22U_0603_6.3V6M PC914 1 2 22U_0603_6.3V6M PC902 1 2 22U_0603_6.3V6M
PC903 1 2 22U_0603_6.3V6M PC915 1 2 22U_0603_6.3V6M PC904 1 2 22U_0603_6.3V6M
PC905 1 2 22U_0603_6.3V6M PC916 1 2 22U_0603_6.3V6M PC906 1 2 22U_0603_6.3V6M
PC907 1 2 22U_0603_6.3V6M PC908 1 2 22U_0603_6.3V6M

PC917 2 1220U_D2_2VY_R15M
PC909 2 1220U_D2_2VY_R15M

+
PC918 2 1220U_D2_2VY_R15M

+
PC911 2 1220U_D2_2VY_R15M

+
PC919 2 1220U_D2_2VY_R15M

+
+SOC_VCC +SOC_VNN
C C
PC920 1 2 22U_0603_6.3V6M
PC929 1 2 22U_0603_6.3V6M PC921 1 2 22U_0603_6.3V6M
PC922 1 2 22U_0603_6.3V6M
PC930 1 2 10U_0603_6.3V6M
PC923 1 2 1U_0402_6.3V6K
PC931 1 2 22U_0603_6.3V6M PC924 1 2 1U_0402_6.3V6K
PC932 1 2 22U_0603_6.3V6M PC925 1 2 1U_0402_6.3V6K

PC933 1 2 2.2U_0402_6.3V6M @ PC926 1 2 0.1U_0402_16V7K


PC934 1 2 2.2U_0402_6.3V6M @ PC927 1 2 0.1U_0402_16V7K
@ PC928 1 2 0.1U_0402_16V7K

B B

A A

DELL CONFIDENTIAL/PROPRIETARY
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/02/26 Deciphered Date 2015/02/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P41-PWR-CPU_CORE_CAP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

LA-B911P
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Sheet 41 of 42
5 4 3 2 1
5 4 3 2 1

Version change list (P.I.R. List) Page 1of 2 for PWR

Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase

1 Vinafix.com Follow Intep PDG 2.3 Change PR526,PR527 from 73.2 ohm to 69.8 ohm 2014/10/28 DVT1

D D

Change PR11 to 30.1K


2 Change PR20 to 787K
Add PR22 60.4k 2014/12/4 DVT2
PWC fucntion by dell request Add PR23 115k
Add PQ10

EMI request Change PL102 to SM010009C80 2014/12/4 DVT2


3

ESD request Change PR6 from 100 ohm to 200 ohm 2015/1/16 Pilot

C C

B B

A A
7

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/02/26 Deciphered Date 2015/02/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-PIR
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Sheet 42 of 42
5 4 3 2 1

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