Toshiba Satellite L670 - L675 Compal LA-6041P NALAA Hamburg10 Rev1.0 Schematic
Toshiba Satellite L670 - L675 Compal LA-6041P NALAA Hamburg10 Rev1.0 Schematic
Toshiba Satellite L670 - L675 Compal LA-6041P NALAA Hamburg10 Rev1.0 Schematic
1 1
NALAA
2
Hamburg 10 2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 1.0
USB/B BT conn
FDI X8 DMI X4 USB port 0,1 USB port 5
page 30 page 26
2.7GHz 2.5GHz
3.3V 33 MHz
LPC BUS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagrams
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
1.0
D SUSP D
TPS51125RGER
Ipeak=5A, Imax=3.5A, Iocp min=7.7 DESIGN CURRENT 5A +3VALW
WOL_EN#
P-CHANNEL DESIGN CURRENT 330mA +3V_LAN
AO-3413
SUSP
N-CHANNEL DESIGN CURRENT 4A +3VS
SI4800 VGA_ENVDD
P-CHANNEL DESIGN CURRENT 1.5A +LCD_VDD
C AO-3413 C
BT_PWR#
DESIGN CURRENT 180mA +BT_VCC
P-CHANNEL
AO-3413
VR_ON
Ipeak=48A, Imax=33.6A, Iocp min=57.28 DESIGN CURRENT 48A +CPU_CORE
ISL62883
GFXVR_EN
Ipeak=22A, Imax=15.4A, Iocp min=26 DESIGN CURRENT 22A +GFX_CORE
ADP3211AMNR
B
VTTP_EN# B
SYSON
Ipeak=9A, Imax=6.3A, Iocp min=9.8 DESIGN CURRENT 9A +1.5V +1.5V_CPU
RT8209BGQW SUSP
DESIGN CURRENT 1.2A +1.5VS
N-CHANNEL
SI4856 SUSP
DESIGN CURRENT 1.5A +0.75VS
G2992F1U
SUSP#
DESIGN CURRENT 1.5A +1.8VS
MP2121DQ
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Power Tree
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
1.0
plane +VGA_CORE explain Bluetooth MDC LAN HDMI Card Reader New Card PCMCIA WIRELESS
+CPU_CORE
BTO BT@ MDC@ IHDMI@ CARD@ WLAN@
+VTT
+1.05VS
+1.8VS
+1.1VS
State +0.75VS
S0
O O O O O
SIGNAL
2 S1 STATE SLP_S3# SLP_S4# SLP_S5# 2
O O O O O
Full ON HIGH HIGH HIGH
S3
O O O O X S1(Power On Suspend) HIGH HIGH HIGH
S5 S4/AC
O O O X X S3 (Suspend to RAM) LOW HIGH HIGH
3 3
+3VS WLAN/Wimax/3G
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/01/23 Deciphered Date 2010/01/23 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
JCPUB NPS@
1 2 H_COMP3 AT23 2 1
R1 20_0402_1% COMP3 R19 0_0402_5%
BCLK A16 CLK_CPU_BCLK 21
MISC
1 2 H_COMP2 AT24 B16 CLK_CPU_BCLK# 21
R2 20_0402_1% COMP2 BCLK#
H_COMP1 G16 CLK_CPU_XDP_R 1 CLK_CPU_XDP
CLOCKS
1 2 COMP1 BCLK_ITP AR30 2
D
R4 49.9_0402_1% AT30 CLK_CPU_XDP#_R 1 R41 @ 2 0_0402_5% CLK_CPU_XDP# SM_DRAMRST#_CPU 3 1
BCLK_ITP# SM_DRAMRST# 11,12
1 2 H_COMP0 AT26 R42 @ 0_0402_5%
COMP0
1
R3 49.9_0402_1% E16 CLK_PEG 17 Q41
PEG_CLK PS@ BSS138_NL_SOT23-3
G
D16 CLK_PEG# 17
2
TP_SKTOCC# PEG_CLK# R127 PS@
PAD T41 AH24 SKTOCC#
+VTT A18 Unused by Clarksfield rPGA989 100K_0402_5%
DPLL_REF_SSCLK RST_GATE 21
D A17 D
2
CATERR# DPLL_REF_SSCLK#
1 2 AK14 CATERR#
2
THERMAL
R18 49.9_0402_1% C314 PS@
0.047U_0402_16V7K Add on 11/09
+VTT For prevent noise issue F6 SM_DRAMRST#_CPU
1
SM_DRAMRST#
21 PECI AT15 PECI
SM_RCOMP[0] AL1 SM_RCOMP_0 R6 1 2 100_0402_1%
2 1 AM1 SM_RCOMP_1 R7 1 2 24.9_0402_1% DDR3 Compensation Signals
SM_RCOMP[1]
2
DDR3
MISC
PM_EXT_TS#[0]
@ PM_EXT_TS#[1] AP15 PM_EXTTS#_R 2 1 PM_EXTTS# 11,12
PM_EXTTS#0 R15 2 1 10K_0402_5%
R12 0_0402_5%
1
AT28 XDP_PRDY#
PRDY# XDP_PREQ# XDP_TDI_R XDP_TDI
PREQ# AP27 1 2
R20 0_0402_5%
AN28 XDP_TCK
XDP_RST#_R H_CPURST# TCK XDP_TMS XDP_TDO_M XDP_TDO
1 2 AP26 RESET_OBS# TMS AP28 1 @ 2
PWR MANAGEMENT
R36 1K_0402_5% AT27 XDP_TRST# Routed as a single daisy chain R21 0_0402_5%
TRST#
1
JTAG & BPM
AL15 AT29 XDP_TDI_R R23
18 PMSYNCH PM_SYNC TDI
AR27 XDP_TDO_R 0_0402_5%
TDO XDP_TDI_M
TDI_M AR29 2 1 +3VS
2 1 H_PWRGOOD1_R AN14 AP29 XDP_TDO_M R312 1K_0402_5%
2
+1.5V_CPU 0_0402_5% R25 VCCPW RGOOD_1 TDO_M XDP_TDI_M 1 @ 2
AN25 R26 0_0402_5%
DBR# XDP_DBRESET# 18
C H_PWRGOOD AN27 C
21 H_PWRGOOD VCCPW RGOOD_0 XDP_TDO_R 1 2
2
Close to JCPU
XDP Connector
VTTPWROK_CPU 2 1
B B
C384 1000P_0402_50V7K
SFF-24Pin
DRAMPWROK 2 1
JXDP
C389 1000P_0402_50V7K XDP_PREQ# 1
XDP_PRDY# 1
2 2
3 3
XDP_BPM#0 4
XDP_BPM#1 4
5 5
6 6
XDP_BPM#2 7
+3VALW XDP_BPM#3 7
8 8
@ R32 1K_0402_5% 9
H_PWRGOOD H_PWRGOOD_R 9
1 2 1 2 10 10
C25 0.1U_0402_16V7K TAPPWRGD 1 2 TAPPWRGD_R 11
@ R35 0_0402_5% CLK_CPU_XDP 11
12 12
5
U16 CLK_CPU_XDP# 13
VTTPWROK 13
1 14
P
17 17
SN74AHC1G08DCKR_SC70-5 2 1 XDP_TDO 18
3
1
XDP_TDI 20
C1 XDP_TMS 20
21 21
2 @ 1 0.1U_0402_16V7K R11 22
0_0402_5% R84 @ 2 51_0402_5% 22
23 23 GND 25
XDP_TCK 24 26
2
A 24 GND A
MOLEX_52435-2472
@
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CPU CLK/MISC/JTAG/XDP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NALAA LA-6041P M/B
Date: Tuesday, April 13, 2010 Sheet 5 of 48
5 4 3 2 1
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5 4 3 2 1
D D
JCPUA
B26 PEG_COMP 1 2
PEG_ICOMPI R38 49.9_0402_1%
PEG_ICOMPO A26
18 DMI_PTX_CRX_N0 A24 DMI_RX#[0] PEG_RCOMPO B27
C23 A25 PEG_RBIAS 1 2
18 DMI_PTX_CRX_N1 DMI_RX#[1] PEG_RBIAS
B22 R39 750_0402_1%
18 DMI_PTX_CRX_N2 DMI_RX#[2]
18 DMI_PTX_CRX_N3 A21 DMI_RX#[3] PEG_RX#[0] K35
PEG_RX#[1] J34
18 DMI_PTX_CRX_P0 B24 DMI_RX[0] PEG_RX#[2] J33
18 DMI_PTX_CRX_P1 D23 DMI_RX[1] PEG_RX#[3] G35
DMI
18 DMI_PTX_CRX_P2 B23 DMI_RX[2] PEG_RX#[4] G32
18 DMI_PTX_CRX_P3 A22 DMI_RX[3] PEG_RX#[5] F34
PEG_RX#[6] F31
18 DMI_CTX_PRX_N0 D24 DMI_TX#[0] PEG_RX#[7] D35
18 DMI_CTX_PRX_N1 G24 DMI_TX#[1] PEG_RX#[8] E33
18 DMI_CTX_PRX_N2 F23 DMI_TX#[2] PEG_RX#[9] C33
18 DMI_CTX_PRX_N3 H23 DMI_TX#[3] PEG_RX#[10] D32
PEG_RX#[11] B32
18 DMI_CTX_PRX_P0 D25 DMI_TX[0] PEG_RX#[12] C31
18 DMI_CTX_PRX_P1 F24 DMI_TX[1] PEG_RX#[13] B28
18 DMI_CTX_PRX_P2 E23 DMI_TX[2] PEG_RX#[14] B30
18 DMI_CTX_PRX_P3 G23 DMI_TX[3] PEG_RX#[15] A31
PEG_RX[0] J35
PEG_RX[1] H34
PEG_RX[2] H33
18 FDI_CTX_PRX_N0 E22 FDI_TX#[0] PEG_RX[3] F35
C D21 G33 C
18 FDI_CTX_PRX_N1 FDI_TX#[1] PEG_RX[4]
18 FDI_CTX_PRX_N2 D19 FDI_TX#[2] PEG_RX[5] E34
18 FDI_CTX_PRX_N3 D18 FDI_TX#[3] PEG_RX[6] F32
18 FDI_CTX_PRX_N4 G21 FDI_TX#[4] PEG_RX[7] D34
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CPU DMI/FDI/PEG/FAN
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 1.0
JCPUC JCPUD
11 DDR_A_D[0..63] 12 DDR_B_D[0..63]
IC,AUB_CFD_rPGA,R0P9
@
A A
IC,AUB_CFD_rPGA,R0P9
@
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CPU DDRIII
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 1.0
+CPU_CORE Clarksfield: 65A Clarksfield: 21A (Place these capacitors under CPU socket Edge, top layer) (Place these capacitors between inductor and socket on Bottom)
+VTT
Auburndale:48A Auburndale:18A +CPU_CORE
AG35 AH14
VCC1 VTT0_1 10U_0805_10V4K 10U_0805_10V4K 10U_0805_10V4K 10U_0805_10V4K
AG34 AH12
D VCC2 VTT0_2 D
AG33 AH11
VCC3 VTT0_3
AG32 AH10 1 1 1 1 1 1 1 1 1
VCC4 VTT0_4 C159 1 2 390U_2.5V_M_R10 C81 1 2 10U_0805_10V4K
+
AG31 J14
VCC5 VTT0_5
AG30 J13
VCC6 VTT0_6 C160 1
AG29 H14 2 390U_2.5V_M_R10 C83 1 2 10U_0805_10V4K C71 C72 C73 C74 C75 C76 C77 C78 C79
VCC7 VTT0_7 2 2 2 2 2 2 2 2 2
AG28 H12
+
VCC8 VTT0_8 C85 1
AG27 G14 2 10U_0805_10V4K
VCC9 VTT0_9 10U_0805_10V4K 10U_0805_10V4K 10U_0805_10V4K 10U_0805_10V4K 10U_0805_10V4K
AG26 G13
VCC10 VTT0_10 C87 1
AF35
VCC11 VTT0_11
G12 2 10U_0805_10V4K
AF34 G11
VCC12 VTT0_12 C89 1
AF33
VCC13 VTT0_13
F14 2 22U_0805_6.3V6M C88 1 2 10U_0805_10V4K
AF32 VCC14 VTT0_14 F13
AF31 F12 C91 1 2 22U_0805_6.3V6M C90 1 2 10U_0805_10V4K
VCC15 VTT0_15
AF30 VCC16 VTT0_16 F11 (Place these capacitors under CPU socket, top layer)
AF29 E14 C92 1 2 10U_0805_10V4K
VCC17 VTT0_17
AF28 VCC18 VTT0_18 E12
AF27 D14 C94 1 2 10U_0805_10V4K@ +CPU_CORE
VCC19 VTT0_19
AF26 VCC20 VTT0_20 D13
VCC62
V33
VCC63
V32 AK35 CPU_VID0 43
VCC64 VID[0]
V31 AK33 CPU_VID1 43
VCC65 VID[1]
V30 AK34 CPU_VID2 43
B VCC66 VID[2] B
V29
VCC67 VID[3] AL35 CPU_VID3 43 VTT Rail Co-layout with C123
CPU VIDS
V28
VCC68 VID[4] AL33 CPU_VID4 43 TOP side (under inductor)
V27 AM33 CPU_VID5 43
VCC69 VID[5] +CPU_CORE
V26
VCC70 VID[6] AM35 CPU_VID6 43 Auburndale +1.1VS_VTT=1.05V +CPU_CORE
U35 AM34 H_DPRSLPVR_R 1 2
U34
VCC71 PROC_DPRSLPVR R62 0_0402_5%
H_DPRSLPVR 43 Clarksfield +1.1VS_VTT=1.1V
VCC72 330U_D2_2.5VY_R9M 330U_D2_2.5VY_R9M
U33 1
VCC73
U32 1 1 1 1
VCC74 + C125
U31 G15 T43 PAD
VCC75 VTT_SELECT C121 + C122 + C123 + C124 + 220U_6.3V_M
U30
VCC76 H_VTTSELECT = low, 1.1V
U29 @
VCC77 330U_D2_2.5VY_R9M 330U_D2_2.5VY_R9M 2
U28
VCC78 H_VTTSELECT = high, 1.05V 2 2 2 2
U27
VCC79
U26
VCC80
R35
VCC81
R34
VCC82
R33
VCC83
R32 AN35 IMVP_IMON 43
VCC84 ISENSE
R31
VCC85
R30 1 2 +CPU_CORE
VCC86 R64 100_0402_1%
R29
VCC87 VCCSENSE_R R65 VCCSENSE
2 0_0402_5%
SENSE LINES
R28 AJ34 1
R27
VCC88 VCC_SENSE
AJ35 VSSSENSE_R R66 1 2 0_0402_5% VSSSENSE VCCSENSE 43 Check list:
VCC89 VSS_SENSE VSSSENSE 43
R26
VCC90
P35
P34
VCC91
B15 R67
1 2
100_0402_1%
+CPU_CORE: 6x 470uF, 12x 22uF, 16x 10uF
VCC92 VTT_SENSE VTT_SENSE 40
P33 A15 VSS_SENSE_VTT 40
VCC93 VSS_SENSE_VTT
P32
VCC94 near CPU +VTT: 4x 330uF, 7x 22uF, 8x 10uF
P31
VCC95
P30
VCC96
P29
VCC97
P28 VCC98
A A
P27 VCC99
P26 VCC100
WWW.AliSaler.Com
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NALAA LA-6041P M/B
Date: Tuesday, April 13, 2010 Sheet 8 of 48
5 4 3 2 1
5 4 3 2 1
+1.5V_CPU +1.5V
Q33 PS@
1 S D 8
2 S D 7
2
3 S D 6
+GFX_CORE R424 4 5
1 G D
470_0805_5% C267
PS@ FDS6676AS_SO8
47P_0402_50V8J 47P_0402_50V8J 10U_0805_10V4K PS@ 1 R418 2 +VSB
1
2 PS@ 220K_0402_5%
1
1
C97 C118 C119 C93
6
D @ @ @ @ 1 D
PS@ Q46B R417 Q46A
0.1U_0402_25V6
2
C472
820K_0402_5% PS@
47P_0402_50V8J 47P_0402_50V8J SUSP 5 PS@ 2 SUSP
2 SUSP 35,42
2
2N7002KDW _SOT363-6 PS@ 2N7002KDW _SOT363-6
1
+GFX_CORE
near CPU
JCPUG
1 2 +GFX_CORE
22U_0805_6.3V6M 1U_0402_6.3V4Z AT21 R82 100_0402_1%
VAXG1 VCC_AXG_SENSE_R R95
AT19 VAXG2 Auburndale:22A VAXG_SENSE AR22 1 2 0_0402_5% VCC_AXG_SENSE 44
VSS_AXG_SENSE_R R94 2 0_0402_5%
SENSE
LINES
1 AT18 VAXG3 VSSAXG_SENSE AT22 1 VSS_AXG_SENSE 44
1 1 1 1 1 1 AT16 VAXG4
+ C185 C95 C127 C117 C96 C120 C86 AR21 1 2
10U_0805_6.3V6M VAXG5 R69 100_0402_1%
AR19 VAXG6
390U_2.5V_M_R10 AR18
2 2 2 2 2 2 2 VAXG7
AR16 VAXG8 GFX_VID[0] AM22 GFXVR_VID_0 44
AP21 VAXG9 GFX_VID[1] AP22 GFXVR_VID_1 44
GRAPHICS VIDs
22U_0805_6.3V6M 1U_0402_6.3V4Z 10U_0805_6.3V6M AP19 AN22
VAXG10 GFX_VID[2] GFXVR_VID_2 44
AP18 VAXG11 GFX_VID[3] AP23 GFXVR_VID_3 44
AP16 VAXG12 GFX_VID[4] AM23 GFXVR_VID_4 44
AN21 VAXG13 GFX_VID[5] AP24 GFXVR_VID_5 44
GRAPHICS
AN19 AN24 C230 1 2 0.1U_0402_16V4Z
VAXG14 GFX_VID[6] GFXVR_VID_6 44
AN18 VAXG15
C AN16 1 2 C218 1 2 0.1U_0402_16V4Z C
VAXG16 R50 330_0402_5%
AM21 VAXG17 GFX_VR_EN AR25 GFXVR_EN 44
AM19 AT25 T42 PAD C205 1 2 0.1U_0402_16V4Z
VAXG18 GFX_DPRSLPVR
AM18 VAXG19 GFX_IMON AM24 GFXVR_IMON 44
AM16 C186 1 2 0.1U_0402_16V4Z
VAXG20 R687 2
AL21 VAXG21 1 1K_0402_5%
AL19 @
VAXG22 +1.5V_CPU
AL18 VAXG23
AL16 PJ30 @
VAXG24 1U_0402_6.3V4Z 1U_0402_6.3V4Z 22U_0805_6.3V6M
AK21 VAXG25 VDDQ1 AJ1 2 2 1 1 +1.5V
AK19 VAXG26 VDDQ2 AF1 1
AK18 AE7 JUMP_43X79
- 1.5V RAILS
VAXG27 VDDQ3 1 1 1 1 1 1 1
+
AK16 VAXG28 Clarksfield: 5A VDDQ4 AE4
C133 C134 C135 C136 C137 C138 C139 C217
AJ21 VAXG29 VDDQ5 AC1
AJ19 Auburndale:3A AB7 390U_2.5V_M_R10
VAXG30 VDDQ6 2 2 2 2 2 2 2 2
AJ18 VAXG31 VDDQ7 AB4
AJ16 VAXG32 VDDQ8 Y1
AH21 VAXG33 VDDQ9 W7
POWER
AH19 W4 1U_0402_6.3V4Z 1U_0402_6.3V4Z 1U_0402_6.3V4Z 22U_0805_6.3V6M
VAXG34 VDDQ10
AH18 VAXG35 VDDQ11 U1
AH16 VAXG36 VDDQ12 T7
VDDQ13 T4
VDDQ14 P1
+VTT N7
VDDQ15
VDDQ16 N4
DDR3
VDDQ17 L1
J24 VTT1_45 VDDQ18 H1
FDI
J23 VTT1_46
H25 +VTT
B
1 1 VTT1_47 B
C141 C142
(Place these capacitors under CPU socket Edge, top layer)
22U_0805_6.3V6M 22U_0805_6.3V6M P10 1
2 2 VTT0_59 C143
VTT0_60 N10
VTT0_61 L10
K10 10U_0805_10V4K
VTT0_62 2
Clarksfield: 21A
+VTT
+VTT Auburndale:18A
1.1V
VTT1_63 J22
K26 VTT1_48 VTT1_64 J20
J27 VTT1_49 VTT1_65 J18 1
PEG & DMI
IC,AUB_CFD_rPGA,R0P9 2.2U_0603_6.3V4Z
@
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CPU POWER-2
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 1.0
RESERVED
C VSS192 VSS34 VSS114 CFG10 CFG[9] RSVD_NCTF_55 C
F16 VSS193 AM5 VSS35 VSS115 W30 AK28 CFG[10] RSVD_NCTF_56 AP35
E35 AM2 W29 CFG11 AJ28 AR35
VSS194 VSS36 VSS116 CFG[11] RSVD_NCTF_57
E32 AL34 W28 AN30 AR32
E29
E24
VSS195
VSS196
VSS197
VSS AL31
AL23
VSS37
VSS38
VSS39
VSS VSS117
VSS118
VSS119
W27
W26
CFG13
CFG14
AN32
AJ32
CFG[12]
CFG[13]
CFG[14]
RSVD58
IC,AUB_CFD_rPGA,R0P9 IC,AUB_CFD_rPGA,R0P9
device is connected to the Embedded
@ @ Display Port
*:Default
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CPU GND/RESERVED
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
+1.5V +1.5V
1
JDDRH
2
DDR3 SO-DIMM A M1 Circuit
+VREF_DQA
DDR_A_D0
3
5
VREF_DQ
VSS
VSS
DQ4 4
6
DDR_A_D4
DDR_A_D5
Standard Type 7 DDR_A_DQS[0..7] +1.5V
2 1
0.1U_0402_16V4Z
2.2U_0603_6.3V4Z
DQ0 DQ5 7 DDR_A_DQS#[0..7] +VREF_DQB
1 1 DDR_A_D1 7 8 R78 0_0402_5%
DQ1 VSS
1
9 10 DDR_A_DQS#0 7 DDR_A_D[0..63]
VSS DQS0# +1.5V
C156
C157
DDR_A_DM0 11 12 DDR_A_DQS0 R79
DM0 DQS0 1K_0402_1%
13 VSS VSS 14 7 DDR_A_DM[0..7]
2 2 DDR_A_D2 DDR_A_D6 +V_DDR3_DIMM_REF
15 DQ2 DQ6 16
1
DDR_A_D3 17 18 DDR_A_D7 7 DDR_A_MA[0..15]
2
DQ3 DQ7 R83
19 VSS VSS 20 2 1 +VREF_DQA
DDR_A_D8 21 22 DDR_A_D12 1K_0402_1% R80 0_0402_5%
DQ8 DQ12
1
D DDR_A_D9 23 24 DDR_A_D13 PS@ D
DQ9 DQ13 R81
25 26
2
DDR_A_DQS#1 VSS VSS DDR_A_DM1 1K_0402_1%
close to JDDRL.1 27 DQS1# DM1 28
DDR_A_DQS1 29 30
DQS1 RESET# SM_DRAMRST# 5,12
31 32
2
DDR_A_D10 VSS VSS DDR_A_D14
33 DQ10 DQ14 34
DDR_A_D11 35 36 DDR_A_D15
DQ11 DQ15
37 VSS VSS 38
DDR_A_D16 39 40 DDR_A_D20
DDR_A_D17 DQ16 DQ20 DDR_A_D21
41 DQ17 DQ21 42
43 VSS VSS 44
DDR_A_DQS#2 45 46 DDR_A_DM2
DDR_A_DQS2 DQS2# DM2
47 DQS2 VSS 48
49 50 DDR_A_D22
DDR_A_D18 VSS DQ22 DDR_A_D23
51 DQ18 DQ23 52
DDR_A_D19 53 54
DQ19 VSS DDR_A_D28
55 VSS DQ28 56
DDR_A_D24 57 58 DDR_A_D29
DDR_A_D25 DQ24 DQ29
59 DQ25 VSS 60
61 62 DDR_A_DQS#3
DDR_A_DM3 VSS DQS3# DDR_A_DQS3
63 DM3 DQS3 64
65 VSS VSS 66
DDR_A_D26 67 68 DDR_A_D30
DDR_A_D27 DQ26 DQ30 DDR_A_D31
69 DQ27 DQ31 70
71 VSS VSS 72
DQ33 DQ37
133 VSS VSS 134
B DDR_A_DQS#4 DDR_A_DM4 B
135 DQS4# DM4 136
DDR_A_DQS4 137 138 1 1 Layout Note: Layout Note: Place these 4 Caps near Layout Note:
DQS4 VSS DDR_A_D38
139 VSS DQ38 140
Place near JDDRH Command and Control signals of JDDRH Place near JDDRH.203 and 204
C161
C162
+
151 VSS DQS5# 152
DDR_A_DM5 153 154 DDR_A_DQS5 close to JDDRL.126
DM5 DQS5 C164 1
155 VSS VSS 156 2 0.1U_0402_16V4Z C165 1 2 10U_0805_6.3V6M
DDR_A_D42 157 158 DDR_A_D46 C166 1 2 10U_0805_6.3V6M
DDR_A_D43 DQ42 DQ46 DDR_A_D47 C167 1
159 DQ43 DQ47 160 2 0.1U_0402_16V4Z
161 162 C168 1 2 10U_0805_6.3V6M C169 2 1 1U_0402_6.3V4Z
DDR_A_D48 VSS VSS DDR_A_D52 C170 1
163 DQ48 DQ52 164 2 0.1U_0402_16V4Z
DDR_A_D49 165 166 DDR_A_D53 C171 1 2 10U_0805_6.3V6M C172 2 1 1U_0402_6.3V4Z
DQ49 DQ53 C173 1
167 VSS VSS 168 2 0.1U_0402_16V4Z
DDR_A_DQS#6 169 170 DDR_A_DM6 C174 1 2 10U_0805_6.3V6M C175 2 1 1U_0402_6.3V4Z
DDR_A_DQS6 DQS6# DM6 C21
171 DQS6 VSS 172 1 2 68P_0402_50V8J
173 174 DDR_A_D54 C176 1 2 10U_0805_6.3V6M C177 2 1 1U_0402_6.3V4Z
DDR_A_D50 VSS DQ54 DDR_A_D55
175 DQ50 DQ55 176 For EMI Request
DDR_A_D51 177 178 C178 1 2 10U_0805_6.3V6M C22 2 1 68P_0402_50V8J
DQ51 VSS DDR_A_D60
179 VSS DQ60 180
DDR_A_D56 181 182 DDR_A_D61
DDR_A_D57 183
DQ56 DQ61
184
For EMI Request
DQ57 VSS DDR_A_DQS#7
185 VSS DQS7# 186
DDR_A_DM7 187 188 DDR_A_DQS7
DM7 DQS7
189 VSS VSS 190
A
DDR_A_D58 191 192 DDR_A_D62 A
DDR_A_D59 DQ58 DQ62 DDR_A_D63
193 DQ59 DQ63 194
R90 1 2 195 196
10K_0402_5% VSS VSS
197 SA0 EVENT# 198 PM_EXTTS# 5,12
+3VS 199 VDDSPD SDA 200 PM_SMBDATA 12,13,17,27
201 202
0.1U_0402_16V4Z
2.2U_0603_6.3V4Z
203 204
1 1 +0.75VS VTT VTT +0.75VS Security Classification Compal Secret Data Compal Electronics, Inc.
1
C182
C181 205 206 2009/01/23 2010/01/23 Title
GND1 BOSS1 Issued Date Deciphered Date
R91
207 208
2 2 GND2 BOSS2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDRIII-SODIMM0
Size Document Number Rev
2
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
FOX_AS0A626-U2SN-7F_204P Custom 1.0
+1.5V +1.5V
1
JDDRL
2
Standard Type
+VREF_DQB
DDR_B_D0
3
5
VREF_DQ
VSS
VSS
DQ4 4
6
DDR_B_D4
DDR_B_D5
DDR3 SO-DIMM B
DDR_B_D1 DQ0 DQ5
7 DQ1 VSS 8 7 DDR_B_DQS#[0..7]
9 10 DDR_B_DQS#0
0.1U_0402_16V4Z
2.2U_0603_6.3V4Z
DDR_B_DM0 VSS DQS0# DDR_B_DQS0
11 DM0 DQS0 12 7 DDR_B_DQS[0..7]
1 1 13 VSS VSS 14
DDR_B_D2 15 16 DDR_B_D6 7 DDR_B_D[0..63]
DDR_B_D3 DQ2 DQ6 DDR_B_D7
17 DQ3 DQ7 18
C183
C184
19 VSS VSS 20 7 DDR_B_DM[0..7]
2 2 DDR_B_D8 DDR_B_D12
21 DQ8 DQ12 22
1 DDR_B_D9 23 24 DDR_B_D13 7 DDR_B_MA[0..15] 1
DQ9 DQ13
25 VSS VSS 26
DDR_B_DQS#1 27 28 DDR_B_DM1
DDR_B_DQS1 DQS1# DM1
29 DQS1 RESET# 30 SM_DRAMRST# 5,11
31 VSS VSS 32
DDR_B_D10 33 34 DDR_B_D14
DDR_B_D11 DQ10 DQ14 DDR_B_D15
close to JDDRH.1 35 DQ11 DQ15 36
37 VSS VSS 38
DDR_B_D16 39 40 DDR_B_D20
DDR_B_D17 DQ16 DQ20 DDR_B_D21
41 DQ17 DQ21 42
43 VSS VSS 44
DDR_B_DQS#2 45 46 DDR_B_DM2
DDR_B_DQS2 DQS2# DM2
47 DQS2 VSS 48
49 50 DDR_B_D22
DDR_B_D18 VSS DQ22 DDR_B_D23
51 DQ18 DQ23 52
DDR_B_D19 53 54
DQ19 VSS DDR_B_D28
55 VSS DQ28 56
DDR_B_D24 57 58 DDR_B_D29
DDR_B_D25 DQ24 DQ29
59 DQ25 VSS 60
61 62 DDR_B_DQS#3
DDR_B_DM3 VSS DQS3# DDR_B_DQS3
63 DM3 DQS3 64
65 VSS VSS 66
DDR_B_D26 67 68 DDR_B_D30
DDR_B_D27 DQ26 DQ30 DDR_B_D31
69 DQ27 DQ31 70
71 VSS VSS 72
C188
+
139 VSS DQ38 140
DDR_B_D34 DDR_B_D39 2 2
141 DQ34 DQ39 142
DDR_B_D35 143 144 C190 1 2 0.1U_0402_16V4Z C191 1 2 10U_0805_6.3V6M
DQ35 VSS DDR_B_D44 C192 1
145 VSS DQ44 146 2 10U_0805_6.3V6M
DDR_B_D40 147 148 DDR_B_D45 C193 1 2 0.1U_0402_16V4Z
DDR_B_D41 DQ40 DQ45 C194 1
149 DQ41 VSS 150 2 10U_0805_6.3V6M C195 2 1 1U_0402_6.3V4Z
151 152 DDR_B_DQS#5 C196 1 2 0.1U_0402_16V4Z
DDR_B_DM5 VSS DQS5# DDR_B_DQS5 C197 1
153 DM5 DQS5 154 close to JDDRH.126 2 10U_0805_6.3V6M C198 2 1 1U_0402_6.3V4Z
155 156 C199 1 2 0.1U_0402_16V4Z
DDR_B_D42 VSS VSS DDR_B_D46 C200 1
157 DQ42 DQ46 158 2 10U_0805_6.3V6M C201 2 1 1U_0402_6.3V4Z
DDR_B_D43 159 160 DDR_B_D47 C23 1 2 68P_0402_50V8J
DQ43 DQ47 C202 1
161 VSS VSS 162 2 10U_0805_6.3V6M C203 2 1 1U_0402_6.3V4Z
DDR_B_D48 163 164 DDR_B_D52
DDR_B_D49 165
DQ48 DQ52
166 DDR_B_D53 C204 1 2 10U_0805_6.3V6M
For EMI Request C24 2 1 68P_0402_50V8J
DQ49 DQ53
167 VSS VSS 168
DDR_B_DQS#6 169 170 DDR_B_DM6
DDR_B_DQS6 171
DQS6# DM6
172
For EMI Request
DQS6 VSS DDR_B_D54
173 VSS DQ54 174
DDR_B_D50 175 176 DDR_B_D55
DDR_B_D51 DQ50 DQ55
177 DQ51 VSS 178
179 180 DDR_B_D60
DDR_B_D56 VSS DQ60 DDR_B_D61
181 DQ56 DQ61 182
DDR_B_D57 183 184
DQ57 VSS DDR_B_DQS#7
185 VSS DQS7# 186
DDR_B_DM7 187 188 DDR_B_DQS7
DM7 DQS7
189 VSS VSS 190
4
DDR_B_D58 191 192 DDR_B_D62 4
DDR_B_D59 DQ58 DQ62 DDR_B_D63
193 DQ59 DQ63 194
R98 1 2 195 196
10K_0402_5% VSS VSS
197 SA0 EVENT# 198 PM_EXTTS# 5,11
+3VS 199 VDDSPD SDA 200 PM_SMBDATA 11,13,17,27
201 SA1 SCL 202 PM_SMBCLK 11,13,17,27
2.2U_0603_6.3V4Z 1 R99 2 203 204
1 1
10K_0402_5%
+0.75VS VTT VTT +0.75VS Security Classification Compal Secret Data Compal Electronics, Inc.
205 GND1 BOSS1 206 Issued Date 2009/01/23 Deciphered Date 2010/01/23 Title
C207 C208 207 208
2 2 GND2 BOSS2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDRIII-SODIMM1
0.1U_0402_16V4Z Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
FOX_AS0A626-UASN-7F_204P Custom 1.0
1
For SED For SED
FBMH1608HM601-T_0603 FBMH1608HM601-T_0603 R110
+3VS 1 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z +3VS_CK505 +1.05VS 1 2 10U_0805_10V4Z 0.1U_0402_16V4Z +1.05VS_CK505 10K_0402_5%
R100 1 1 1 1 R101 1 1 1 1
1
C252
2
2
C209 C210 C211 C212 C251 C219 C220 C221 C222 47P_0402_50V8J CK_PW RGD
@ R401 47P_0402_50V8J
2
0_0603_5% 2 2 2 2 2 2 2 2
3
10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
1 Q35B 1
1
FBMH1608HM601-T_0603
+1.5VS 1 2 0.1U_0402_16V4Z +1.5VS_CK505 2N7002KDW _SOT363-6 5
R126 CLK_ENABLE# 43
1 1 1
1 250mA
4
For SED C213 C214 C215
C231
1U_0402_6.3V6K 2 2 2
Prevent noise coupling 2 1U_0402_6.3V6K 0.1U_0402_16V4Z
+3VS_CK505
Silego Have Internal Pull-Up
+1.05VS_CK505
+1.05VS_CK505
SA00003HQ10
U5
+3VS_CK505 1 32
VDD_USB_48 SCL PM_SMBCLK 11,12,17,27
2 VSS_48M SDA 31 PM_SMBDATA 11,12,17,27
3 30 CPU_SEL 1 2
17 CLK_DOT DOT_96 REF_0/CPU_SEL CLK_14M_PCH 17
4 29 33_0402_5% R102
17 CLK_DOT# DOT_96# VDD_REF
5 28 CLK_XTAL_IN 10K_0402_5% 2 @ 1 R119 +1.05VS
VDD_27 XTAL_IN CLK_XTAL_OUT
6 27MHZ XTAL_OUT 27
7 27MHZ_SS VSS_REF 26
31 CLK_48M_CR 1 2 CARD@ CLK_48M_CR_R 8 USB_48 CKPWRGD/PD# 25 CK_PW RGD
R390 33_0402_5% CPU_SEL 10K_0402_5% 2 1 R106
9 VSS_27M VDD_CPU 24
17 CLK_SATA 10 SATA CPU_0 23 CLK_BCLK 17 IDT Have Internal Pull-Down
2 11 22 2
17 CLK_SATA# SATA# CPU_0# CLK_BCLK# 17
12 VSS_SRC VSS_CPU 21
17 PCH_CLK_DMI 13 SRC_1 CPU_1 20
17 PCH_CLK_DMI# 14 SRC_1# CPU_1# 19 CPU_SEL CPU_0/0# CPU_1/1#
15 18 CLK_XTAL_OUT
H_STP_CPU# VDD_SRC_IO VDD_CPU_IO
16 CPU_STOP# VDD_SRC 17 +1.5VS_CK505 Routing the
Y1 0 (Default) 133MHz 133MHz
33 CLK_XTAL_IN 1 2 trace at
TGND
RTM890N-631-GRT_QFN32_5X5
2
14.318MHZ_16PF_7A14300083
2 least 10mil
1 100MHz 100MHz
C223 C224
22P_0402_50V8J 22P_0402_50V8J
1 1
1.5A
LCD/PANEL BD. Conn. +LCDVDD_R 2 L1
0_0805_5%
1 +LCD_VDD
1 1
0.1U_0402_16V4Z
1 2 C226 C227
+LCD_VDD +3VS +3VS_LVDS_CAM C270 0.1U_0402_16V4Z 4.7U_0805_10V4Z
2 2
0_0603_5% W=20mils JLVDS
1
+3VS R391 1 2 2 1
3 R107 +3VS USB20_P11_R 2 1 3
4 4 3 3 LCD_TXCLK+ 19
150_0603_5% R108 W=60mils USB20_N11_R 6 5
6 5 LCD_TXCLK- 19
100K_0402_5% 8 7 D58
8 7 INT_MIC_CLK
19 LCD_TXOUT0+ 10 9 LCD_TZCLK+ 19 2
6 2
10 9
2 19 LCD_TXOUT0- 12 12 11 11 LCD_TZCLK- 19 1
C228 14 13 INT_MIC_DATA 3
19 LCD_TXOUT1+ 14 13
0.1U_0402_16V7K 16 15 LCD_EDID_CLK 19
19 LCD_TXOUT1- 16 15
3
S
Q1A 18 17 LCD_EDID_DATA 19 AZ5125-02S.R7G_SOT23-3
1 G 19 LCD_TXOUT2+ 18 17
2N7002KDW _SOT363-6 2 1 2 2 Q17 20 19
19 LCD_TXOUT2- 20 19 INT_MIC_CLK 29
R109 47K_0402_5% 1 AO3413_SOT23 22 21
22 21 INT_MIC_DATA 29
3
C229 D 24 23 +3VS
19 LCD_TZOUT0+
1
0.01U_0402_25V7K +LCD_VDD 24 23
19 LCD_TZOUT0- 26 26 25 25 PCH_PW M 19
Q1B W=60mils 28 27
2 19 LCD_TZOUT1+ 28 27
5 2N7002KDW _SOT363-6 30 29 1 1
19 UMA_ENVDD 19 LCD_TZOUT1- 30 29
32 31 +LCDVDD_R
19 LCD_TZOUT2+ 32 31
1 34 33 BKOFF#_R C302 C269
19 LCD_TZOUT2-
4
34 33
2
36 35 680P_0402_50V7K 0.1U_0402_16V4Z
C233 36 35 2 2
38 38 37 37 +LCD_INV
R112 0.1U_0402_16V4Z +LCD_INV 40 39
100K_0402_5% 2 40 39 B+
42 GND GMD 41
Rated Current MAX:1000mA For EMI request
1
ACES_87242-4001-09 L2 2 1
Calpella PCH request 100K ohm @ FBMA-L11-201209-221LMA30T_0805
1 1 1
Reserve for EMI request C301
1 2 BKOFF#_R C312 C255 680P_0402_50V7K
32 BKOFF#
R93 0_0402_5% R24 68P_0402_50V8J 0.1U_0402_25V6
1
33_0402_5% 2 2 2
1 2
R113
4
L55 @ Prevent EC damage 10K_0402_5%
4
20 USB20_N11 1 2 USB20_N11_R
2
1 2
4 3 USB20_P11_R
20 USB20_P11 4 3 Security Classification Compal Secret Data Compal Electronics, Inc.
W CM-2012-900T_0805 2009/01/23 2010/01/23 Title
Issued Date Deciphered Date
R92 0_0402_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Clock Generator (CK505)/ LVDS CONN
1 2 Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
CRT CONNECTOR
1
D3 D4 D5
+3VS
1 DAN217_SC59 DAN217_SC59 DAN217_SC59 1
3
@ @ @
L3
1 2 CRT_R_L
19 UMA_CRT_R
NBQ100505T-800Y-N_2P
L4
1 2 CRT_G_L
19 UMA_CRT_G
NBQ100505T-800Y-N_2P
L5
1 2 CRT_B_L
19 UMA_CRT_B
NBQ100505T-800Y-N_2P
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
150_0402_1%
150_0402_1%
150_0402_1%
1 1 1 1 1 1
1
1
R138 R139 R140 C238 C239 C240 C241 C242 C243
2 2 2 2 2 2 +5VS
D6 +CRT_VCC_R +CRT_VCC
2
2
2 F1 30mil
1 1 2
3 RB491D_SOT23-3 1
1.1A_6V_MINISMDC110F-2
If=1A C237
@ 0.1U_0402_16V4Z
2 2 2
+CRT_VCC
1 2 2 1 JCRT
C244 0.1U_0402_16V4Z R141 10K_0402_5% 6 RGND
5
1
11 ID0
CRT_R_L 1
OE#
P
U6 CRT_G_L 2
SN74AHCT1G125GW _SOT353-5 D_CRT_VSYNC VSYNC Green
1 2 8
3
10P_0402_50V8J
10P_0402_50V8J
+CRT_VCC Blue
1 1 +CRT_VCC 9 +5V
VSYNC 14
C245 C246 Vsync
4 res
5
1
@ @ 10
2 2 CRT_DDC_CLK SGND
15
OE#
P
SCL
19 UMA_CRT_VSYNC 2 A Y 4 5 GND
G
U7 16
SN74AHCT1G125GW _SOT353-5 GND
17
3
GND
SUYIN_070546FR015S263ZR
@
3 3
+3VS
+CRT_VCC
1
R146 R147
2.2K_0402_5% 2.2K_0402_5%
2
Q2A
2
19 UMA_CRT_DATA 1 6 CRT_DDC_DAT
5
2N7002KDW _SOT363-6
Q2B
19 UMA_CRT_CLK 4 3 CRT_DDC_CLK
1 1
1 1 2N7002KDW _SOT363-6
C249 C250
C247 C248 470P_0402_50V8J 470P_0402_50V8J
33P_0402_50V8K 33P_0402_50V8K @ 2 2 @
@ 2 2 @
4 4
1
0 0 0 450 0 0 R37
10K_0402_5%
0 0 1 420 0 -3dB Shortest trace IHDMI@
2
OE#
+3VS
0 1 0 450 0 -3dB Shortest trace
6
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
D 0 1 1 460 0 -4dB 1 1 1 1 1 1 1 1 Q51A D
* C256
IHDMI@
10U_0805_10V4Z
C266
IHDMI@
C257
IHDMI@
C258
IHDMI@
C262
IHDMI@
C263
IHDMI@
C261
IHDMI@
C260
IHDMI@
0.1U_0402_16V4Z
2N7002KDW _SOT363-6
IHDMI@ 2 HDMI_HPD_R
1 0 0 340 0 0 1
2
2 2 2 2 2 2 2 2 R170 C430
1
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z IHDMI@ IHDMI@
1 0 1 400 2dB 0 Longest trace 100K_0402_5% 0.1U_0402_16V4Z
2
1
1 1 0 400 2dB 0 Longest trace
U10
1 1 1 420 0 0
+3VS OE# @
+3VS +3VS +3VS OE* 25 2 1
R159 10K_0402_5% +HDMI_5V_OUT EQ1 EQ0 Equalization
2 VCC3V
11 28 HDMI_SCLK 1 IHDMI@ 2 0 0 12dB
VCC3V SCL_SINK
1
1
15 R122 2.2K_0402_5%
R131 R158 R167 VCC3V HDMI_SDATA
21 VCC3V SDA_SINK 29 1 IHDMI@ 2
2.2K_0402_5% 2.2K_0402_5% 2.2K_0402_5% 26 R123 2.2K_0402_5% 0 1 9dB
@ IHDMI@ IHDMI@ VCC3V
33 VCC3V
40 30 HDMI_HPD_R 2 @ 1 +3VS
2
2 VCC3V HPD_SINK
46 R177 10K_0402_5% 1 0 6dB
HDMI_CG2 HDMI_CG1 HDMI_CG0 VCC3V R168 2
DDC_EN 32 1 4.7K_0402_5% +3VS
IHDMI@
1
1 1 3dB
C
R132
2.2K_0402_5%
IHDMI@
R154
2.2K_0402_5%
@
R163
2.2K_0402_5%
@
HDMI_CG0
HDMI_CG1
3
4
FUNCTION1
FUCNTION2
FUNCTION3
FUNCTION4
34
35
HDMI_EQ0
HDMI_EQ1 * +3VS +3VS C
2
1 R160 2 6 ANALOG1(REXT)
1
3.9K_0402_1% IHDMI@
7 R165 R162
19,21 PCH_HDMI_HPD HPD_SOURCE IHDMI@ 2.2K_0402_5% 2.2K_0402_5%
8 HDMI_TXC- 1 2 IHDMI@ IHDMI@
19 UMA_HDMI_DATA SDA_SOURCE R148 2.2K_0402_5%
2
9 HDMI_EQ1 HDMI_EQ0
19 UMA_HDMI_CLK SCL_SOURCE
R161
1
+3VS 2 1 PCH_HDMI_HPD For UMA HDMI level shift display compatibility issue
HDMI_CG2 10 R164 R166
10K_0402_5% ANALOG2 2.2K_0402_5% 2.2K_0402_5%
@ IHDMI@ @ @
UMA_DVI_TXC+ 13 48 HDMI_TXC+ C279 1 2 0.1U_0402_16V7K UMA_HDMI_TXC+ 19
2
UMA_DVI_TXC- OUT_D4+ IN_D4+ HDMI_TXC- C280 1
14 OUT_D4- IN_D4- 47 2 0.1U_0402_16V7K UMA_HDMI_TXC- 19
IHDMI@ IHDMI@
UMA_DVI_TXD2+ 16 45 HDMI_TX2+ C281 1 2 0.1U_0402_16V7K
OUT_D3+ IN_D3+ UMA_HDMI_TX2+ 19
UMA_DVI_TXD2- 17 44 HDMI_TX2- C282 1 2 0.1U_0402_16V7K
OUT_D3- IN_D3- UMA_HDMI_TX2- 19
UMA_DVI_TXC- 1 2 R157 HDMI_R_CK- IHDMI@ IHDMI@
IHDMI@ 0_0402_5% UMA_DVI_TXD1+ 19 42 HDMI_TX1+ C283 1 2 0.1U_0402_16V7K
OUT_D2+ IN_D2+ UMA_HDMI_TX1+ 19
@ L8 UMA_DVI_TXD1- 20 41 HDMI_TX1- C284 1 2 0.1U_0402_16V7K
OUT_D2- IN_D2- UMA_HDMI_TX1- 19
1 1 IHDMI@ IHDMI@
2 2 UMA_DVI_TXD0+ HDMI_TX0+ C285 1
22 OUT_D1+ IN_D1+ 39 2 0.1U_0402_16V7K UMA_HDMI_TX0+ 19
UMA_DVI_TXD0- 23 38 HDMI_TX0- C286 1 2 0.1U_0402_16V7K
OUT_D1- IN_D1- UMA_HDMI_TX0- 19
4 3 IHDMI@
4 3
OCE2012120YZF_0805
UMA_DVI_TXC+ 1 2 R173 HDMI_R_CK+ 1
B IHDMI@ 0_0402_5% GND B
5 GND
12 GND
18 GND
UMA_DVI_TXD0- 1 2 R175 HDMI_R_D0- 24
IHDMI@ 0_0402_5% GND
27 GND THERMAL_PAD 49
@ L9 31 GND
1 1 2 2 36 GND
37 GND
43 GND
4 4 3 3
2
HDMI_SDATA 16 +5VS 2 1 2 1 +HDMI_5V_OUT @ R186 C265
SDA
1
HDMI_SCLK 15 D53 1.1A_6V_MINISMDC110F-2 0.1U_0402_16V4Z U9 100K_0402_5% 0.1U_0402_16V4Z
SCL 1 1
4 3 14 C259 @ IHDMI@
OE#
P
4 3 Reserved IHDMI@ HDMI_HPD_R 1
13 CEC 2 A Y 4 1 2
OCE2012120YZF_0805 HDMI_R_CK- 12 20 0.1U_0402_16V4Z R691 0_0402_5%
1
CK- GND
G
UMA_DVI_TXD1+ 2
1 2 R183 HDMI_R_D1+ 11 CK_shield GND 21 IHDMI@
IHDMI@ 0_0402_5% HDMI_R_CK+ 10 22 @
3
HDMI_R_D0- CK+ GND
A 9 D0- GND 23 A
8 74AHCT1G125GW _SOT353-5
UMA_DVI_TXD2- D0_shield
1 2 R187 HDMI_R_D2- HDMI_R_D0+ 7 D0+
IHDMI@ 0_0402_5% HDMI_R_D1- 6
@ L11 D1-
5 D1_shield
1 1 HDMI_R_D1+
2 2 HDMI_R_D2-
4 D1+
3
2
D2- Security Classification Compal Secret Data Compal Electronics, Inc.
HDMI_R_D2+ D2_shield
4 4 3 3 1 D2+ Issued Date 2009/01/23 Deciphered Date 2010/01/23 Title
OCE2012120YZF_0805 @ SUYIN_100042MR019S153ZL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDMI Connector
UMA_DVI_TXD2+ 1 2 R188 HDMI_R_D2+ Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
IHDMI@ 0_0402_5% 1.0
C287
CMOS Setting, near DDR Door 15P_0402_50V8J
JCMOS 2 1
+RTCVCC 1 2PCH_RTCRST# 1 2
R282 20K_0402_1% Y3
10M_0402_5%
1
1 2 3 NC OSC 4
R283
C288 1U_0402_6.3V4Z
iME Setting. J2
2 NC OSC 1 U11A
1 2PCH_SRTCRST# 1 2 32.768KHZ_12.5PF_Q13MC14610002
2
R284 20K_0402_1% PCH_RTCX1 B13 D33
RTCX1 FWH0 / LAD0 LPC_AD0 32,33
1 2 2 1 PCH_RTCX2 D13 B33
RTCX2 FWH1 / LAD1 LPC_AD1 32,33
C289 1U_0402_6.3V4Z C290 15P_0402_50V8J C32
FWH2 / LAD2 LPC_AD2 32,33
D
FWH3 / LAD3 A32 LPC_AD3 32,33 D
PCH_RTCRST# C14 RTCRST#
FWH4 / LFRAME# C34 LPC_FRAME# 32,33
+RTCVCC PCH_SRTCRST# D17 SRTCRST#
A34 1 2
RTC
LPC
LDRQ0# +3VS
Integrated SUS 1.05V VRM Enable 1 2 SM_INTRUDER# A16 F34 R286 10K_0402_5%
R285 1M_0402_5% INTRUDER# LDRQ1# / GPIO23
High - Enable Internal VRs 1 2 PCH_INTVRMEN A14 AB9 SERIRQ
INTVRMEN SERIRQ SERIRQ 32,33
PCH_INTVRMEN (must be always pulled high) R275 330K_0402_5%
IHDA
HDA_SDIN2 SATA2RXP
SATA2TXN AF7
F32 HDA_SDIN3 SATA2TXP AF6
Flash Descriptor Security Overide Desktop Only
SATA3RXN AH3
C
Low = Enabled AZ_SDOUT B29 AH1 C
HDA_SDO SATA3RXP
HDA_DOCK_EN# High = Disabled * SATA3TXN AF3
SATA3TXP AF1
32 PW RME_CTRL# H32
SATA
HDA_DOCK_EN# / GPIO33
SATA4RXN AD9 SATA_PRX_C_DTX_N4 25
2
For EMI J30 HDA_DOCK_RST# / GPIO13 SATA4RXP AD8 SATA_PRX_C_DTX_P4 25
R118 AD6 SATA ODD
SATA4TXN SATA_PTX_DRX_N4 25
2 1 1K_0402_5% SATA4TXP AD5 SATA_PTX_DRX_P4 25
@ C19 10P_0402_50V8J @
26 AZ_BITCLK_MD R287 1 MDC@ 2 33_0402_5% PCH_JTAG_TCK M3 AD3 SATA_PRX_C_DTX_N5 25
1
JTAG
R289 1 MDC@ 2 33_0402_5% PCH_JTAG_TDO J2 AF16 +3VS
26 AZ_SYNC_MD JTAG_TDO SATAICOMPO
29 AZ_SYNC_HD R290 1 2 33_0402_5% AZ_SYNC
PCH_JTAG_RST# J4 AF15 SATAICOMP 1 2 PCH_GPIO19 R306 1 2 10K_0402_5%
TRST# SATAICOMPI +1.05VS
26 AZ_RST_MD# R291 1 MDC@ 2 33_0402_5% R295 37.4_0402_1%
29 AZ_RST_HD# R292 1 2 33_0402_5% AZ_RST# SATA_LED# R301 2 1 10K_0402_5%
High = Enabled
SPI_MOSI 2 @ 1PCH_SPI_MOSI AY1 Y9 PCH_GPIO21
B Low = Disabled (Default) R273 1K_0402_5% SPI_MOSI SATA0GP / GPIO21 B
SPI
PCH_SPI_MISO AV1 V1 PCH_GPIO19
SPI_MISO SATA1GP / GPIO19
for EMI request
IBEXPEAK-M QV20 A0_FCBGA1071
HM55R1@ PCH_SPI_CLK
+3VALW +3VALW +3VALW +3VALW
1
R385
1
@ @ @ +3VS @ 10_0402_5%
R386 R363 @ R643
200_0402_5% 200_0402_5% R536 20K_0402_5% 4MB +RTCBATT
2
200_0402_5% 1
1
1 @ C16
2
@ @ @ 2 BAS40-04_SOT23-3
0.1U_0402_16V4Z
R355 R535 @ R364 2 +RTCVCC
3 W
100_0402_5% 100_0402_5% R537 10K_0402_5%
2
100_0402_5% 7 HOLD +CHGRTC
1
2
PCH_SPI_CS0# 1 S C291
PCH_SPI_CLK 6 0.1U_0402_16V4Z
C 2
PCH_SPI_MOSI 5 2 PCH_SPI_MISO
D Q
1 2 PCH_JTAG_TCK MX25L3205DM2I-12G SO8
A
R156 51_0402_5% A
06/01 change R125 from 4.7K to 51 ohm
PCH JTAG Enable PCH JTAG Disable (Default)
PCH Pin RefDes ES1 ES2 ES1 ES2
PCH_JTAG_TDO R358 No Install 200ohm No Install No Install
R535 No Install 100ohm No Install No Install
PCH_JTAG_TMS R355 200ohm 200ohm No Install No Install Security Classification Compal Secret Data Compal Electronics, Inc.
R354 100ohm 100ohm No Install No Install 2009/01/23 2010/01/23 Title
PCH_JTAG_TDI R536 200ohm 200ohm 20Kohm No Install Issued Date Deciphered Date
R537 100ohm 100ohm 10Kohm No Install
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH-SPI/SATA/LPC/RTC/HDA
PCH_JTAG_TCK R156 51ohm 51ohm 51ohm 51ohm Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
PCH_JTAG_RST# R643 20Kohm 20Kohm No Install No Install B 1.0
+3VS
+3VALW 2 R229 1 2.2K_0402_5%
2 R230 1 2.2K_0402_5% R231 4.7K_0402_5%
5
Q3B R232 4.7K_0402_5%
2
Q3A 2N7002KDW _SOT363-6
D U11B D
5
C6 PCH_SMLCLK0 Q4B
SML0CLK
AU30
SMBus
PERN3 PCH_SMLDATA0 PCH_SMLDATA1
AT30 PERP3 SML0DATA G8 3 4 EC_SMB_DA2 32
AU32 PETN3
2
AV32 Q4A 2N7002KDW _SOT363-6
PETP3 PCH_GPIO74
SML1ALERT# / GPIO74 M14
BA32 PCH_SMLCLK1 6 1
PERN4 EC_SMB_CK2 32
BB32 E10 PCH_SMLCLK1
PERP4 SML1CLK / GPIO58 2N7002KDW _SOT363-6
BD32 PETN4
BE32 G12 PCH_SMLDATA1 +3VALW
PETP4 SML1DATA / GPIO75
PCI-E*
BF33 PCH_SMLCLK0 2.2K_0402_5% 2 1 R237
PERN5 PCH_SMLDATA0 2.2K_0402_5% R238
BH33 PERP5 CL_CLK1 T13 2 1
Controller
BG32 PCH_GPIO60 10K_0402_5% 2 1 R239
PETN5 PCH_GPIO74 10K_0402_5% R240
BJ32 PETP5 CL_DATA1 T11 2 1
EC_LID_OUT# 10K_0402_5% 2 1 R241
Link
BA34 PERN6 CL_RST1# T9
C AW34 C
PERP6
BC34 PETN6
BD34 PETP6
H1 CLKREQ_PEG# 1 2 +3VALW
PEG_A_CLKRQ# / GPIO47 R260 10K_0402_5%
AT34 PERN7
AU34 PERP7
AU36 PETN7 CLKOUT_PEG_A_N AD43
AV36 PETP7 CLKOUT_PEG_A_P AD45
NC BG34 AN4 CLK_PEG# 5
PERN8 CLKOUT_DMI_N
PEG
BJ34 PERP8 CLKOUT_DMI_P AN2 CLK_PEG 5
BG36 PETN8
BJ36 PETP8
CLKOUT_DP_N / CLKOUT_BCLK1_N AT1
CLKOUT_DP_P / CLKOUT_BCLK1_P AT3
28 CLK_LAN# AK48 CLKOUT_PCIE0N
LAN 28 CLK_LAN AK47 CLKOUT_PCIE0P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CLK/PCIE/SMBUS
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 1.0
D D
U11C
FDI_RXN0 BA18 FDI_CTX_PRX_N0 6
6 DMI_CTX_PRX_N0 BC24 DMI0RXN FDI_RXN1 BH17 FDI_CTX_PRX_N1 6
6 DMI_CTX_PRX_N1 BJ22 DMI1RXN FDI_RXN2 BD16 FDI_CTX_PRX_N2 6
6 DMI_CTX_PRX_N2 AW20 DMI2RXN FDI_RXN3 BJ16 FDI_CTX_PRX_N3 6
6 DMI_CTX_PRX_N3 BJ20 DMI3RXN FDI_RXN4 BA16 FDI_CTX_PRX_N4 6
FDI_RXN5 BE14 FDI_CTX_PRX_N5 6
6 DMI_CTX_PRX_P0 BD24 DMI0RXP FDI_RXN6 BA14 FDI_CTX_PRX_N6 6
6 DMI_CTX_PRX_P1 BG22 DMI1RXP FDI_RXN7 BC12 FDI_CTX_PRX_N7 6
6 DMI_CTX_PRX_P2 BA20 DMI2RXP
6 DMI_CTX_PRX_P3 BG20 DMI3RXP FDI_RXP0 BB18 FDI_CTX_PRX_P0 6
FDI_RXP1 BF17 FDI_CTX_PRX_P1 6
6 DMI_PTX_CRX_N0 BE22 DMI0TXN FDI_RXP2 BC16 FDI_CTX_PRX_P2 6
6 DMI_PTX_CRX_N1 BF21 DMI1TXN FDI_RXP3 BG16 FDI_CTX_PRX_P3 6
+3VALW BD20 AW16
6 DMI_PTX_CRX_N2 DMI2TXN FDI_RXP4 FDI_CTX_PRX_P4 6
6 DMI_PTX_CRX_N3 BE18 DMI3TXN FDI_RXP5 BD14 FDI_CTX_PRX_P5 6
FDI_RXP6 BB14 FDI_CTX_PRX_P6 6
1 2 PCH_SUSPW RDN BD22 BD12
6 DMI_PTX_CRX_P0 DMI0TXP FDI_RXP7 FDI_CTX_PRX_P7 6
R316 10K_0402_5% BH21
6 DMI_PTX_CRX_P1 DMI1TXP
1 2 PCH_LOW _BAT# BC20
6 DMI_PTX_CRX_P2 DMI2TXP
R318 10K_0402_5% BD18 BJ14
6 DMI_PTX_CRX_P3 DMI3TXP FDI_INT FDI_INT 6
1 2 IBEX_RI#
DMI
FDI
R320 10K_0402_5% BF13
FDI_FSYNC0 FDI_FSYNC0 6
+1.05VS 1 2 DMI_COMP BH25
R311 49.9_0402_1% DMI_ZCOMP
FDI_FSYNC1 BH13 FDI_FSYNC1 6
2 1 PM_PW ROK BF25
R329 10K_0402_5% DMI_IRCOMP
BJ12
C 2 1 PW ROK Close to PCH FDI_LSYNC0 FDI_LSYNC0 6 C
R322 10K_0402_5% BG14
FDI_LSYNC1 FDI_LSYNC1 6
2 1 LAN_RST#
R323 10K_0402_5%
2 @ 1
0_0402_5% R256
32 PM_PW ROK
PCH_RSMRST# C16 H7
RSMRST# SLP_S4# PM_SLP_S4# 32
B B
PCH_SUSPW RDN M1 P12
32 PCH_SUSPW RDN SUS_PWR_DN_ACK / GPIO30 SLP_S3# PM_SLP_S3# 32
+3VALW 1 2 PCH_ACIN P7 N2
R324 330K_0402_5% ACPRESENT / GPIO31 TP23
D26
1 2 PCH_LOW _BAT# A6 BJ10
32,34,36 ACIN BATLOW# / GPIO72 PMSYNCH PMSYNCH 5
CH751H-40PT_SOD323-2
IBEX_RI# F14 F6
RI# SLP_LAN# / GPIO29
1 2
R690 1K_0402_5%
0_0402_5% @1 2 R325
Q26 1 PCH_RSMRST#
C
32 EC_RSMRST# 3
E
2 1
MMBT3906_SOT23-3 R326
10K_0402_5%
B
2
+3VALW 2 1
A
R327 A
1
4.7K_0402_5%
D15A D15B
BAV99DW -7_SOT363 BAV99DW -7_SOT363
1 2
RSMRST# circuit R328
2.2K_0402_5%
Issued Date 2009/01/23 Deciphered Date 2010/01/23 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH-DMI/FDI/PWM
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 1.0
U11D
32 UMA_ENBKL T48 L_BKLTEN SDVO_TVCLKINN BJ46
1 2 UMA_ENBKL T47 BG46
13 UMA_ENVDD L_VDD_EN SDVO_TVCLKINP
R124 100K_0402_5%
13 PCH_PW M Y48 L_BKLTCTL SDVO_STALLN BJ48
SDVO_STALLP BG48
13 LCD_EDID_CLK AB48 L_DDC_CLK
13 LCD_EDID_DATA Y45 L_DDC_DATA SDVO_INTN BF45
SDVO_INTP BH45
1 2 LCTL_CLK AB46
+3VS L_CTRL_CLK
+3VS 1 R53 2 10K_0402_5% LCTL_DATA V48 L_CTRL_DATA
R54 10K_0402_5%
1 2 LVDS_IBG AP39 T51
LCD_EDID_CLK R55 2.37K_0402_1% LVD_IBG SDVO_CTRLCLK
D 2 1 AP41 LVD_VBG SDVO_CTRLDATA T53 D
R59 2.2K_0402_5% T15 PAD For INTEL issue (pending interrupts from the PCH for unused HDMI ports)
AT43 LVD_VREFH
2 1 LCD_EDID_DATA AT42 BG44
R60 2.2K_0402_5% LVD_VREFL DDPB_AUXN R68 100K_0402_5%
DDPB_AUXP BJ44
DDPB_HPD AU38 2 1
LVDS
13 LCD_TXCLK- AV53 LVDSA_CLK#
AV51 BD42 +3VS
13 LCD_TXCLK+ LVDSA_CLK DDPB_0N
DDPB_0P BC42
13 LCD_TXOUT0- BB47 LVDSA_DATA#0 DDPB_1N BJ42
BA52 BG42
1
13 LCD_TXOUT2- AY48 LVDSA_DATA#2 DDPB_2N BB40
AV47 BA40 R120 R121
LVDSA_DATA#3 DDPB_2P 2.2K_0402_5% 2.2K_0402_5%
DDPB_3N AW38
BB48 BA38 IHDMI@ IHDMI@
13 LCD_TXOUT0+ LVDSA_DATA0 DDPB_3P
13 LCD_TXOUT1+ BA50
2
LVDSA_DATA1
13 LCD_TXOUT2+ AY49 LVDSA_DATA2
AV48 LVDSA_DATA3 DDPC_CTRLCLK Y49 UMA_HDMI_CLK 15
DDPC_CTRLDATA AB49 UMA_HDMI_DATA 15
13 LCD_TZCLK- AP48 LVDSB_CLK# For INTEL issue (pending interrupts from the PCH for unused HDMI ports)
13 LCD_TZCLK+ AP47 LVDSB_CLK DDPC_AUXN BE44 2 1
BD44 R189 100K_0402_5%
DDPC_AUXP
13 LCD_TZOUT0- AY53 LVDSB_DATA#0 DDPC_HPD AV40 PCH_HDMI_HPD 15,21
13 LCD_TZOUT1- AT49 LVDSB_DATA#1
+3VS AU52 BE40
13 LCD_TZOUT2- LVDSB_DATA#2 DDPC_0N UMA_HDMI_TX2- 15
AT53 LVDSB_DATA#3 DDPC_0P BD40 UMA_HDMI_TX2+ 15
DDPC_1N BF41 UMA_HDMI_TX1- 15
1 2 UMA_CRT_CLK AY51 BH41
C R63 2.2K_0402_5%
13 LCD_TZOUT0+
13 LCD_TZOUT1+ AT48
LVDSB_DATA0
LVDSB_DATA1
DDPC_1P
DDPC_2N BD38
UMA_HDMI_TX1+
UMA_HDMI_TX0-
15
15
HDMI C
CRT
DDPD_2N BF37
2 R266 1CRT_IREF AD48 DAC_IREF DDPD_2P BH37
AB51 CRT_IRTN DDPD_3N BE36
1K_0402_1% BD36
DDPD_3P
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH-CRT/LVDS/HDMI/STRAP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
U11E
H40 AD0 NV_CE#0 AY9
N34 AD1 NV_CE#1 BD1
D C44 AD2 NV_CE#2 AP15 D
A38 AD3 NV_CE#3 BD8
C36 AD4
J34 AD5 NV_DQS0 AV9
A40 AD6 NV_DQS1 BG8
D45 AD7
E36 AD8 NV_DQ0 / NV_IO0 AP7
H48 AD9 NV_DQ1 / NV_IO1 AP6
E40 AD10 NV_DQ2 / NV_IO2 AT6
C40 AD11 NV_DQ3 / NV_IO3 AT9
M48 AD12 NV_DQ4 / NV_IO4 BB1
M45 AD13 NV_DQ5 / NV_IO5 AV6
F53 AD14 NV_DQ6 / NV_IO6 BB3
M40 AD15 NV_DQ7 / NV_IO7 BA4
NVRAM
M43 AD16 NV_DQ8 / NV_IO8 BE4
J36 AD17 NV_DQ9 / NV_IO9 BB6
K48 AD18 NV_DQ10 / NV_IO10 BD6
F40 AD19 NV_DQ11 / NV_IO11 BB7
+3VS C42 BC8
RP1 AD20 NV_DQ12 / NV_IO12
K46 AD21 NV_DQ13 / NV_IO13 BJ8
1 8 PCI_REQ#1 M51 BJ6
PCI_REQ#2 AD22 NV_DQ14 / NV_IO14
2 7 J52 AD23 NV_DQ15 / NV_IO15 BG6
3 6 PCI_PIRQD# K51
PCI_IRDY# AD24 @
4 5 L34 AD25 NV_ALE BD3 NV_ALE 19 1 2
F42 AY6 NV_CLE 19 R253 0_0402_5%
8.2K_0804_8P4R_5% AD26 NV_CLE
J40 AD27
G46 +3VS
RP2 AD28 @
F44 AD29 NV_RCOMP AU2 1 2
1 8 PCI_PIRQH# M47 R276 32.4_0402_1%
AD30
PCI
C 2 7 PCI_TRDY# H36 AV7 C
AD31 NV_RB#
5
3 6 PCI_FRAME# U8
4 5 PCI_PIRQA# J50 AY8 1 PLT_RST#
P
C/BE0# NV_WR#0_RE# IN1
G42 C/BE1# NV_WR#1_RE# AY5 5 BUF_PLT_RST# 4 O
8.2K_0804_8P4R_5% H47 2
C/BE2# IN2
G
G34 C/BE3# NV_WE#_CK0 AV11
1
RP3 BF5 SN74AHC1G08DCKR_SC70-5
3
PCI_STOP# PCI_PIRQA# NV_WE#_CK1
1 8 G38 PIRQA#
2 7 PCI_PIRQE# PCI_PIRQB# H51 R129
PCI_PIRQC# PCI_PIRQC# PIRQB# 100K_0402_5%
3 6 B37 PIRQC# USBP0N H18 USB20_N0 30
4 5 PCI_PIRQG# PCI_PIRQD# A44 J18 USB-RIGHT1 @
USB20_P0 30
2
PIRQD# USBP0P
USBP1N A18 USB20_N1 30
8.2K_0804_8P4R_5% PCI_REQ#0 F51 C18 USB-RIGHT2
REQ0# USBP1P USB20_P1 30
PCI_REQ#1 A46 N20
PCI_REQ#2 REQ1# / GPIO50 USBP2N
B45 REQ2# / GPIO52 USBP2P P20
PCI_REQ#3 M53 J20
REQ3# / GPIO54 USBP3N USB20_N3 25
USBP3P L20 USB20_P3 25 eSATA-USB
19 PCI_GNT#0 F48 GNT0# USBP4N F20
19 PCI_GNT#1 K45 GNT1# / GPIO51 USBP4P G20
GNT2#: Not pull low, internal pull up 20K F36 GNT2# / GPIO53 USBP5N A20 USB20_N5 26
19 PCI_GNT#3 H53 GNT3# / GPIO55 USBP5P C20 USB20_P5 26 BT
USBP6N M22
PCI_PIRQE# B41 N22
PCI_PIRQF# PIRQE# / GPIO2 USBP6P
K53 PIRQF# / GPIO3 USBP7N B21
PCI_PIRQG# A36 D21
PCI_PIRQH# PIRQG# / GPIO4 USBP7P
A48 PIRQH# / GPIO5 USBP8N H22
+3VS J22
USBP8P
USB
RP4 T37 PAD TP_PCI_RST# K6 E22
PCI_REQ#3 PCIRST# USBP9N
1 8 USBP9P F22
B PCI_PIRQF# PCI_SERR# B
2 7 E44 SERR# USBP10N A22 USB20_N10 31
3 6 PCI_PIRQB# PCI_PERR# E50 C22 Card reader(3 in 1)
PERR# USBP10P USB20_P10 31
4 5 PCI_REQ#0 G24
USBP11N USB20_N11 13
8.2K_0804_8P4R_5% PCI_IRDY# USBP11P H24 USB20_P11 13 Int. Camera
A42 IRDY# USBP12N L24
H44 PAR USBP12P M24
PCI_DEVSEL# F46 A24
DEVSEL# USBP13N USB20_N13 27
PCI_FRAME# C46 C24 WLAN
FRAME# USBP13P USB20_P13 27
+3VS PCI_PLOCK# D49
RP5 PLOCK#
USBRBIAS# B25
1 8 PCI_SERR# PCI_STOP# D41
PCI_DEVSEL# PCI_TRDY# STOP# USBBIAS
2 7
PCI_PLOCK#
C48 TRDY# USBRBIAS D25 2
R278
1
22.6_0402_1%
Within 500 mils
3 6
4 5 PCI_PERR# 1 2 PLT_RST# M7 +3VALW
R277 100K_0402_5% PME# USB_OC#0
OC0# / GPIO59 N16 USB_OC#0 30,32
8.2K_0804_8P4R_5% D5 J16 USB_OC#1 USB_OC#0 2 1
27,28,32,33 PLT_RST# PLTRST# OC1# / GPIO40 USB_OC#1 25,32
F16 USB_OC#2 10K_0402_5% R300
OC2# / GPIO41 USB_OC#3 USB_OC#1
N52 CLKOUT_PCI0 OC3# / GPIO42 L16 2 1
P53 E14 USB_OC#4 10K_0402_5% R302
CLKOUT_PCI1 OC4# / GPIO43
2 1 CLK_SIO P46 CLKOUT_PCI2 OC5# / GPIO9 G16 USB_OC#5 USB_OC#2 2 1
33 CLK_PCI_DDR 22_0402_5% R280
2 1 CLK_EC P51 CLKOUT_PCI3 OC6# / GPIO10 F12 USB_OC#6 10K_0402_5% R304
32 CLK_PCI_EC 22_0402_5% R281
17 CLK_PCILOOP 2 1 CLK_PCH P48 CLKOUT_PCI4 OC7# / GPIO14 T15 EXP_CPPE# USB_OC#3 2 1
22_0402_5% R279 10K_0402_5% R305
USB_OC#4 2 1
IBEXPEAK-M QV20 A0_FCBGA1071 10K_0402_5% R307
HM55R1@ USB_OC#5 2 1
Change to 47 ohm? 10K_0402_5% R297
A
USB_OC#6 2 1 A
10K_0402_5% R298
EXP_CPPE# 2 1
10K_0402_5% R299
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH USB/PCI/NAND
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 1.0
U11F
PCH_HDMI_HPD Y3 AH45
15,19 PCH_HDMI_HPD BMBUSY# / GPIO0 CLKOUT_PCIE6N
CLKOUT_PCIE6P AH46
GPIO8 PCH_GPIO1 C38 TACH1 / GPIO1
Not pull down PCH_GPIO6
D D37 TACH2 / GPIO6 D
Internal: Pull up 20k CLKOUT_PCIE7N AF48
MISC
EC_SCI# J32 AF47
During Reset: High 32 EC_SCI# TACH3 / GPIO7 CLKOUT_PCIE7P
Initial: High 32 EC_SMI# EC_SMI# F10 GPIO8
GPIO15 PCH_GPIO12 K9 U2 GATEA20
LAN_PHY_PWR_CTRL / GPIO12 A20GATE GATEA20 32
a Strong pull up may be needed
PCH_GPIO15 T7
for GPIO Functionality GPIO15
Internal: Pull down 20k PCH_GPIO16 AA2 AM3
SATA4GP / GPIO16 CLKOUT_BCLK0_N / CLKOUT_PCIE8N CLK_CPU_BCLK# 5
During Reset: Low PCH_GPIO17 F38 TACH0 / GPIO17 CLKOUT_BCLK0_P / CLKOUT_PCIE8P AM1 CLK_CPU_BCLK 5
Initial: Low
BT_DET# Y7 BG10
26 BT_DET# SCLOCK / GPIO22 PECI PECI 5
GPIO
H10 T1 KB_RST#
GPIO24 RCIN# KB_RST# 32
On-Die PLL VR @ PCH_GPIO27
2 1 AB12 GPIO27 PROCPWRGD BE10 H_PW RGOOD 5
CPU
High = Enabled (Default) R274 1K_0402_5%
PCH_GPIO27 PCH_GPIO28 V13 BD10 THRMTRIP_PCH# 1 2
Low = Disabled GPIO28 THRMTRIP# H_THERMTRIP# 5
R212 56_0402_1%
26,27 BT_PW R# M11 STP_PCI# / GPIO34
RST_GATE F1 AV43
5 RST_GATE PCIECLKRQ7# / GPIO46 TP6
PCH_GPIO48 AB6 AV45
SDATAOUT1 / GPIO48 TP7
GPIO57: THM_ALT# AA4 AF13
32 THM_ALT# SATA5GP / GPIO49 TP8
OPTIMUS_EN# : Pull-High
PCH_GPIO57 F8 M18
for non-support OPTIMUS GPIO57 TP9
TP10 N18
+3VS +3VS A4 AJ24
VSS_NCTF_1 TP11
PROJECT_ID A49
NCTF
VSS_NCTF_2
RSVD
A5 VSS_NCTF_3 TP12 AK41
1
PROJECT_ID0 VSS_NCTF_8
B52 VSS_NCTF_9 TP15 N32
NWQAA 16" H L B53 VSS_NCTF_10
PROJECT_ID1 BE1 M30
VSS_NCTF_11 TP16
B
*NALAA 17.3" H H BE53 VSS_NCTF_12 B
BF1 VSS_NCTF_13 TP17 N30
+3VS BF53 VSS_NCTF_14
BH1 VSS_NCTF_15 TP18 H12
BH2 VSS_NCTF_16
1 @ 2 PCH_HDMI_HPD BH52 AA23
10K_0402_5% R213 VSS_NCTF_17 TP19
BH53 VSS_NCTF_18
1 2 PCH_GPIO1 BJ1 VSS_NCTF_19 NC_1 AB45
10K_0402_5% R214 BJ2
BT_DET# VSS_NCTF_20
1 2 BJ4 VSS_NCTF_21 NC_2 AB38
8.2K_0402_5% R215 BJ49 VSS_NCTF_22
1 2 PCH_GPIO6 BJ5 VSS_NCTF_23 NC_3 AB42
10K_0402_5% R218 BJ50 VSS_NCTF_24
1 2 PCH_GPIO17 BJ52 VSS_NCTF_25 NC_4 AB41
10K_0402_5% R220 BJ53 VSS_NCTF_26
1 2 PCH_GPIO16 D1 VSS_NCTF_27 NC_5 T39
10K_0402_5% R221 D2 Not pull low
VSS_NCTF_28
1 2 PCH_GPIO38 D53 VSS_NCTF_29
10K_0402_5% R255 E1 P6 internal pull up
VSS_NCTF_30 INIT3_3V#
1 2 THM_ALT# E53 VSS_NCTF_31
10K_0402_5% R259 C10 Internal: Pull up 20k
TP24
1 2 PCH_GPIO48 During Reset: High
10K_0402_5% R257 IBEXPEAK-M QV20 A0_FCBGA1071
1 2 PCH_GPIO39 HM55R1@ Initial: High
10K_0402_5% R216
1 2 EC_SCI#
10K_0402_5% R224
+3VALW
A A
1 2 EC_SMI#
R225 10K_0402_5%
1 2 PCH_GPIO57
R226 10K_0402_5%
1 2 PCH_GPIO15
R227 1K_0402_5% Security Classification Compal Secret Data Compal Electronics, Inc.
1 2 PCH_GPIO28 Issued Date 2009/01/23 Deciphered Date 2010/01/23 Title
R242 10K_0402_5%
1 2 RST_GATE THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH CPU/GPIO
R223 10K_0402_5% Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
2 PCH_GPIO12 B 1.0
WWW.AliSaler.Com
1
10K_0402_5% R219
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NALAA LA-6041P M/B
Date: Tuesday, April 13, 2010 Sheet 21 of 48
5 4 3 2 1
5 4 3 2 1
+1.05VS +3VS
U11G POWER +3VS_VCCADAC
AB24 VCCCORE[1] VCCADAC[1] AE50 1 2 +3VS_VCCADAC_R L57 1 2
1 1 AB26 69mA 1 2 1 L12 1_0603_1% BLM18PG181SN1D_2P
C295 C294 VCCCORE[2]
AB28 VCCCORE[3] VCCADAC[2] AE52
10U_0805_10V4Z 1U_0402_6.3V4Z AD26 C296 C297 C298
VCCCORE[4]
CRT
D AD28 AF53 0.01U_0402_25V7K 0.1U_0402_16V4Z 10U_0805_10V4Z D
2 2 VCCCORE[5] VSSA_DAC[1] 2 1 2
AF26 VCCCORE[6]
VCC CORE
AF28 VCCCORE[7] VSSA_DAC[2] AF51
AF30 VCCCORE[8] close to AE50
AF31 VCCCORE[9]
AH26 VCCCORE[10]
AH28 VCCCORE[11]
AH30 VCCCORE[12]
AH31 VCCCORE[13] > 1mA VCCALVDS AH38 +3VS
AJ30 VCCCORE[14]
AJ31 VCCCORE[15] VSSA_LVDS AH39
+1.8VS
LVDS
VCCTX_LVDS[3] C300 C299
AK24 VCCIO[24] VCCTX_LVDS[4] AT45
0.01U_0402_25V7K 0.01U_0402_25V7K
+3VS 2 2
BJ24 VCCAPLLEXP 40mA
VCC3_3[2] AB34
HVCMOS
VCCIO[26] 0.1U_0402_16V4Z
AN23 VCCIO[27] VCC3_3[4] AD35
AN24 C303
VCCIO[28]
AN26 VCCIO[29] 1
AN28 VCCIO[30] close to AB34
BJ26 VCCIO[31]
C BJ28 C
VCCIO[32]
AT26 VCCIO[33]
AT28 VCCIO[34]
+1.05VS AU26 VCCIO[35] +PCH_VRM
AU28 VCCIO[36]
1 2 AV26 VCCIO[37]
C304 10U_0805_10V4Z AV28 196mA AT24
VCCIO[38] VCCVRM[2]
1 2 AW26 VCCIO[39]
C305 1U_0402_6.3V4Z AW28 3062mA
VCCIO[40] +VTT
DMI
1 2 BA26 VCCIO[41] VCCDMI[1] AT16
C306 1U_0402_6.3V4Z BA28 61mA
VCCIO[42] +PCH_VCCDMI +PCH_VRM +1.8VS
1 2 BB26 VCCIO[43] VCCDMI[2] AU16 1 2
C307 1U_0402_6.3V4Z BB28 1 R335 0_0603_5%
VCCIO[44] C309
1 2 BC26 VCCIO[45] 2 1
PCI E*
C308 1U_0402_6.3V4Z BC28 1U_0402_6.3V4Z R336 0_0402_5%
VCCIO[46]
BD26 VCCIO[47] 2
BD28 VCCIO[48] close to AT16
BE26 VCCIO[49] VCCPNAND[1] AM16
BE28 VCCIO[50] VCCPNAND[2] AK16
BG26 VCCIO[51] VCCPNAND[3] AK20
BG28 AK19 +1.8VS_PCH_NAND +1.8VS
VCCIO[52] VCCPNAND[4]
BH27 VCCIO[53] VCCPNAND[5] AK15
156mA VCCPNAND[6] AK13 1
R338
2
0_0603_5%
AN30 VCCIO[54] VCCPNAND[7] AM12 2
NAND / SPI
AN31 VCCIO[55] VCCPNAND[8] AM13
+3VS AM15 C311
VCCPNAND[9] 0.1U_0402_16V4Z
1
2 1 AN35 VCC3_3[1] 375mA close to Ak13
C310 0.1U_0402_16V4Z
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH POWER-1
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 1.0
USB
C391 C322 C318 VCCME[2] VCCSUS3_3[11]
VCCSUS3_3[12] L26
If two VccME rails can be 22U_0805_6.3V6M 22U_0805_6.3V6M 1U_0402_6.3V4Z AD41 J28 0.1U_0402_16V4Z 0.1U_0402_16V4Z
@2 2 2 VCCME[3] VCCSUS3_3[13] 1 1
J26
combined, only total 2 x 22 ȝF and AF43
VCCSUS3_3[14]
H28
VCCME[4] VCCSUS3_3[15]
2 x 1 ȝF caps are necessary 163mA VCCSUS3_3[16] H26
AF41 VCCME[5] VCCSUS3_3[17] G28
1849mA VCCSUS3_3[18] G26
AF42 VCCME[6] VCCSUS3_3[19] F28
Near V39 VCCSUS3_3[20] F26
V39 E28 +3VALW +5VALW
VCCME[7] VCCSUS3_3[21]
1 1 1 E26
CH751H-40PT_SOD323-2
C447 C323 C324 VCCME[8] VCCSUS3_3[23]
VCCSUS3_3[24] C26
1
22U_0805_6.3V6M 22U_0805_6.3V6M 1U_0402_6.3V4Z V42 B27
2 @2 2 VCCME[9] VCCSUS3_3[25] D16 R344
VCCSUS3_3[26] A28
Y39 VCCME[10] VCCSUS3_3[27] A26
100_0402_1%
Y41 U23
2
VCCME[11] VCCSUS3_3[28] +3VS +5VS
Y42 VCCME[12] VCCIO[56] V23 +1.05VS
1
F24 +PCH_VCC5REFSUS 2 1
V5REF_SUS C326 1U_0402_6.3V4Z D17 R346
+VCCRTCEXT
> 1mA
C 1 2 V9 DCPRTC CH751H-40PT_SOD323-2 C
C327 0.1U_0402_16V4Z 100_0402_1%
2
+1.05VS L17 1 2 196mA > 1mA K49 +PCH_VCC5REF +PCH_VCC5REF
10UH_LB2012T100MR_20% V5REF
1 +PCH_VRM AU24
PCI/GPIO/LPC
VCCVRM[3]
1 1
1
SATA
C343 0.1U_0402_16V4Z VCCSUS3_3[30] IN OUT
PCI/GPIO/LPC
VCCIO[10] AH19 +1.05VS
U20 VCCSUS3_3[31] 1 1
1
C342 C2 GND
VCCIO[11] AD20
U22 1U_0402_6.3V4Z 1U_0603_10V6K @ C18
VCCSUS3_3[32] @ 1 4.7U_0603_6.3V6K
AF22
2
+3VS VCCIO[12] 2 2 @
375mA VCCIO[13] AD19
1
C344
2
0.1U_0402_16V4Z
V15 VCC3_3[5] 3062mA VCCIO[14] AF20
VCCIO[15] AF19
V16 VCC3_3[6] VCCIO[16] AH20
VCCME[13]
VCCME[14] Y34 +PCH_VCCME2 R352 1 2 0_0402_5%
C345 2 2 C347 2 AU18 V_CPU_IO[2] 1849mA VCCME[15] Y35 +PCH_VCCME3 R353 1 2 0_0402_5%
4.7U_0603_6.3V6K 0.1U_0402_16V4Z AA35 +PCH_VCCME4 R354 1 2 0_0402_5%
+RTCVCC VCCME[16]
1 C3461 1
RTC
1 2 A12 2mA 6mA L30 +VCCSUSHDA R356 1 2 0_0402_5% +3VALW VCCSUSHDA can be
VCCRTC VCCSUSHDA
HDA
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH POWER-2
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
NALAA LA-6041P M/B
WWW.AliSaler.Com
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 13, 2010 Sheet 23 of 48
5 4 3 2 1
5 4 3 2 1
U11I
AY7 VSS[159] VSS[259] H49
B11 H5 U11H
VSS[160] VSS[260]
B15 VSS[161] VSS[261] J24 AB16 VSS[0]
B19 VSS[162] VSS[262] K11
B23 VSS[163] VSS[263] K43 AA19 VSS[1] VSS[80] AK30
B31 VSS[164] VSS[264] K47 AA20 VSS[2] VSS[81] AK31
B35 VSS[165] VSS[265] K7 AA22 VSS[3] VSS[82] AK32
B39 VSS[166] VSS[266] L14 AM19 VSS[4] VSS[83] AK34
B43 VSS[167] VSS[267] L18 AA24 VSS[5] VSS[84] AK35
B47 VSS[168] VSS[268] L2 AA26 VSS[6] VSS[85] AK38
D B7 VSS[169] VSS[269] L22 AA28 VSS[7] VSS[86] AK43 D
BG12 VSS[170] VSS[270] L32 AA30 VSS[8] VSS[87] AK46
BB12 VSS[171] VSS[271] L36 AA31 VSS[9] VSS[88] AK49
BB16 VSS[172] VSS[272] L40 AA32 VSS[10] VSS[89] AK5
BB20 VSS[173] VSS[273] L52 AB11 VSS[11] VSS[90] AK8
BB24 VSS[174] VSS[274] M12 AB15 VSS[12] VSS[91] AL2
BB30 VSS[175] VSS[275] M16 AB23 VSS[13] VSS[92] AL52
BB34 VSS[176] VSS[276] M20 AB30 VSS[14] VSS[93] AM11
BB38 VSS[177] VSS[277] N38 AB31 VSS[15] VSS[94] BB44
BB42 VSS[178] VSS[278] M34 AB32 VSS[16] VSS[95] AD24
BB49 VSS[179] VSS[279] M38 AB39 VSS[17] VSS[96] AM20
BB5 VSS[180] VSS[280] M42 AB43 VSS[18] VSS[97] AM22
BC10 VSS[181] VSS[281] M46 AB47 VSS[19] VSS[98] AM24
BC14 VSS[182] VSS[282] M49 AB5 VSS[20] VSS[99] AM26
BC18 VSS[183] VSS[283] M5 AB8 VSS[21] VSS[100] AM28
BC2 VSS[184] VSS[284] M8 AC2 VSS[22] VSS[101] BA42
BC22 VSS[185] VSS[285] N24 AC52 VSS[23] VSS[102] AM30
BC32 VSS[186] VSS[286] P11 AD11 VSS[24] VSS[103] AM31
BC36 VSS[187] VSS[287] AD15 AD12 VSS[25] VSS[104] AM32
BC40 VSS[188] VSS[288] P22 AD16 VSS[26] VSS[105] AM34
BC44 VSS[189] VSS[289] P30 AD23 VSS[27] VSS[106] AM35
BC52 VSS[190] VSS[290] P32 AD30 VSS[28] VSS[107] AM38
BH9 VSS[191] VSS[291] P34 AD31 VSS[29] VSS[108] AM39
BD48 VSS[192] VSS[292] P42 AD32 VSS[30] VSS[109] AM42
BD49 VSS[193] VSS[293] P45 AD34 VSS[31] VSS[110] AU20
BD5 VSS[194] VSS[294] P47 AU22 VSS[32] VSS[111] AM46
BE12 VSS[195] VSS[295] R2 AD42 VSS[33] VSS[112] AV22
BE16 VSS[196] VSS[296] R52 AD46 VSS[34] VSS[113] AM49
BE20 VSS[197] VSS[297] T12 AD49 VSS[35] VSS[114] AM7
C BE24 T41 AD7 AA50 C
VSS[198] VSS[298] VSS[36] VSS[115]
BE30 VSS[199] VSS[299] T46 AE2 VSS[37] VSS[116] BB10
BE34 VSS[200] VSS[300] T49 AE4 VSS[38] VSS[117] AN32
BE38 VSS[201] VSS[301] T5 AF12 VSS[39] VSS[118] AN50
BE42 VSS[202] VSS[302] T8 Y13 VSS[40] VSS[119] AN52
BE46 VSS[203] VSS[303] U30 AH49 VSS[41] VSS[120] AP12
BE48 VSS[204] VSS[304] U31 AU4 VSS[42] VSS[121] AP42
BE50 VSS[205] VSS[305] U32 AF35 VSS[43] VSS[122] AP46
BE6 VSS[206] VSS[306] U34 AP13 VSS[44] VSS[123] AP49
BE8 VSS[207] VSS[307] P38 AN34 VSS[45] VSS[124] AP5
BF3 VSS[208] VSS[308] V11 AF45 VSS[46] VSS[125] AP8
BF49 VSS[209] VSS[309] P16 AF46 VSS[47] VSS[126] AR2
BF51 VSS[210] VSS[310] V19 AF49 VSS[48] VSS[127] AR52
BG18 VSS[211] VSS[311] V20 AF5 VSS[49] VSS[128] AT11
BG24 VSS[212] VSS[312] V22 AF8 VSS[50] VSS[129] BA12
BG4 VSS[213] VSS[313] V30 AG2 VSS[51] VSS[130] AH48
BG50 VSS[214] VSS[314] V31 AG52 VSS[52] VSS[131] AT32
BH11 VSS[215] VSS[315] V32 AH11 VSS[53] VSS[132] AT36
BH15 VSS[216] VSS[316] V34 AH15 VSS[54] VSS[133] AT41
BH19 VSS[217] VSS[317] V35 AH16 VSS[55] VSS[134] AT47
BH23 VSS[218] VSS[318] V38 AH24 VSS[56] VSS[135] AT7
BH31 VSS[219] VSS[319] V43 AH32 VSS[57] VSS[136] AV12
BH35 VSS[220] VSS[320] V45 AV18 VSS[58] VSS[137] AV16
BH39 VSS[221] VSS[321] V46 AH43 VSS[59] VSS[138] AV20
BH43 VSS[222] VSS[322] V47 AH47 VSS[60] VSS[139] AV24
BH47 VSS[223] VSS[323] V49 AH7 VSS[61] VSS[140] AV30
BH7 VSS[224] VSS[324] V5 AJ19 VSS[62] VSS[141] AV34
C12 VSS[225] VSS[325] V7 AJ2 VSS[63] VSS[142] AV38
C50 VSS[226] VSS[326] V8 AJ20 VSS[64] VSS[143] AV42
B B
D51 VSS[227] VSS[327] W2 AJ22 VSS[65] VSS[144] AV46
E12 VSS[228] VSS[328] W52 AJ23 VSS[66] VSS[145] AV49
E16 VSS[229] VSS[329] Y11 AJ26 VSS[67] VSS[146] AV5
E20 VSS[230] VSS[330] Y12 AJ28 VSS[68] VSS[147] AV8
E24 VSS[231] VSS[331] Y15 AJ32 VSS[69] VSS[148] AW14
E30 VSS[232] VSS[332] Y19 AJ34 VSS[70] VSS[149] AW18
E34 VSS[233] VSS[333] Y23 AT5 VSS[71] VSS[150] AW2
E38 VSS[234] VSS[334] Y28 AJ4 VSS[72] VSS[151] BF9
E42 VSS[235] VSS[335] Y30 AK12 VSS[73] VSS[152] AW32
E46 VSS[236] VSS[336] Y31 AM41 VSS[74] VSS[153] AW36
E48 VSS[237] VSS[337] Y32 AN19 VSS[75] VSS[154] AW40
E6 VSS[238] VSS[338] Y38 AK26 VSS[76] VSS[155] AW52
E8 VSS[239] VSS[339] Y43 AK22 VSS[77] VSS[156] AY11
F49 VSS[240] VSS[340] Y46 AK23 VSS[78] VSS[157] AY43
F5 VSS[241] VSS[341] P49 AK28 VSS[79] VSS[158] AY47
G10 VSS[242] VSS[342] Y5
G14 Y6 IBEXPEAK-M QV20 A0_FCBGA1071
VSS[243] VSS[343] HM55R1@
G18 VSS[244] VSS[344] Y8
G2 VSS[245] VSS[345] P24
G22 VSS[246] VSS[346] T43
G32 VSS[247] VSS[347] AD51
G36 VSS[248] VSS[348] AT8
G40 VSS[249] VSS[349] AD47
G44 VSS[250] VSS[350] Y47
G52 VSS[251] VSS[351] AT12
AF39 VSS[252] VSS[352] AM6
H16 VSS[253] VSS[353] AT13
H20 VSS[254] VSS[354] AM5
A H30 VSS[255] VSS[355] AK45 A
H34 VSS[256] VSS[356] AK39
H38 VSS[257] VSS[366] AV14
H42 VSS[258]
JHDD
GND 1
2 SATA_PTX_C_DRX_P1 C369 1 2 0.01U_0402_25V7K
A+ SATA_PTX_DRX_P1 16
3 SATA_PTX_C_DRX_N1 C367 1 2 0.01U_0402_25V7K
A- SATA_PTX_DRX_N1 16
GND 4
5 SATA_PRX_DTX_N1 C368 1 2 0.01U_0402_25V7K
B- SATA_PRX_C_DTX_N1 16
6 SATA_PRX_DTX_P1 C370 1 2 0.01U_0402_25V7K
B+ SATA_PRX_C_DTX_P1 16
GND 7
V33 8 +3VS
V33 9
V33 10
C 11 C
GND
GND 12
GND 13
V5 14 +5VS
V5 15
V5 16
GND 17
Reserved 18
GND 19
V12 20
V12 21
V12 22
@ SUYIN_127072FR022G210ZR_RV
+USB_VCCB
eSATA/USB W=60mils
220U_6.3V_M_R15 1000P_0402_50V7K
B
1 1 1 B
Reserve for EMI request +
C379
@ R72 0_0402_5% C380 C381
2 2
1 2
2
L52 @ D18 0.1U_0402_16V4Z
2
20 USB20_N3 1 2 USB20_N3_R 1
1 2
3
4 3 USB20_P3_R AZC199-02S.R7G_SOT23-3
eSATA/USB Conn
20 USB20_P3 4 3 JESATA
W CM-2012-900T_0805 1 USB
USB20_N3_R VBUS
2 D-
@ R85 0_0402_5% USB20_P3_R 3 D+
1 2 4 GND
5 GND
C385 1 2 0.01U_0402_25V7K SATA_PTX_C_DRX_P5 6
16 SATA_PTX_DRX_P5 A+ ESATA
C386 1 2 0.01U_0402_25V7K SATA_PTX_C_DRX_N5 7
16 SATA_PTX_DRX_N5 A-
8 GND
C387 1 2 0.01U_0402_25V7K SATA_PRX_DTX_N5 9
16 SATA_PRX_C_DTX_N5 B-
W=60mils C388 1 2 0.01U_0402_25V7K SATA_PRX_DTX_P5 10
16 SATA_PRX_C_DTX_P5 B+
11
+5VALW
U15
2A +USB_VCCB GND
12 GND
1 GND VOUT 8 13 GND
2 VIN VOUT 7 14 GND
A 3 VIN VOUT 6 15 GND A
30,32 USB_EN# USB_EN# 4 5
EN FLG USB_OC#1 20,32
@ TYCO_1759576-1
RT9715BGS_SO8 1
C383
4.7U_0805_10V4Z
@
2 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/01/23 Deciphered Date 2010/01/23 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SATA-HDD/ODD/ESATA
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
1.0
+3VS +3VS
2
2
R361 C396 +MDC_VCC
100K_0402_5% 0.1U_0402_16V7K
2
BT@ @
3
1 S
R392 +3VALW 2 1
1
G
21,27 BT_PW R# 1 2 2 0_0603_5% MDC@ R44 0_0402_5% 1 1 1
R362 47K_0402_5% 1 +1.5VALW 2 1
BT@ C390 D Q28 BT@ @ R45 0_0402_5% C392 C393 C395
1
0.01U_0402_25V7K AO3413_SOT23 0.1U_0402_16V4Z 1000P_0402_50V7K 4.7U_0805_10V4Z
BT@ 2 MDC@ 2 MDC@ 2 MDC@
2 For HDA power rail to +3.3V(default) / +1.5V
D +BT_VCC D
(MAX=200mA) JMDC
+BT_VCC
1 GND1 RES0 2 +MDC_VCC
1 1 16 AZ_SDOUT_MD 3 IAC_SDATA_OUT RES1 4
C488 C487 Bluetooth Connector 5 6 +3VALW
BT@ BT@ GND2 3.3V
16 AZ_SYNC_MD 7 IAC_SYNC GND3 8
4.7U_0805_10V4Z 0.1U_0402_16V4Z 2 1 AZ_SDIN1_MD_R 9 10
2 2 16 AZ_SDIN1_MD IAC_SDATA_IN GND4
R369 33_0402_5% MDC@ 11 12
16 AZ_RST_MD# IAC_RESET# IAC_BITCLK AZ_BITCLK_MD 16
JBT
1
GND
GND
GND
GND
GND
GND
1
2 2
20 USB20_P5 3 3
4 ACES_88018-124G
20 USB20_N5
13
14
15
16
17
18
BT@ R442 1 4
21 BT_RST# 2 0_0402_5% BT_RESET# 5 5 G1 7 @
1 21 BT_DET# 6 6 G2 8
Connector for MDC Rev1.5
C489 BT@ @ ACES_87213-0600G
0.1U_0402_16V4Z 2
KEYBOARD KSO16 1
C401
2
100P_0402_50V8J
JTOUCH
KSO17 1 2 1
CONN. for 17" KSO2
C402
1
100P_0402_50V8J
2
32
32
TP_CLK
TP_DATA
+5VS
2
3
1
2
3
C404 100P_0402_50V8J 4
34 SW _L 4
KSO1 1 2 5 7
34 SW _R 5 G7
C405 100P_0402_50V8J D57 6 8
KSI[0..7] KSO0 6 G8
KSI[0..7] 32 1 2 2
C406 100P_0402_50V8J 1 P-TW O_161021-06021
KSO[0..17] KSO4 1 2 3 @
KSO[0..17] 32
C407 100P_0402_50V8J
KSO3 1 2 AZ5125-02S.R7G_SOT23-3
C408 100P_0402_50V8J
JKB KSO5 1 2
JKB34 1 2 +3VS C409 100P_0402_50V8J
34 KSO16 R372 300_0402_5% KSO14 1 2
33
32
31
KSO17 KSO6
C410
1
100P_0402_50V8J
2
Touch ON OFF/B Connector
C411 100P_0402_50V8J
30 KSO7
29 1 2
KSO2 C412 100P_0402_50V8J
28 KSO1 KSO13 JTPB
27 1 2
KSO0 C413 100P_0402_50V8J 1 KSO0 SW 4
26 KSO4 KSO8 1 KSI6 KSI6 KSO0
25 1 2 2 2 1 3
KSO3 C415 100P_0402_50V8J 3
24 KSO5 KSO9 3
23 1 2 4 4 2 4
B KSO14 C416 100P_0402_50V8J B
22 GND 5
KSO6 KSO10 1 2 6 NTC017-DA1J-D160T
6
5
21 KSO7 C417 100P_0402_50V8J GND
20 KSO13 KSO11 @ P-TW O_161011-04021
19 1 2
KSO8 C418 100P_0402_50V8J
18 KSO9 KSO12
17 1 2
KSO10 C419 100P_0402_50V8J
16 KSO11 KSO15
15 1 2
KSO12 C420 100P_0402_50V8J
14 KSO15 KSI7
13 1 2
KSI7 C421 100P_0402_50V8J
12 KSI2 KSI2
11 1 2
KSI3 C422 100P_0402_50V8J
10 KSI4 KSI3
9 1 2
KSI0 C423 100P_0402_50V8J
8 KSI5 KSI4
7 1 2
KSI6 C424 100P_0402_50V8J
6 KSI1 KSI0
5 1 2
JKB4 2 1 +3VS C425 100P_0402_50V8J
4 CAPS_LED# R376 300_0402_5% KSI5
3 CAPS_LED# 32 1 2
C427 100P_0402_50V8J
2 NUM_LED# KSI6
1 NUM_LED# 32 1 2
C429 100P_0402_50V8J
@ ACES_88170-3400 KSI1 1 2
C431 100P_0402_50V8J
CAPS_LED# 1 2
C433 100P_0402_50V8J
NUM_LED# 1 2
A
C435 100P_0402_50V8J A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
BT/MDC/KB/TP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
1.0
1
CM1 CM2 CM3 C253
47P_0402_50V8J
2
2 2 2 @
0.01U_0402_25V7K 4.7U_0805_10V4Z
1
JW LAN
1 2 CM7 CM8 CM9 C254
1 2 47P_0402_50V8J
3 4
2
BT_CTRL 3 4 2 2 2 @
5 5 6 6
7 8 0.01U_0402_25V7K 4.7U_0805_10V4Z
17 CLKREQ_W LAN# 7 8
9 9 10 10
1
D
17 CLK_W LAN# 11 11 12 12
21,26 BT_PW R# 2 Q25 13 14
17 CLK_W LAN 13 14
G 2N7002_SOT23-3 15 16
15 16
S 17 18
3
17 18 W L_OFF#
19 19 20 20 W L_OFF# 32
21 22 PLT_RST#
21 22 PLT_RST# 20,28,32,33
17 PCIE_PRX_W LANTX_N2 23 23 24 24
17 PCIE_PRX_W LANTX_P2 25 25 26 26
WLAN&BT Combo module circuits 27 27 28 28
29 29 30 30 PM_SMBCLK 11,12,13,17
BT BT 17 PCIE_PTX_C_W LANRX_N2 31 31 32 32 PM_SMBDATA 11,12,13,17
on module on module 17 PCIE_PTX_C_W LANRX_P2 33 33 34 34
35 35 36 36 USB20_N13 20
Enable Disable 37 37 38 38 USB20_P13 20
+3VS 39 39 40 40
41 41 42 42
BT_CRTL HI LO 43 43 44 44
45 45 46 46
47 47 48 48
BT_PWR# LO HI 32 E51_TXD 1 2 49 49 50 50
32 E51_RXD 1R16 0_0402_5%
2 51 51 52 52
R17 0_0402_5%
53 GND1 GND2 54
Debug card using
FOX_AS0B226-S40N-7F
@
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCIe-WLAN
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS NALAA LA-6041P M/B
WWW.AliSaler.Com
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 13, 2010 Sheet 27 of 48
A B C D E
UL1
17 PCIE_PRX_C_LANTX_P1 CL1 1 2 0.1U_0402_16V7K PCIE_PRX_LANTX_P1 22 HSOP LED3/EEDO 31 LL1,CL13 will be changed to CL4,CL5,CL6,CL7 close to
37 LAN_SK_LINK# +LAN_VDD10
CL2 PCIE_PRX_LANTX_N1 LED1/EESK LAN_ACTIVITY#
2.2uH&4.7uF after EVT test Pin 27,39,47,48
17 PCIE_PRX_C_LANTX_N1 1 2 0.1U_0402_16V7K 23 40
HSON LED0 LL1 +3V_LAN
17 30 RL2 2 1 10K_0402_5% +LAN_REGOUT 1 2
17 PCIE_PTX_C_LANRX_P1 HSIP EECS/SCL
18 32 RL1 2 1 10K_0402_5% 2.2UH +-5% NLC252018T-2R2J-N
17 PCIE_PTX_C_LANRX_N1 HSIN EEDI/SDA
1 2 1 2
Layout Note: LL1 must be 0.1U_0402_16V4Z CL4
1 RL19 0_0402_5% 16 1 LAN_MDI0+ within 200mil to Pin36, CL13 CL9 1 2 1
17 CLKREQ_LAN# CLKREQB MDIP0
2 LAN_MDI0- CL13,CL9 must be within 4.7U_0603_6.3V6K 0.1U_0402_16V4Z 0.1U_0402_16V4Z CL5
MDIN0 LAN_MDI1+ 200mil to LL1 2 1
20,27,32,33 PLT_RST# 25 PERSTB MDIP1 4 1 2
5 LAN_MDI1- +LAN_REGOUT: Width =60mil 0.1U_0402_16V4Z CL6
MDIN1
17 CLK_LAN 19 REFCLK_P NC/MDIP2
7 1 2
20 8 0.1U_0402_16V4Z CL7
17 CLK_LAN# REFCLK_N NC/MDIN2
NC/MDIP3 10
11
+3V_LAN LAN_X1 NC/MDIN3
43
CKXTAL1
1 2 EC_SW I# LAN_X2 44 CKXTAL2 DVDD10 13 +LAN_VDD10
RL3 @ 100K_0402_5% 29 +LAN_VDD10 +LAN_EVDD10
DVDD10
DVDD10 41
EC_SW I# 28 2 1
18 EC_SW I# LANWAKEB 0_0603_5% LL2 1 2 CL19,CL20,CL21,CL22 close to
+3VS ISOLATEB 26 27
ISOLATEB DVDD33 +3V_LAN Pin 3,13,29,45
39 CL18 CL17
+3V_LAN DVDD33 1U_0402_6.3V4Z 0.1U_0402_16V4Z +LAN_VDD10
1
14 12 2 1
NC/SMBCLK AVDD33 +3V_LAN
RL6 15 42 +3V_AVDDXTAL 1 2
1K_0402_1% NC/SMBDATA AVDD33
1 RL22 2 1K_0402_5% 38 GPO/SMBALERT AVDD33 47 Close to Pin 21 0.1U_0402_16V4Z CL19
RL22 need always pull-high 48 1 2
for RTL8105E Efuse mode AVDD33 0.1U_0402_16V4Z CL20
2
Vgs=-4.5V,Id=3A,Rds<97mohm 1 150_0402_5%
RL25 2 1 11 16
100K_0402_5% ENSW REG CL11 +3V_LAN RL17 150_0402_5% Amber LED+ SHLD4
2
CL12 0.1U_0402_16V4Z 8 15
0.1U_0402_16V7K QL1 2 PR4- SHLD3
1
S
RL23 CL11 close to pin42 7
1 G PR4+
32 W OL_EN# 1 2 2 0_0402_5%
RL16 47K_0402_5% @ RJ45_MIDI1- 6
D PR2-
1
1
CL14 AO3413_SOT23 5
3 0.01U_0402_25V7K +3V_LAN PR3- 3
YL1
LAN_X1 1 2 LAN_X2 4
2 PR3+
25MHZ_20PF_7A25000012 RJ45_MIDI1+ 3
PR2+
1 1 1 1 2
CL24 RJ45_MIDI0- 2
CL15 CL8 1U_0402_6.3V4Z CL26 CL27 PR1-
14
4.7U_0805_10V4Z 27P_0402_50V8J 27P_0402_50V8J 68P_0402_50V8J RJ45_MIDI0+ SHLD2
1
@ 2 2 2 2 1 PR1+
LAN_SK_LINK# 2 RL14 1 LAN_SK_LINK#_R 10 13
150_0402_5% Green LED- SHLD1
2 1 9
+3V_LAN RL18 150_0402_5% Green LED+
LIYO_101005-00803-3
@
UL3
LAN_MDI0+ 1 16 RJ45_MIDI0+
LAN_MDI0- TD+ TX+ RJ45_MIDI0- CL42 1000P_0402_50V7K RJ45_GND
2
TD- TX-
15 1 2 1000P_1808_3KV7K LANGND
3 14 2 1 1 2 CL36 1 1
CT CT RL15 75_0402_1% CL37 CL38
4 13
NC NC CL41 1000P_0402_50V7K
5 12
NC NC RJ45_GND 0.1U_0402_16V4Z 4.7U_0603_6.3V6K
6 11 2 1 1 2
LAN_MDI1+ CT CT RJ45_MIDI1+ RL13 75_0402_1% 2 2
7 10
LAN_MDI1- RD+ RX+ RJ45_MIDI1-
8 9
RD- RX-
0.1U_0402_25V4K
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RTL8105E 10/100 LAN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom NALAA LA-6041P M/B 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 13, 2010 Sheet 28 of 48
A B C D E
WWW.AliSaler.Com
5 4 3 2 1
Pin36 Pin25
Codec RA2
+PVDD1 0.1U_0402_16V4Z 2 1 0.1U_0402_16V4Z +5VS
1 1 0_0603_1% 1 1
CA57 CA44 Pin37 Pin24
+DVDD_IO CA56 CA43
2
Pin38
JA1 2 2 2 2
2
1 2 0.1U_0402_16V4Z JUMP_43X39 10U_0805_10V4Z 10U_0805_10V4Z Pin39
+3VS
RA19 0_0603_5%
1
1 1 @ place close to chip
CA2 CA1
1
+1.5VS 1 2
D @ RA20 0_0603_5% 10U_0805_10V4Z +3VS_DVDD RA11 D
2 2 +PVDD2 0.1U_0402_16V4Z
2 1
RA1 0.1U_0402_16V4Z
1
CA61
1 0_0603_1%
@ CA62
1 1
+5VS
ALC259-GR
+3VS 2 1 @ CA63 @ @ CA58
0_0603_1% 1 1 0.1U_0402_16V4Z
2 2 2 2
CA8 CA7 +AVDD 10U_0805_10V4Z 10U_0805_10V4Z
10U_0805_10V4Z RA3
2 2 10U_0805_10V4Z 0.1U_0402_16V4Z 2 1 +5VS
0_0603_1%
39
46
25
38
1 1 1 1
9
UA1 CA3 CA4 CA5 CA6 Pin48 Pin13
PVDD1
PVDD2
AVDD1
AVDD2
DVDD_IO
DVDD
2 2 2 2
place close to chip
10U_0805_10V4Z 0.1U_0402_16V4Z ANALOG
Pin1 Pin12
23 40 SPKL+ 30
Moat
LINE1_L SPK_OUT_L+
24 LINE1_R SPK_OUT_L- 41 SPKL- 30 DIGITAL
14 45
(Include Themal PAD)
LINE2_L SPK_OUT_R+ SPKR+ 30
15 LINE2_R SPK_OUT_R- 44 SPKR- 30
4.7U_0805_10V4Z CA23
2 1 21 32 RA4 75_0402_1%
30 MIC1_R_L MIC1_L HP_OUT_L HP_L 30
Ext. Mic 22 MIC1_R HP_OUT_R 33
RA5 75_0402_1% Beep sound
30 MIC1_R_R 2 1 HP_R 30
16 MIC2_L
C 4.7U_0805_10V4Z CA29 17 C
MIC2_R
10
SYNC AZ_SYNC_HD 16 EC Beep RA7
13 INT_MIC_DATA 2 GPIO0/DMIC_DATA BCLK 6 AZ_BITCLK_HD 16 32 EC_BEEP# 1 2
47K_0402_5%
1 2 INT_MIC_CLK_R 3
13 INT_MIC_CLK GPIO1/DMIC_CLK
L56 FBMA-L10-160808-301LMT_2P 5 AZ_SDOUT_HD 16
SDATA_OUT
For EMI Request 4 8 AZ_SDIN0_HD_R 2 1 PCI Beep CA13
32 EC_MUTE# PD# SDATA_IN AZ_SDIN0_HD 16 RA8
RA6 33_0402_5% 1 2 1 2 MONO_IN
@ CA64 1 16,19 PCH_SPKR
2 0.01U_0402_25V7K 47K_0402_5%
11 RESET# 47 0.1U_0402_16V4Z
16 AZ_RST_HD# EAPD
SPDIFO 48
1 2 MONO_IN 12
CA12 100P_0402_50V8J PCBEEP
MONO_OUT 20
1
1
SENSE_A 13 SENSE A RA12 CA18
MIC2_VREFO 29
2 1 EC_MUTE# 18 10K_0402_5% 0.1U_0402_16V4Z
4.7K_0402_5% RA45 SENSE B 2
30 +MIC1_VREFO_R CA28 10U_0805_10V4Z
2
MIC1_VREFO_R
1 2 36 CBP LDO_CAP 28 1 2
CA15
2.2U_0603_6.3V4Z 35 27 AC_VREF
CBN VREF
+MIC1_VREFO_L 31 19 AC_JDREF2 RA9 1 20K_0402_1%
MIC1_VREFO_L JDREF
1 1
43 PVSS2 CPVEE 34 1 2
42 CA14 2.2U_0603_6.3V4Z CA17 CA16
B CA47 1 PVSS1 B
2 0.1U_0603_50V7K 49 DVSS2 AVSS1 26 10U_0805_10V4Z
2 2 @
7 DVSS1 AVSS2 37
CA48 1 2 0.1U_0603_50V7K 0.1U_0402_16V4Z
ALC259-GR_QFN48_7X7
CA49 1 2 0.1U_0603_50V7K place close to chip
CA50 1 2 0.1U_0603_50V7K
DGND AGND
1 2
RA18 0_0603_5%
ALC259Q PN IS NOT READY
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HD CODEC ALC259
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
1.0
LA2
SPKL+ 1 2 SPK_L1
29 SPKL+
FBMA-L11-160808-800LMT_0603
2
DA6
CA22 2
470P_0402_50V8J 2 1
1 CA24 3
2 1U_0402_6.3V4Z
@ AZ5125-02S.R7G_SOT23-3
CA21 1 JSPK
LA3 470P_0402_50V8J SPK_R1 1
SPKL- 1 SPK_L2 SPK_R2 1
29 SPKL- 1 2 2 2
FBMA-L11-160808-800LMT_0603 SPK_L1 3
SPK_L2 3
4 4
LA4
DA9
2
ACES_85204-0400N
@
Ext.MIC/LINE IN
SPKR+ 1 2 SPK_R1 1
29 SPKR+
FBMA-L11-160808-800LMT_0603
2 3
RA23 2 RA22 1 +MIC1_VREFO_R
CA25 AZ5125-02S.R7G_SOT23-3 1K_0402_5% 2.2K_0402_5%
470P_0402_50V8J 2 2 1 MIC1_R
1 29 MIC1_R_R
CA27
2 1U_0402_6.3V4Z
@ 2 1 MIC1_L
1 29 MIC1_R_L
CA26 1K_0402_5%
LA5 470P_0402_50V8J RA24 2 RA25 1 +MIC1_VREFO_L
SPKR- 1 SPK_R2 2.2K_0402_5%
29 SPKR- 1 2
FBMA-L11-160808-800LMT_0603
@ R73 0_0402_5%
1 2 W=80mils JUSBB
L53 1
2
USB20_N0_R 3
20 USB20_N0 1 1 2 2 4
USB20_N0_R 5
USB20_P0_R USB20_P0_R 6
20 USB20_P0 4 4 3 3 7
W=60mils W CM-2012-900T_0805 8
+5VALW 2A
U14
+USB_VCCA
@ R86 0_0402_5%
USB20_N1_R
USB20_P1_R
9
10
11
1 GND VOUT 8 1 2 12
2 VIN VOUT 7 13
3 VIN VOUT 6 29 HP_R 14
25,32 USB_EN# 4 EN FLG 5 USB_OC#0 20,32 Reserve for EMI request 29 HP_L 15
1 AGND
RT9715BGS_SO8 @ R88 0_0402_5% MIC1_L 16
C362 MIC1_R 17
1 2 18
4.7U_0805_10V4Z
2 @ 29 NBA_PLUG 19
L54
29 MIC_SENSE 20
20 USB20_N1 1 2 USB20_N1_R 1 1 @ ACES_85201-20051
1 2
CA65 CA66
20 USB20_P1 4 3 USB20_P1_R 0.1U_0402_16V4Z 0.1U_0402_16V4Z
4 3 @ 2 2 @
W CM-2012-900T_0805
@ R87 0_0402_5%
1 2 For EMI Request
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SPK/AUDIO&USB
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS NALAA LA-6041P M/B
WWW.AliSaler.Com
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 13, 2010 Sheet 30 of 48
5 4 3 2 1
D D
1 2
@ CC2 100P_0402_50V8J
RC2
6.19K_0402_1% UC1
2 1 1 REFE
CARD@ 17 CR_LED#
GPIO0 CR_LED# 34
USB20_N10 2
+3VS +3VS_CR 20 USB20_N10 DM
USB20_P10 3 24 CLK_48M_CR < 48MHz >
20 USB20_P10 DP CLK_IN CLK_48M_CR 13
RC3
0_0603_5% +3VS_CR 4 23
CARD@ 3V3_IN XD_D7
+VCC_3IN1 5 CARD_3V3
1 1 CC3 V1_8 6 V18 SP14 22 MSBS
CC4 0.1U_0402_16V4Z 1 21 SD_DATA2_MS_DATA5
CARD@ CARD@ CC7 SP13 MS_DATA1_SD_DATA3
7 XD_CD# SP12 20
4.7U_0805_10V4Z CARD@ 1U_0402_6.3V4Z 19
2 2 SDW P_MSCLK_R SDW P_MSCLK SP11 SDCMD
1 2 8 SP1 SP10 18
2 RC24 0_0402_5% MSCD# MS_DATA0_SD_DATA5
9 SP2 SP9 16
1 SD_DATA1 10 15 MS_DATA2_SDCLK 1 2 MS_DATA2_SDCLK_R
SP3 SP8
EPAD
SD_DATA0 11 14 RC22 0_0402_5%
CC10 MS_DATA3_SD_DATA7 SP4 SP7 SDCD#
12 SP5 SP6 13 1 CC9
10P_0402_50V8J 10P_0402_50V8J
2 RTS5138-GR_QFN24_4X4 @
@
25
CARD@
C 2 C
@ TAITW _R009-025-LR_NR
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RTS5138 Card Reader
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
WWW.AliSaler.Com
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS NALAA LA-6041P M/B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 13, 2010 Sheet 31 of 48
5 4 3 2 1
5 4 3 2 1
+3VL
+3VL
0.1U_0402_16V4Z 0.1U_0402_16V4Z
1 1 1 1 2 2 C442
C436 1 2
C437 C438 C439 C440 C441
0.1U_0402_16V4Z 1000P_0402_50V7K 0.1U_0402_16V4Z
2 2 2 2 1 1
111
125
0.1U_0402_16V4Z 1000P_0402_50V7K
22
33
96
67
9
for EMI request U19
VCC
VCC
VCC
VCC
VCC
VCC
AVCC
CLK_PCI_EC
1
D D
R377 1 21
21 GATEA20 GA20/GPIO00 INVT_PWM/PWM1/GPIO0F
@ 10_0402_5% 2 23
21 KB_RST# KBRST#/GPIO01 BEEP#/PWM2/GPIO10 EC_BEEP# 29
16,33 SERIRQ 3 SERIRQ# FANPWM1/GPIO12 26
16,33 LPC_FRAME# 4 27 ACOFF 38
2
LFRAME# ACOFF/FANPWM2/GPIO13
1 16,33 LPC_AD3 5 LAD3
16,33 LPC_AD2 7 LAD2 PWM Output
C443 8 63 BATT_TEMPA
16,33 LPC_AD1 LAD1 BATT_TEMP/AD0/GPIO38 BATT_TEMPA 37
@ 22P_0402_50V8J BATT_TEMPA
2 16,33 LPC_AD0 10 LAD0 LPC & MISC BATT_OVP/AD1/GPIO39 64 1
C445
2
100P_0402_50V8J
ADP_I/AD2/GPIO3A 65 ADP_I 38
CLK_PCI_EC 12 AD Input 66 ACIN_D 1 2
20 CLK_PCI_EC PCICLK AD3/GPIO3B ADP_V 38
13 75 C446 100P_0402_50V8J
20,27,28,33 PLT_RST# PCIRST#/GPIO05 AD4/GPIO42
ECRST# 37 76
+3VL R378 ECRST# SELIO2#/AD5/GPIO43
21 EC_SCI# 20 SCI#/GPIO0E
47K_0402_5% 38
34 W L_BT_LED# CLKRUN#/GPIO1D
2 1 ECRST# 68
DAC_BRIG/DA0/GPIO3C VTTP_EN 40
EN_DFAN1/DA1/GPIO3D 70 EN_DFAN1 6
2 1 DA Output IREF/DA2/GPIO3E 71 IREF 38
C444 0.1U_0402_16V4Z KSI0 55 72
KSI0/GPIO30 DA3/GPIO3F CHGVADJ 38
For EMI request KSI1 56
KSI2 KSI1/GPIO31
57 KSI2/GPIO32
KSI3 58 83
KSI3/GPIO33 PSCLK1/GPIO4A EC_MUTE# 29
2 1 KB_RST# KSI4 59 84 +5VS
KSI4/GPIO34 PSDAT1/GPIO4B USB_EN# 25,30
@ C452 0.1U_0402_16V4Z KSI5 60 85
KSI6 KSI5/GPIO35 PSCLK2/GPIO4C TP_CLK
61 KSI6/GPIO36 PS2 Interface PSDAT2/GPIO4D 86 1 2
KSI7 62 87 TP_CLK 4.7K_0402_5% R379
KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E TP_CLK 26
2 1 PLT_RST# KSO0 39 88 TP_DATA TP_DATA 1 2
KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F TP_DATA 26
@ C453 0.1U_0402_16V4Z KSO1 40 4.7K_0402_5% R381
KSO2 KSO1/GPIO21
41 KSO2/GPIO22
C KSO3 42 97 VGATE +3VALW C
KSO3/GPIO23 SDICS#/GPXOA00 VGATE 18,43
KSO4 43 98
+3VL KSO4/GPIO24 SDICLK/GPXOA01 W OL_EN# 28
KSO5
KSO6
44 KSO5/GPIO25 Int. K/B SDIDO/GPXOA02 99
LID_SW #
PW RME_CTRL# 16
LID_SW #_R
45 KSO6/GPIO26 Matrix SDIDI/GPXID0 109 1 2 LID_SW #_R 34 2 1
1 2 KSO1 KSO7 46 SPI Device Interface R772 1K_0402_1% 47K_0402_5% R383
R380 47K_0402_5% KSO8 KSO7/GPIO27
47 KSO8/GPIO28
1 2 KSO2 KSO9 48 119 SYSON 1 2
KSO9/GPIO29 SPIDI/RD# EC_SI_SPI_SO 33
R382 47K_0402_5% KSO10 49 120 R5 4.7K_0402_5%
KSO10/GPIO2A SPIDO/WR# EC_SO_SPI_SI 33
KSO11 50 SPI Flash ROM 126
KSO11/GPIO2B SPICLK/GPIO58 SPI_CLK 33
to avoid EC entry ENE test mode KSO12 51 128
KSO12/GPIO2C SPICS# SPI_CS# 33
KSO13 52
KSO14 KSO13/GPIO2D
53 KSO14/GPIO2E
KSI[0..7] KSO15 54 73
26 KSI[0..7] KSO15/GPIO2F CIR_RX/GPIO40
KSO16 81 74 VR_ON 2 1
KSO[0..17] KSO17 KSO16/GPIO48 CIR_RLC_TX/GPIO41 R40 10K_0402_5%
26 KSO[0..17] 82 KSO17/GPIO49 FSTCHG/SELIO#/GPIO50 89 FSTCHG 38
BATT_CHGI_LED#/GPIO52 90 BATT_FULL_LED# 34
CAPS_LED#/GPIO53 91 CAPS_LED# 26
EC_SMB_CK1 77 GPIO 92
37 EC_SMB_CK1 SCL1/GPIO44 BATT_LOW_LED#/GPIO54 BATT_CHG_LOW _LED# 34
RP7 EC_SMB_DA1 78 93 For prevent leakage for CPU_CORE
37 EC_SMB_DA1 SDA1/GPIO45 SUSP_LED#/GPIO55 PW R_ON_LED# 34 +3VL
+3VL 1 8 EC_SMB_CK1 EC_SMB_CK2 79 SM Bus 95
17 EC_SMB_CK2 SCL2/GPIO46 SYSON/GPIO56 SYSON 41
2 7 EC_SMB_DA1 EC_SMB_DA2 80 121
17 EC_SMB_DA2 SDA2/GPIO47 VR_ON/XCLK32K/GPIO57 VR_ON 43
+3VS 3 6 EC_SMB_CK2 127 ACIN_D 1 2
EC_SMB_DA2 AC_IN/GPIO59 R331 330K_0402_5%
4 5
1
29 FANFB2/GPIO15
27 E51_TXD 30 EC_TX/GPIO16
31 110 @ R128
27 E51_RXD EC_RX/GPIO17 PM_SLP_S4#/GPXID1 PM_SLP_S4# 18
32 112 100K_0402_5% EC SEL EC Version
34 ON/OFFBTN# ON_OFF/GPIO18 ENBKL/GPXID2 UMA_ENBKL 19
34 PW R_SUSP_LED# 34 114 USB_OC#1 20,25
2
PWR_LED#/GPIO19 GPXID3 EC_SEL
26 NUM_LED# 36 NUMLED#/GPIO1A GPI GPXID4 115
R337 100K_0402_5% 116 High KB926D3
GPXID5 SUSP# 35,38,42
1
1 2 VTTP_EN 117
GPXID6 PBTN_OUT# 18
GPXID7 118 USB_OC#0 20,30
CRY1 122 R130 Low KB926E0
R342 100K_0402_5% CRY2 XCLK1 +EC_V18R 100K_0402_5%
123 XCLK0 V18R 124
1 2 E51_TXD
2
AGND
R389
GND
GND
GND
GND
GND
69
BT BT
on module on module
1 1
Enable Disable
1
C449 C450
Y4
18P_0402_50V8J
OSC
OSC
18P_0402_50V8J
2 2
BT_CRTL HI LO
A A
NC
NC
BT_PWR# LO HI
2
+3VL H7
+3VS
1 20mils 6 5
C451 U22
8 VCC VSS 4
0.1U_0402_16V4Z 7 4
2 16,32 SERIRQ PLT_RST# 20,27,28,32
3 W
7 HOLD 16,32 LPC_AD3 8 3 LPC_AD2 16,32
32 SPI_CS# 1 S
16,32 LPC_AD1 9 2 LPC_AD0 16,32
32 SPI_CLK 6 C
2
@ DEBUG_PAD R393
22_0402_5%
1
2
C457
22P_0402_50V8J
SPI_CLK 1
1 R394 2 1 2
10_0402_5% C454 10P_0402_50V8J
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SPI ROM/TP/KB/Debug
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS NALAA LA-6041P M/B
WWW.AliSaler.Com
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 13, 2010 Sheet 33 of 48
5 4 3 2 1
2
2 4
R395
NTC017-DA1J-D160T
PCB
6
5
100K_0402_5%
D JPOW ER PCB LA-6041P REV10 D
1
ON/OFFBTN#
1 1 ON/OFFBTN# 32
U11
2 2 51_ON# 36
3 3
2
4 4 D59
G1 5
debug phase using
6
@ G2 6 AZ5125-02S.R7G_SOT23-3
32 EC_ON
another at page 35
1
R396 PJP1
10K_0402_5%
DC-IN
1
17 PJP1
45@
1
JLEDB @ @ @ @
Q49A 1 2 1
2N7002KDW _SOT363-6 C490 0.1U_0402_25V6 1
18,32,36 ACIN 2 2 2
3 H30 H31
32 LID_SW #_R 3
another at page 35 ACIN_LED# 4 MDC
1
4
32 PW R_ON_LED# 5 5
6 H_3P3 H_3P3
32 PW R_SUSP_LED#
1
HDD_LED# 6 @ @
7 7
31 CR_LED# 8 8
32 BATT_FULL_LED# 9 9
10 MINI CARD H36 H37
HDD LED Control Circuit 32
26
BATT_CHG_LOW _LED#
SW _L 11
10
11 GND 17
26 SW _R 12 12 GND 18
13 H_3P3 H_3P3
16 SATA_LED# 32 W L_BT_LED#
1
13 @ @
+3VALW 14 14
2
+5VS 15 15
+5VALW 16 16
+3VS 2 R415 1 6 1
10K_0402_5% @ ACES_85201-1605N
5
Q50A
2N7002KDW _SOT363-6
HDD_LED# 3 4
Q50B
2N7002KDW _SOT363-6
H13 H14 H16 H17 H18
B B
1
@ @ @ @ @
1
@ @ @ @ @ @
+5VS 1 2 2 1
R771 @ 330_0402_5%
G LTW -110TLA1_W HITE H25 H26 H27
3
1
@ @ @
@ @ @ @
1
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Comm. SW/ Sub Conn./LEDS
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
1.0
470_0805_5%
470_0805_5%
8 D S 1 8 D S 1
470_0805_5%
7 D S 2 7 D S 2 8 D S 1
2
2 2 R406 2 2 R407
6 D S 3 6 D S 3 7 D S 2
2 2 R408
1 5 D G 4 5 D G 4 6 D S 3 1
1U_0402_6.3V4Z 1U_0402_6.3V4Z 5 4
SI4800BDY_SO8 D G
1 R409 2 +VSB SI4800BDY_SO8 1 R410 2 +VSB 1U_0402_6.3V4Z
3 1
3 1
47K_0402_5% 47K_0402_5% SI4800BDY_SO8 1 R411 2
100P_0402_50V8J
100P_0402_50V8J
1 1 1 1 1 1
0.01U_0402_25V7K
4.7U_0805_10V4Z
0.022U_0402_25V7K
4.7U_0805_10V4Z
+VSB
3 1
1
6
C466 1 1 220K_0402_5%
4.7U_0805_10V4Z
6
C465 R412 C232 C234 C467 C468 R413 FDS6676AS
0.1U_0402_25V6
C470
330K_0402_5% Q10A Q10B 200K_0402_5% Q11A Q11B C469 R414
2 2 SUSP 2 2 2 2 @ SUSP 5 820K_0402_5% Q12A Q12B
2 5 2
2N7002KDW _SOT363-6 2N7002KDW _SOT363-6 2 2 SUSP 5
2
2
2N7002KDW _SOT363-6 2N7002KDW _SOT363-6 2N7002KDW _SOT363-6
2
2N7002KDW _SOT363-6
4
Prevent noise coupling
+3VALW
2
PS@
2 R425 2
100K_0402_5%
0.75VR_EN# 42
1
3
Q48B
2N7002KDW _SOT363-6
PS@
5,40 VTTPW ROK PS@ 1 2 0.75VR_EN 5
R169 100K_0402_5%
4
6
Q48A
2N7002KDW _SOT363-6
PS@
SUSP 2
1
3 3
+0.75VS +5VALW
2
2
R421 R421 R422
47_0805_5% 470_0805_5% 100K_0402_5%
PS@ NPS@
1
1
SUSP
9,42 SUSP
3
3
Q6B
2N7002KDW _SOT363-6
Q49B
5 SUSP 5 2N7002KDW _SOT363-6
32,38,42 SUSP#
another at page34
2
another at page 34
4
4
R423
10K_0402_5%
1
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DC-DC INTERFACE
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
1.0
VS
VIN PR1
PL1 VIN 1M_0402_1%
PF1 SMB3025500YA_2P
DC301001M80 DC_IN_S1 1 2 DC_IN_S2 1 2
1 2
1
1
PJP1 N1 PR3
10A_125V_451010MRL PR2 5.6K_0402_5% PR4
680P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
+ 1
84.5K_0402_1% 10K_0402_1%
680P_0402_50V7K
100P_0402_50V8J
100P_0402_50V8J
1
1
1 1
PC5
2 1 2 ACIN 18,32,34
2
+
1
PC1
PC2
PC3
PC4
PC6
PR5
8
3 22K_0402_1% PU1A
2
-
@ 1 2 3
P
2
@ + PACIN
- 4 O 1 PACIN 38
2 -
G
1
@ SINGA_2DW -0005-B03
1
PR6 LM393DG_SO8
4
PC7 20K_0402_1% PC8 PD1 PR7
0.068U_0402_10V6K .1U_0402_16V7K GLZ4.3B_LL34-2 10K_0402_1%
2
2
2
2 1 +CHGRTC
PR8
VIN 10K_0402_1%
3.3V Vin Detector
2
PD2
High 18.384 17.901 17.430
RLS4148_LL34-2 Low 17.728 17.257 16.976
1
BATT+ 2 1
1
PD3 PR9 PR10
RLS4148_LL34-2 PQ1 68_1206_5% 68_1206_5%
TP0610K-T1-E3_SOT23-3
PR11
2
200_0603_5%
2
CHGRTCP 1 2 N1 3 1 VS 1 2 2
PR12
1
1K_1206_5%
1
1
PC10 PD4
PR13 PC9 0.1U_0603_25V7K 2 1 N3 1 2
100K_0402_1% 0.22U_0603_25V7K VIN B+
2
2
RLS4148_LL34-2 PR14
2
1K_1206_5%
34 51_ON# 1 2
PR15 1 2
22K_0402_1%
PR16
1K_1206_5%
RTC Battery
1
1
PR19 PR20
PR17 100K_0402_1% 2.2M_0402_5% PR18
200_0603_5% 1 2 2 1 499K_0402_1%
3.3V
PU2 G920AT24U_SOT89-3 - PBJ1 + PR21 PR22 VL
2
560_0603_5% 560_0603_5%
2
3 2 N2 2 1 1 2 1 2 +RTCBATT
+CHGRTC OUT IN PD5
8
RB715F_SOT323-3 PU1B
1
GND
2 5
P
39 EN0 +
PC11 PC12 @ MAXEL_ML1220T10 1 7
10U_0805_10V4Z 1 O
38 ACON 3 6 2 1
2
+CHGRTC
G
-
1
1U_0805_25V4Z
LM393DG_SO8 PR23 PR24
1
10K_0402_1% 499K_0402_1% PC14
SP093MX0000
1
PR26 1000P_0402_50V7K
PC13 @ PR25 191K_0402_1%
2
3 3
1000P_0402_50V7K 66.5K_0402_1%
2
1
2
PC15
1000P_0402_50V7K
2
PR27
1
PJ1 PJ4 PJ3 D 47K_0402_1%
+3VALW P 2 1 +3VALW +1.5VP 2 1 +1.5V +1.8VSP 2 1 +1.8VS PQ2 2 2 1 PACIN
2 1 2 1 2 1 SSM3K7002FU_SC70-3 G
@ JUMP_43X118 @ JUMP_43X118 @ JUMP_43X79 S
3
(5A,200mils ,Via NO.= 10 (2A,80mils ,Via NO.= 4)
OCP=7.7A) (9A,360mils ,Via NO.= 18
1
PJ5
OCP=9.8A)
+5VALW P 2 1 +5VALW PJ8
2 1 +GFX_COREP +GFX_CORE
2 2 1 1
@ JUMP_43X118 2 +5VALW P
(5A,200mils ,Via NO.= 10 @ JUMP_43X118
OCP=7.9A) PJ10 PQ3
PJ7
2 1
Precharge detector DTC115EUA_SC70-3
3
2 1
+VSBP 2 2 1 1 +VSB
@ JUMP_43X118
PJ9 15.97V/14.84V FOR
@ JUMP_43X39
(22A,880mils ,Via NO.=44
+3VLP 2 2 1 1 +3VL ADAPTOR
(120mA,40mils ,Via NO.= 1) @ JUMP_43X39
OCP=26A) (100mA,40mils ,Via NO.= 2)
PJ11 PJ17
2 2 1 1 +0.75VSP 2 2 1 1 +0.75VS
4 4
@ JUMP_43X118 @ JUMP_43X79
(1.5A,60mils ,Via NO.= 4)
PJ13
+VTTP 2 2 1 1 +VTT
@ JUMP_43X118
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THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NALAA LA-6041P M/B
Date: Tuesday, April 13, 2010 Sheet 36 of 48
A B C D
A B C D
1 1
VMB
PF2 PL2
PH1 under CPU botten side :
PJP2 15A_65V_451015MRL SMB3025500YA_2P
1 BATT_S1 1 2 1 2
CPU thermal protection at 90 degree C
1 BATT+
2 2
3 BATT_P3 1 2 1 2
Recovery at 56 degree C
3 +3VLP
4 BATT_P4 PR28 PR29
4
1
BATT_P5 1K_0402_1% 47K_0402_1%
5 5 PH2 near main Battery CONN :
1
10 6 EC_SMDA PC16 PC17
GND 6 EC_SMCA @ PC18 1000P_0402_50V7K 0.01U_0402_25V7K
11 7 BAT. thermal protection at 90 degree C
2
GND 7
1
12 8 0.1U_0402_25V6K
2
GND 8 PR30
13 GND 9 9
1K_0402_1%
Recovery at 56 degree C
@ SUYIN_200045MR009G171ZR
2
VL
PD7
1
PJSOT24C_SOT23-3
1
PD6 2
1
PJSOT24C_SOT23-3 1 PR31
3 PC19 23.7K_0402_1%
PR32 0.1U_0603_25V7K
2
6.49K_0402_1% PR33
2
2
2 1 23.7K_0402_1%
+3VLP
1
PR34
1
1
11.3K_0402_1%
PR35 PU4
2
1K_0402_1% 1 8 2
2
VCC TMSNS1
1
2 7
2
GND RHYST1
2
1
4 5
2
39 VS_ON OT2 RHYST2 PR40
1
G718TM1U_SOT23-8 11.3K_0402_1%
EC_SMB_DA1 32
2
EC_SMB_CK1 32
1
PH2
100K_0402_1%_NCP15W F104F03RC
2
PQ4
TP0610K-T1-E3_SOT23-3
B+ 3 1 +VSBP
3 3
100K_0402_1%
0.1U_0603_25V7K
0.22U_0603_25V7K
1
1
PR41
PC20
PC21
@ @
2
2
2
VL PR42
22K_0402_1%
1 2
2
PR43
100K_0402_1%
PR44
1
0_0402_5% D
1 2 2 PQ5
39 POK
G SSM3K7002FU_SC70-3
.1U_0402_16V7K
S
3
1
@ PC22
2
4 4
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THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS NALAA LA-6041P M/B 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 13, 2010 Sheet 37 of 48
A B C D
A B C D
@ PC75
B+
10U_1206_25V6M PQ6
1 2 AO4435_SO8
1 8
@ PC76 2 7
4
7 2 2 7
CSIN @ PQ9
1000P_0402_25V8J
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
6 3 3 6 2 3
5 5 AO4435_SO8
1 8
CSIP 2 7
4
1
1 1
3 6
1
PQ11 TP0610K-T1-E3_SOT23-3 5
3
PQ10 PR46 PR47 10_0603_5%
5600P_0402_25V7K
2
DTA144EUA_SC70-3 200K_0402_1% DCIN
0.1U_0603_25V7K
3 1 1 2
4
P3
PC28
2
1
PC23
PC24
PC25
PC26
2 PR49
1
PC27
PR50 PQ12 47K_0402_1%
1
PR48 100K_0402_1% DTC115EUA_SC70-3 1 2
2
47K_0402_1% @ VIN
2
PR51 PD8
2
2
100K_0402_1% 2 FSTCHG PR52 PD9
1
2
1
1
RB715F_SOT323-3 PR54
2.2U_0603_6.3V6K
PC29
2 PR53 200K_0402_1%
3
1
1
PQ13 10K_0402_1% 1 2 VIN
DTC115EUA_SC70-3 2 1 PU5 PC31
32 FSTCHG 0.1U_0603_25V7K
2
DCIN
100K_0402_1%
1 2 1 24 2 1 PQ15 PD11
3
VDD DCIN
1
1
DTC115EUA_SC70-3 2 1 2
PR56
PC30
PR55 .1U_0402_16V7K 2 23 1SS355_SOD323-2
ACSET ACPRN
1
D 150K_0402_1% PR57
2 PQ14 20_0603_5%
2
1
G SSM3K7002FU_SC70-3 6251_EN CSON D
3 EN CSON 22 1 2
1
S PC32 PC33 2 PACIN
3
5
6
7
8
0.047U_0603_16V7K 0.1U_0603_25V7K G
AO4466_SO8
4 21 1 2 PQ16
SSM3K7002FU_SC70-3
3
CELLS CSOP PR58 SSM3K7002FU_SC70-3
PC35 6800P_0402_25V7K 20_0603_5%
PQ17
2 2
1 2 5 ICOMP CSIN 20 2 1
1
2
D PR59 4
PQ18
1
VCOMP CSIP PL3 PR63
S
3
3
2
1
PR64 1 2 7 18 LX_CHG 2.2_0603_1% 1 2 CHG1 4
ICM PHASE
1
22K_0402_5% @ PC38 100P_0402_50V8J
4.7_1206_5%
5
6
7
8
PR65
PACIN 1 2 1 2 2 3
36 PACIN
PC39 6251VREF DH_CHG
10U_1206_25V6M
10U_1206_25V6M
10U_1206_25V6M
10U_1206_25V6M
8 VREF UGATE 17
PR66 .1U_0402_16V7K PR67 PC40
36 ACON 32 ADP_I
AO4466_SO8
154K_0402_1% 2.2_0603_1% 0.1U_0603_25V7K
1
PC73
PC41
PC42
PC74
2 1 9 16 BST_CHG 1 2 BST_CHGA 2 1
32 IREF CHLIM BOOT
1
1
PR68 4
1
75K_0402_1% PD12 @
680P_0603_50V8J
0.01U_0402_25V7K
2
PQ19
PC43
6251VREF 1 2 6251aclim 10 15 6251VDDP RB751V-40TE17_SOD323-2
ACLIM VDDP
1
2
1
1
PC44
3
2
1
DTC115EUA_SC70-3 120K_0402_1% PR70 11 14 DL_CHG
VADJ LGATE
2
20K_0402_1% PR71
2
4.7_0603_5%
2
12 13 PC45
3
1
GND PGND 4.7U_0805_6.3V6K
ISL6251AHAZ-T_QSOP24
PR72
15.4K_0402_1%
1 2
32 CHGVADJ
1
3
PR73 3
31.6K_0402_1%
VIN
2
CP mode
1
Iada=0~3.42A(65W) CP= 92%*Iada; CP=3.147A
PR74
Vaclim=1.08V(65W) PR68=75k PR45=0.02 309K_0402_1%
PR75
2
10K_0402_1%
1 2
CC=0.25A~3A CHGVADJ=(Vcell-4)/0.10627 ADP_V 32
1
IREF=1.016*Icharge Vcell CHGVADJ
1
PR76
47K_0402_1% PC46
IREF=0.254V~3.048V 4V 0V
.1U_0402_16V7K
2
VCHLIM need over 95mV 4.2V 1.882V 2
4.35V 3.2935V
4 4
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THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS NALAA LA-6041P M/B 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 13, 2010 Sheet 38 of 48
A B C D
5 4 3 2 1
2VREF_51125
1U_0603_10V6K
D D
1
PC47
2
PR77 PR78
13K_0402_1% 30K_0402_1%
1 2 1 2
PR79 PR80
B++
20K_0402_1% 19.1K_0402_1%
PL20 1 2 1 2 B++
HCB4532KF-800T90_1812
ENTRIP2
ENTRIP1
B+ 2 1 +3VLP
PR81 PR82
150K_0402_1% 150K_0402_1%
1 2 1 2
10U_1206_25V6M
10U_1206_25V6M
10U_1206_25V6M
10U_1206_25V6M
1
1
PC78
PC77
PC48
PC49
4.7U_0805_10V6K
2
1
PU6
5
6
7
8
PC50
@
TONSEL
ENTRIP2
FB2
FB1
ENTRIP1
REF
8
7
6
5
1
C C
25 PQ22
PQ21 P PAD AO4466_SO8
2
AO4466_SO8
7 VO2 VO1 24 POK 37 4
4
8 23 PC52
PR83 VREG3 PGOOD PR84 .1U_0402_16V7K
1 2 1 2 BST_3V 9 22 BST_5V 1 2 1 2
3
2
1
0_0603_5% BOOT2 BOOT1 0_0603_5%
1
2
3
8
7
6
5
5
6
7
8
1
LG_3V LG_5V
4.7_1206_5%
4.7_1206_5%
12 LGATE2 LGATE1 19
PR85
PR86
SKIPSEL
PQ23 PQ24
VREG5
@ AO4712_SO8 AO4712_SO8 @
220U_6.3V_M
220U_6.3V_M
1 1
GND
VIN
NC
RT8205EGQW _W QFN24_4X4
EN
2
2
+ 36 EN0 +
PC53
PC54
Ipeak=5A 4
PR87
4
13
14
15
16
17
18
1
1
Imax=3.5A 499K_0402_1%
680P_0603_50V8J
680P_0603_50V8J
2 2
PC55
PC56
B+ 1 2
F=305KHz
2
1
2
3
3
2
1
2
1
@ @
100K_0402_5%
1
1U_0402_6.3V6K
Total Capacitor 220u
PR88
1 2 VL
PC57
2
ESR 15m ohm
PC58
@ PR89
4.7U_0805_10V6K
2
B 0_0402_5% B
2
ENTRIP1 ENTRIP2 B++
Ipeak=5A
1
Imax=3.5A
0.1U_0603_25V7K
F=245KHz
2
PC59
1
D D
2VREF_51125
PQ25 2 2 PQ26
SSM3K7002FU_SC70-3 G G SSM3K7002FU_SC70-3 Total Capacitor 220u
S S
3
VL 2 1
1
PR90
100K_0402_1%
37 VS_ON
VS 1 2 2 PQ27
DTC115EUA_SC70-3
PR91
42.2K_0402_1%
0.01U_0402_16V7K
1
100K_0402_1%
1
PR92
PC60
A A
@
2
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
3VALWP/5VALWP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
1.0
WWW.AliSaler.Com
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS NALAA LA-6041P M/B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 13, 2010 Sheet 39 of 48
5 4 3 2 1
A B C D
1 PL6 1
B+ HCB4532KF-800T90_1812
2 1 +VTTP_B+
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
5 VTTPW ROK_CPU VTTPW ROK +5VS
5,35
1
1
1 2
3.4K_0402_1%
1
PR187
PC61
PC62
PC63
PR94 2.2_0603_1%
0_0402_5%
2
PR93
1 2 1 2
BST_+VTTP
PR95 PR184 PC64
DH_+VTTP
LX_+VTTP
2
2.43K_0402_1% 4.53K_0402_1% 0.1U_0603_25V7K
1 2 1 2 +5VALW
DH_+VTTP
5
PR96
0_0402_5% PR97 PQ28
16
15
8
1
PU7 4.7_0603_5%
1 2 TPCA8030-H_SOP-ADV8-5
UG
GND
PGOOD
PHASE
BOOT
+VTTP_VCC
2
4
3 VIN PVCC 14 1 2 PC65
+VTTP_VCC 2.2U_0603_6.3V6K
Arrandale 1.05V
3
2
1
4 13 DL_+VTTP PL7
VCC LG 1.0UH_PCMC104T-1R0MN_20A_20%
1
PC66 1 2
2
2.2U_0603_6.3V6K
+VTTP 2
APW 7138NITRL_SSOP16
12
2
PGND
4.7_1206_5%
390U_2.5V_M
1
1
TPCA8028-H_SOP-ADVANCE8-5
+
PQ29
PR99
PC67
1 2 5 11 SE_+VTTP 1 2
32 VTTP_EN EN ISEN PR98
PR100 2
FSET
9.76K_0402_1%
0_0402_5%
2
VO
NC
FB
4
680P_0603_50V8J
.1U_0402_16V7K
1
6
10
1
PC69
3
2
1
2
PC68
+VTTP
FB_+VTTP
2
@ Material Note:
33.2K_0402_1%
0.01U_0402_16V7K
1
1
390uF/ 10mohm, number are 3,
1
PR101
57.6K_0402_1%
power x1, HW x2
PR102
@ PC70
2
1
@
2
2
2200P_0603_50V7K
@ PC71
33P_0402_50V8J
2
Ipeak=20A
Imax=14A
PC72
2
3 @ F=231KHz 3
1 2 1 2+VTTP
PR103 PR104
3.32K_0402_1% 0_0402_5% Total Capacitor 1170u
1
2 1
1
PR110
2
VSS_SENSE_VTT 8
@ JUMP_43X79 Clarksfield --non mount @
(7.0A,280mils ,Via NO.=14)
10_0402_5%
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+VTTP
Size Document Number Rev
WWW.AliSaler.Com
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS NALAA LA-6041P M/B 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 13, 2010 Sheet 40 of 48
A B C D
5 4 3 2 1
PL21
HCB2012KF-121T50_0805
1.5V_B+ 2 1 B+
4.7U_0805_25V6-K
4.7U_0805_25V6-K
1
1
PC91
PC92
D D
5
6
7
8
2
PQ34
AO4466_SO8
PR127
255K_0402_1% 4
1 2
PR128
0_0402_5%
1 2 BST_1.5V 1 2
32 SYSON
3
2
1
PR129
1
2.2_0603_1% PC94 PL10
15
14
1
@PC93
@ PC93 PU10 0.1U_0603_25V7K 1.8UH_SIL104R-1R8PF_9.5A_30%
.1U_0402_16V7K 1 2 1 2
EN/DEM
NC
BOOT
+1.5VP
2
DH_1.5V
4.7_1206_5%
2 TON UGATE 13
1
PR131 LX_1.5V
PR130
3 12
220U_6.3V_M
VOUT PHASE 1
5
6
7
8
100_0603_1%
+
PC95
+5VALW PQ35
+5VALW 1 2 4 VDD CS 11 1
PR132
2
AO4712_SO8
Ipeak=9A
2
5 FB VDDP 10 18K_0402_1%
2
Imax=6.3A
F=313KHz
1
1
6 9 DL_1.5V 4
680P_0603_50V8J
PGOOD LGATE
PGND
PC97
PC96
GND
4.7U_0603_6.3V6K
2
2
1
C
RT8209BGQW _W QFN14_3P5X3P5 PC98
Total Capacitor 610u C
3
2
1
4.7U_0805_10V6K ESR 6m ohm
2
PR133
10K_0402_1%
1 2
10K_0402_1%
1
PR134
B B
A A
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DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS NALAA LA-6041P M/B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 13, 2010 Sheet 41 of 48
5 4 3 2 1
A B C D
+1.5V
1
PJ23
1
@ JUMP_43X79
1 1
2
2
PU11
1 6
VIN VCNTL +5VALW
4.7U_0805_6.3V6K
2 GND NC 5
1
3 VREF NC 7
1
PC100
1K_0402_1%
PR135
@ PR136 4 8 PC99
2
0_0402_5% VOUT NC 1U_0603_10V6K
2
1 2 9
9,35 SUSP
2
TP
G2992F1U_SO8
PR137
0.1U_0402_10V7K
+0.75VSP
1
0_0402_5% D
1K_0402_1%
SSM3K7002FU_SC70-3
PQ36
PR138
PC102
1 2 2
35 0.75VR_EN# G
1
S
3
1
PC103
2
@ PC101 10U_0805_6.3V6M
2
.1U_0402_16V7K
2
2 2
PR122
0_0402_5%
1 2
SUSP# 32,35,38
2
1
PR123
316K_0402_1% @PC83
@ PC83
0.1U_0402_16V7K
2
PR124
402K_0402_1% PU9
1
+1.8VSP 2 1 1 FB EN/SYNC 10
PC84 2 9 PL9
PL22 0.1U_0402_16V7K GND GND 2.2UH_FMJ-0630T-2R2 HF_8A_20%
HCB2012KF-121T50_0805 1 2 3 8 1 2 +1.8VSP
3
SW SW 3
+5VALW 2 1 4 IN IN 7
22U_0805_6.3V6M
22U_0805_6.3V6M
1 2 5 6
0.1U_0402_25V6
10U_0805_10V4Z
10U_0805_10V4Z
BS POK
1
PR125 PR126
B340A_SMA2
1
1
PC85
PC86
PC87
PD13
PC88
PC89
0_0402_5% 11 4.7_1206_5%
TP
1 2
MP2121DQ-LF-Z_QFN10_3X3 @
2
2
2
PC90
680P_0603_50V8J
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
0.75VSP/+1.8VSP
Size Document Number Rev
WWW.AliSaler.Com
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NALAA LA-6041P M/B1.0
Date: Tuesday, April 13, 2010 Sheet 42 of 48
A B C D
8 7 6 5 4 3 2 1
10U_1206_25V6M
10U_1206_25V6M
2200P_0402_50V7K
470P_0603_50V8J
0.1U_0603_25V7K
H 1 2 1 1 H
68U_25V_M_R0.36
68U_25V_M_R0.36
8 CPU_VID0
PR153 0_0402_5% CPU_VID4 2 1@ PR151 1K_0402_1% CPU_VID4 2 1 PR152 1K_0402_1%
1
+ +
PC112
PC116
PC113
PC114
PC111
@ PC115
8 CPU_VID1 1 2
PR156 0_0402_5% CPU_VID5 1 PR154 1K_0402_1% CPU_VID5 1 @ PR155 1K_0402_1%
PC110
2 2
8 CPU_VID2 1 2
2
5
PR159 0_0402_5% CPU_VID6 2 1@ PR157 1K_0402_1% CPU_VID6 2 1 PR158 1K_0402_1% 2 2
1 2 PQ37
8 CPU_VID3
PR162 0_0402_5% H_DPRSLPVR 2 1 PR160 1K_0402_1% H_DPRSLPVR 2 1 @ PR161 1K_0402_1%
1 2 TPCA8030-H_SOP-ADV8-5
8 CPU_VID4
PR164 0_0402_5% H_PSI# 2 1 PR163 1K_0402_1%
8 CPU_VID5 1 2 4
PR165 0_0402_5%
1 2 +VTT
8 CPU_VID6
PC117
3
2
1
PR166 0_0603_5% 0.22U_0603_25V7K
PR167 0_0402_5% BOOT2 1 2 BOOT2_2 1 2
1 2 PL12
32 VR_ON
UGATE2 0.36UH_PCMC104T-R36MN1R17_30A_20%
G PR168 0_0402_5% G
1 2 PHASE2 4 1 +CPU_CORE
8 H_DPRSLPVR
3 2 V2N
13 CLK_ENABLE#
5
@ PQ38
PR169
4.7_1206_5%
10K_0402_5%
1
1
TPCA8028-H_SOP-ADVANCE8-5
PQ39
3.65K_0805_1%
+3VS PR172 TPCA8028-H_SOP-ADVANCE8-5 PR171
1.91K_0402_1% 1_0402_5%
PR170
PR173
1 2 CLK_ENABLE# @ PR175
LGATE2 4 4 0_0402_5%
2
2
1 2 V1N
PR174
1.91K_0402_1%
PR177 VSUM+
3
2
1
3
2
1
1
0_0402_5%
680P_0603_50V8J
18,32 VGATE
1
VSUM-
PC118
1 2
2
@ PR178 1K_0402_1%
F
1 2 ISEN2 F
+VTT
PR179 0_0402_5%
8 H_PSI# 1 2
PR180
1 2 ISL62883HRZ-T_QFN40_5X5~D
147K_0402_1%
PC119 +5VALW
1U_0603_10V6K
40
39
38
37
36
35
34
33
32
31
PU13 1 2
CLK_EN#
VID6
VID5
VID4
VID3
VID2
VID1
VID0
DPRSLPVR
VR_ON
2
30 PR183
BOOT2
29 0_0402_5%
UGATE2
1 28
PGOOD PHASE2
2 27
1
PSI# VSSP2
3 26
RBIAS LGATE2
4 25
VR_TT# VCCP
E 5 24 E
NTC PWM3
6 23
VW LGATE1
7 22
COMP VSSP1
8 21
FB PHASE1
9
ISEN3
UGATE1
1 2 10 PR186 0_0402_5%
BOOT1
ISUM+
ISEN2
ISEN1
ISUM-
VSEN
IMON
1 2
249K_0402_1%
8.06K_0402_1%
1U_0603_10V6K
VDD
1000P_0402_50V7K
RTN
VIN
PC126 41
AGND
1
22P_0402_50V8J
PC127
PC128
PR189
PR188
11
12
13
14
15
16
17
18
19
20
PR194
2
562_0402_1% PC130
@ 1 2 1 2
2
390P_0402_50V7K
PR196 PR195 0_0402_5%
2.55K_0402_1% 1 2
1 2 1 2 8 IMVP_IMON Arrandale -- 2 phase 1H1L
PC131 PR198 0_0402_5%
D 10P_0402_50V8J 1 2 +CPU_B+ D
0.22U_0603_25V7K
1 2 1 2
PR201 1_0402_5%
PC132 PR199 1 2 +5VALW +CPU_B+
150P_0402_50V8J 412K_0402_1% ISEN2 1 2
1
1
PC133
PC134
PC135
1U_0603_10V6K
0.22U_0603_25V7K
PR202 0_0402_5%
PC137 0.22U_0402_6.3V6K
PC138 0.22U_0402_6.3V6K
ISEN1 1 2 PR204
2
BOOT1
9.1K_0402_1%
470P_0603_50V8J
5
Layout Note: PR203 0_0402_5%
10U_1206_25V6M
10U_1206_25V6M
2
PQ43
1
1
PH3 place near VSSSENSE
PC139
TPCA8030-H_SOP-ADV8-5
PC140
PC141
Phase1 L-MOS
2
2
VSUM+ UGATE1 4
+CPU_CORE 1 2
PC143
1
3
2
1
0.047U_0402_16V7K
1
VSUM-
1 2 BOOT1_1 1 2
2.61K_0402_1%
0.22U_0603_10V7K
PL14
PR208
PR206 0.36UH_PCMC104T-R36MN1R17_30A_20%
1
82.5_0402_1%
PC144
PC145
8 VCCSENSE 1 2
2
PHASE1 4 1 +CPU_CORE
2
PR209 0_0402_5%
2
2
1
3 2 V1N
1
5
TPCA8028-H_SOP-ADVANCE8-5
PC146
TPCA8028-H_SOP-ADVANCE8-5
PQ44
PQ45
330P_0402_50V7K
4.7_1206_5%
2
1
PC147
PR210
10K_0402_5%
3.65K_0805_1%
2
1
0.01U_0402_25V7K PR213
@ 1_0402_5%
LGATE1
PR212
4 4
330P_0402_50V7K
@ PR216
PR211
11K_0402_1%
2
1
PR215
2
1000P_0402_50V7K 1 2 1 2 V2N
PR217 0_0402_5% 10K_0402_1%_ERTJ0EG103FA
2
3
2
1
3
2
1
1
1 2 PR214 VSUM-
680P_0603_50V8J
2
B 8 VSSSENSE B
1.2K_0402_1%
PC150
2
@ PR219 10_0402_5%
1 2 1 2 1 2 VSUM- VSUM+
@ PC168 @ PR249 ISEN1
Layout Note:
1200P_0402_50V7K 100_0402_1%
Place near Phase1 Choke
.1U_0402_16V7K
1
PC151
2
A A
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/01/23 Deciphered Date 2010/01/23 Title
+CPU_CORE
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THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NALAA LA-6041P M/B
Date: Tuesday, April 13, 2010 Sheet 43 of 48
8 7 6 5 4 3 2 1
A B C D E F G H
1 1
9
GFXVR_VID_0
GFXVR_VID_1
GFXVR_VID_2
GFXVR_VID_3
GFXVR_VID_4
GFXVR_VID_5
GFXVR_VID_6
9
GFXVR_EN
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
+5VS
+GFX_B+ PL15
HCB4532KF-800T90_1812
2
+1.05VS
PR221
PR222
PR223
PR224
PR225
PR226
PR227
PR231
2 1 B+
1
PR228
@ PR229 10_0603_1%
300K_0402_5%
10U_1206_25V6M
10U_1206_25V6M
1
1
PC152
PC153
GFX_EN
2
2
9 GFXVR_IMON GFX_IMON
5
GFX_VCC
+3VS PC154
1
TPCA8030-H_SOP-ADV8-5
1U_0805_25V6K
PQ46
32
31
30
29
28
27
26
25
2
0.056U_0402_16V7K
1
PR232
PC155
6.98K_0402_1%
VID0
VID1
VID2
VID3
VID4
VID5
VID6
EN
1
2
24 PR234 PC157 4
2
GFX_IMON BST
2
2
3
2
1
1000P_0402_50V7K DRVH 0.36UH_PCMC104T-R36MN1R105_30A_20%
2 3 2
2
1
PVCC
TPCA8028-H_SOP-ADVANCE8-5
GFX_FB
PQ47
1 2 5
FB PU15 GFX_DRVL
19 2 1
390U_2.5V_M
1
1
PC158 PC160 GFX_COMP 6 DRVL PR235
220P_0402_50V7K 47P_0402_50V8J COMP PC159 4.7_1206_5% +
PC161
18
GFX_VCC 7 PGND 2.2U_0603_10V6K
2
12
GPU
1 2 1 2GFX_COMP-1
1 2 17 4
GFX_ILIM 8 AGND PC163 2
CSCOMP
PR236 PC162 PR237 ILIM 680P_0603_50V8J
33
CSREF
2
AGND
RAMP
LLINE
CSFB
1K_0402_1% 470P_0402_50V8J 20K_0402_1%
IREF
RPM
RT
3
2
1
9
10
11
12
13
14
15
16
2
PR238
10.7K_0402_1%
Ipeak=22A
GFX_IREF
GFX_RAMP
GFX_CSCOMP
GFX_CSFB
GFX_CSCOMP
GFX_RT
2 GFX_RPM
PH5 Imax=15.4A
GFX_CSCOMP 1
220K_0402_5%_ERTJ0EV224J~D
F=350KHz
1 2
80.6K_0402_1%
237K_0402_1%
340K_0402_1%
2
2
PR239
PR241
2 1
422K_0402_1%
1
1
2
PR245
1
PR243 PR244
1
0_0402_5% 0_0402_5% PC165
560P_0402_50V7K PR246
2
PC164 165K_0402_1%
1
2
1000P_0402_50V7K
2
PR248 2 1
1K_0402_1%
3 3
+GFX_B+ 2 1 GFX_RAMP-1 PR247
47K_0603_1%
9
VCC_AXG_SENSE
PC166 PC167
1000P_0402_50V7K 1000P_0402_50V7K
2
Shortest the
Switchable -- mount
net trace Non Swithchable--non mount @
4 4
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THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NALAA LA-6041P M/B
Date: Tuesday, April 13, 2010 Sheet 44 of 48
A B C D E F G H
5 4 3 2 1
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HW PIR 0.1 TO 0.2
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
OBMBB!MB.7152Q!TDIFNBUJD!DIBOHF!MJTU!SFWJTJPO!DIBOHF;!1/3!UP!1/4
OP!EBUF!!!QBHF!!!!!!NPEJGJDBUJPO!MJTU!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!QVSQPTF
........................................................................................................................................................
01/19 13 Change BKOFF#_R from JLVDS.35 to JLVDS.33 For prevent burn issue
01/27 32 Add pull down R40 10Kohm at VR_ON. For prevent leakage for CPU_CORE
01/27 25 Change D18 from SCA00000A00 to SC600001600 For ESD request
01/27 13,26,30,34 Change D57,D58,D59,DA6,DA9 from SCA00000G00 to SCA00001A00 For ESD request
D 01/27 15 Add pull down R148 2.2Kohm at HDMI_TXC-. For UMA HDMI level shift display compatibility issue D
C C
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HW PIR 0.2 TO 0.3
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
OBMBB!MB.7152Q!TDIFNBUJD!DIBOHF!MJTU!SFWJTJPO!DIBOHF;!1/4!UP!2/1
OP!EBUF!!!QBHF!!!!!!NPEJGJDBUJPO!MJTU!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!QVSQPTF
........................................................................................................................................................
02/23 15 Change R167 BOM structure from @ to IHDMI@. For reduce HDMI choke plan
02/23 15 Change R163 BOM structure from IHDMI@ to @. For reduce HDMI choke plan
02/23 15 Change R160 from SD028330180 (3.3K ohm) to SD034390180 (3.9K ohm). For reduce HDMI choke plan
02/23 15 Change L8,L9,L10,L11 BOM structure from IHDMI@ to @. For reduce HDMI choke plan
D 02/23 15 Change R157,R173,R175,R180,R182,R183,R187,R188 BOM structure from @ to IHDMI@. For reduce HDMI choke plan D
02/23 22 Change L12 from SHI00002K00 (10UH +-20%) to SD008100B80 (1 ohm +-1% 0805). For CRT wave issue
02/23 16 Delete D19 & R133 For prevent RTC empty then can not boot up issue
02/23 23 Change U54,C2,C18 BOM structure to @. For reserve HDA power rail to +1.5V
02/23 26,34 Change SW2,SW4 from SN100000F00 to SN100002Y00 and add BOM structure @ at SW2. For cost concern
03/09 29,32 Add Net EC_MUTE# from EC pin 83 to codec Pin4 For system has abnormally noise after S3 resume.
03/09 29 Add pull Low RA45 4.7K ohm. For system has abnormally noise after S3 resume.
03/09 29 Change CA16 BOM structure to @. For system has abnormally noise after S3 resume.
03/11 22 Add L57. For prevent EMI and CRT wave issue.
03/11 25,30 Change U14,U15 from SA000033H00 to SA00002XX00. For sourcer suggestion.
03/11 25,30 Change ZZZ from DA60000GC00 to DAZ0CK00100. For Pre-MP phase.
03/11 06 Change U1 from SA00002XA00 to SA000035G00. For voltage drop issue.
03/11 34 Change R771,D2 BOM structure to @. For Pre-MP phase.
03/11 22 Add net name +3VS_VCCADAC_R For net nameing rule
03/15 34 Add R772 & C490 and net name LID_SW#_R For prevent ESD damage
C C
03/15 22 Change L12 from SD008100B80 to SD014100B80. For package size
03/16 29 Change CA12.1, RA12.2, CA18.2 connect to GNDA For high frequency noise issue at S0
03/16 13 Add C231 For prevent noise coupling
03/17 35 Add C232,C234 For prevent noise coupling
03/17 31 Add CC9,CC10,RC22,RC24 For EMI request
03/17 31 Del RC2,RC3,CC7,CC8 For EMI request
03/20 13 Change C213 from SE070104Z80 to SE000000K80. For prevent noise coupling
03/20 13 Change C231 from SE071101J80 to SE000000K80. For prevent noise coupling
03/23 25 Change D18 BOM structure to @. For EMI remove
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HW PIR 0.3 TO 1.0
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Power PIR
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS NALAA LA-6041P M/B 1.0
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MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 13, 2010 Sheet 48 of 48