AO4407A P-Channel Enhancement Mode Field Effect Transistor: Features General Description
AO4407A P-Channel Enhancement Mode Field Effect Transistor: Features General Description
AO4407A P-Channel Enhancement Mode Field Effect Transistor: Features General Description
D
SOIC-8
Top View
S D
S D
S D
G
G D
S
Thermal Characteristics
Parameter Symbol Typ Max Units
Maximum Junction-to-Ambient A t ” 10s 32 40 °C/W
RTJA
Maximum Junction-to-Ambient A Steady State 60 75 °C/W
Maximum Junction-to-Lead C Steady State RTJL 17 24 °C/W
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
80 80
-10V VDS= -5V
-6V
60 -5V 60
-ID (A)
-ID(A)
40 -4.5V 40
-4V 125°C
20 20
25°C
VGS= -3.5V
0 0
0 1 2 3 4 5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
-VDS (Volts) -VGS(Volts)
Figure 1: On-Region Characteristics Figure 2: Transfer Characteristics
40 1.6
VGS=-20V
VGS=-5V
Normalized On-Resistance
ID=-12A
30 1.4
VGS=-10V
RDS(ON) (m:)
ID=-12A
20 1.2
VGS=-10V
VGS=-5V
10 1.0 ID=-10A
VGS=-20V
0 0.8
0 4 8 I12
F=-6.5A,16
dI/dt=100A/Ps
20 0 25 50 75 100 125 150 175
-ID (A) Temperature (°C)
Figure 3: On-Resistance vs. Drain Current and Figure 4: On-Resistance vs. Junction
Gate Voltage Temperature
30 1E+01
ID=-12A
1E+00
25
1E-01 125°C
RDS(ON) (m:)
20 1E-02
-IS (A)
125°C
1E-03
15 25°C
25°C 1E-04
10
1E-05
5 1E-06
3 4 5 6 7 8 9 10 0.0 0.2 0.4 0.6 0.8 1.0 1.2
10 3000
VDS=-15V 2500
8 Ciss
ID=-12A
Capacitance (pF)
2000
-VGS (Volts)
6
1500
4
1000 Coss
2
500
Crss
0 0
0 5 10 15 20 25 30 0 5 10 15 20 25 30
Qg (nC) -VDS (Volts)
Figure 7: Gate-Charge Characteristics Figure 8: Capacitance Characteristics
100 1000
10Ps TJ(Max)=150°C
TA=25°C
10 100Ps
100
-ID (Amps)
1ms
Power (W)
1 10ms
RDS(ON) limited
100ms
10
0.1 TJ(Max)=150°C
10s
TA=25°C
DC
0.01
1
0.1 1 10 100
-VDS (Volts) 0.00001 0.001 0.1 10 1000
Pulse Width (s)
Figure 9: Maximum Forward Biased Safe Figure 10: Single Pulse Power Rating Junction-
Operating Area (Note E)
to-Ambient (Note E)
10
D=Ton/T In descending order
TJ,PK=TA+PDM.ZTJA.RTJA D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
ZTJA Normalized Transient
RTJA=75°C/W
Thermal Resistance
0.1
PD
0.01 Ton
Single Pulse T
0.001
0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance(Note E)
Vgs
Qg
+ 10V
VDC
+ Vds Qgs Qgd
- VDC
DUT -
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds
90%
DUT
+
Vgs VDC Vdd
Rg -
10%
t on t off
Id Vds
Vgs +
Vgs VDC Vdd I AR
Rg - Id
DUT
Vgs Vgs