Number

2.5.7.2
ASSOCIATION CONNECTING Subject
ELECTRONICS INDUSTRIES ® Dielectric Withstanding Voltage (HiPot Method) - Thin
3000 Lakeside Drive, Suite 309S Dielectric Layers for Printed Circuit Boards (PCBs)
Bannockburn, IL 60015-1249
Date Revision
12/07
Originating Task Group
IPC-TM-650 Embedded Devices Test Methods Subcommittee
TEST METHODS MANUAL (D-54)

1 Scope The dielectric withstanding voltage test (HiPot test) and then etching the copper foil, unless otherwise agreed by
consists of the application of a voltage higher than the oper- both user and supplier. Spacing between adjacent Top
ating voltage for a specific time across the thickness of the Imaged Foil conductors is recommended to be ≥100 times
test specimen’s dielectric layer. This is used to prove that the the dielectric thickness. In order to avoid field gradient and
PCB can operate safely at its rated voltage and withstand mechanical stress concentration, which can cause faulty
momentary voltage spikes due to switching, surges, and other dielectric breakdown, the Bottom Foil can be either another
similar phenomena. Although this test is similar to a voltage larger circle than the Top Imaged Foil or can be a continuous
breakdown test, it is not intended for this test to cause insu- copper sheet. The continuous copper sheet will be required
lation breakdown. Rather, it serves to determine whether the for very thin capacitor dielectric layers that are not self-
test specimen’s layers have adequate withstanding voltage. supporting. At least five test specimens shall be tested for
qualification.
The results can be indicative of a change or a deviation from
the normal material characteristics resulting from manufactur- For nonlaminate like capacitor materials, the test specimen’s
ing, processing or aging conditions. The test is useful for qual- Top Imaged Foil can be a size other than a 50 mm diameter
ity acceptance and in the determination of the suitability of the circle, if this size is not practical or typical. The test speci-
material for a given application and may be adapted for pro- men’s Top Imaged Foil size for these nonlaminate like materi-
cess control. als should be set to the largest size normally recommended
for this product (see 5.2.4). The thickness for the test speci-
2 Applicable Documents mens should be the typical/recommended thickness. A mini-
mum of five test specimens shall be tested for qualification.
IPC-4821 Specification for Embedded Passive Device
Capacitor Materials for Rigid and Multilayer Printed Boards
3.2 Conformance Testing Test specimens can be the
3 Test Specimens same as used for qualification testing or can be other sizes or
shapes. For testing in PCB environments, actual innerlayer
3.1 Qualification Testing For laminate-like capacitor power and ground planes can be used. Please note the
materials, test specimens shall be 50 mm diameter circular adjustments for capacitor plate size required in the test proce-
(Top Imaged Foil in Figure 1) that shall be formed by imaging dure (see Section 6).

Hi-Pot Tester

Electrical Connections
to Top and Bottom Contacts
Top Imaged Foil
Top Contact
Dielectric

Bottom Foil

Bottom Contact

IPC-2572-1.eps

Figure 1 Typical Test Specimen

Material in this Test Methods Manual was voluntarily established by Technical Committees of IPC. This material is advisory only
and its use or adaptation is entirely voluntary. IPC disclaims all liability of any kind as to the use, application, or adaptation of this Page 1 of 3
material. Users are also wholly responsible for protecting themselves against all claims or liabilities for patent infringement.
Equipment referenced is for the convenience of the user and does not imply endorsement by IPC.
 IPC-TM-650
Number Subject Date
2.5.7.2 Dielectric Withstanding Voltage (HiPot Method) - Thin Dielectric 12/07
Layers for Printed Circuit Boards (PCBs)
Revision

3.3 Test Specimen Conditioning All qualification test Many commercial HiPot test instruments display the current
specimens shall be conditioned at 23 °C ± 3 °C and 50% ± during the test. The in-rush current can be determined by set-
10% RH for 24 hours, before testing. For conformance test- ting the threshold current to a high value and then observing
ing, such conditioning is optional. the current spikes as the voltage is ramped to the peak volt-
age. Also note the final, steady-state current during the hold
4 Apparatus at peak voltage. After several test specimens have been
tested and the currents observed, set the threshold current to
4.1 HiPot Tester A HiPot tester is a piece of equipment be greater than the highest current observed.
capable of supplying a range of DC test voltages appropriate
for the materials under test with adjustable ramp rate and 5.3 The test specimen shall be placed between the con-
hold-time settings. The HiPot equipment shall have an
tacts of the HiPot test equipment (see Figure 1). Start the
adjustable threshold current setting (see 5.4). The user shall
HiPot sequence.
be satisfied that the HiPot tester is in good working order.
5.4 Upon completion of the test, the HiPot sequence should
4.2 High Voltage Connections Contacts (conductor
include the discharge of the test specimen. (Safety note:
plates) apply the voltage from the HiPot equipment to the test
Larger test specimens, with high capacitance density, may
specimen’s Top Imaged Foil and Bottom Foil (see Figure 1).
take more time than expected to discharge.)
These contacts should not contain sharp points that could
damage either the copper foil or the dielectric layers of the test
5.5 Reporting The HiPot equipment indicates either: Pass
specimens.
or Fail of the material under test (test specimen). A current
CAUTION: Dangerous voltages may be present on the test surge above the threshold current setting indicates a Failure,
connections. Use proper machine guarding and/or machine which may be a result of dielectric failure or manufacturing
interlocking. defects. If the test Passes, record the leakage current per unit
area and the passing voltage. If the test Fails, record the fail-
5 Procedure
ure voltage and threshold current per unit area of each test
specimen.
5.1 This test method shall be performed on fresh test
specimens. HiPot testing shall not be conducted on test
6 Notes
specimens that have previously been exposed to high voltage
levels or other similar testing.
6.1 When the HiPot test instrument voltage changes from
one level to the next higher level during the ramp-up to the
5.2 Program the HiPot equipment with the appropriate peak
final voltage, the in-rush current will initially surge above the
voltage, voltage ramp rate, hold time at peak voltage and cur-
rent threshold level. Make sure that these values are recorded. steady state current because the capacitor is charging. It is
possible that this surge in current could exceed the threshold
5.2.1 The peak voltage should be as specified in the mate- current preset on the HiPot test instrument, causing the
rial Specification Sheet (IPC-4821, Specification for Embed- instrument to indicate a failure when in fact there was none.
ded Passive Device Capacitor Materials for Rigid and Multi- The charging current of the capacitor is affected by the
layer Printed Boards) under the parameter ‘‘HiPot (Volts DC).’’ change in voltage from one ramp step to another, the dielec-
tric constant of the dielectric, the thickness of the dielectric
5.2.2 The voltage ramp rate shall be 5% of the peak volt- and the area of the capacitor. High dielectric constant, very
age per second, unless otherwise specified. thin dielectric thickness and large area of the capacitor plates
will all cause the charging current to increase. As a result, the
5.2.3 The hold time at peak voltage shall be 30 seconds +3 threshold current setting on the HiPot test instrument may
/ -0 seconds. need to be adjusted upwards to avoid generating a false fail-
ure condition.
5.2.4 The threshold settings shall be set to a value higher
than the in-rush current (due to the charging of the capacitor 6.2 Some thin and filled dielectrics will require a higher
specimen) observed when the voltage is increased (see 6.1). threshold current setting, compared to unfilled materials. This

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 IPC-TM-650
Number Subject Date
2.5.7.2 Dielectric Withstanding Voltage (HiPot Method) - Thin Dielectric 12/07
Layers for Printed Circuit Boards (PCBs)
Revision

is particularly true of dielectrics containing ferroelectric com- 6.3 Some dielectrics may show acceptable HiPot results (ie,
pounds, such as barium titanate. These materials may show ‘‘Pass’’) after defects have been ‘‘burned out’’ at high voltage
a nonlinear response between current and voltage. At higher (see 5.1).
voltages, they behave more like resistors than insulators. This
is not an issue at most operating voltages, which are normally 6.4 Reference Documents
low, but can be an issue for the HiPot test. At high voltage
levels, these materials may trigger a false failure because they ASTM D149 Dielectric Breakdown Voltage of Solid Electrical
allow more current than the threshold setting. Insulating Materials at Commercial Power Frequencies

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