Three-Wire Serial Eeproms: Features
Three-Wire Serial Eeproms: Features
Three-Wire Serial Eeproms: Features
1
Absolute Maximum Ratings*
Operating Temperature......................................−55°C to +125°C *NOTICE: Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
Storage Temperature .........................................−65°C to +150°C age to the device. This is a stress rating only, and
functional operation of the device at these or any
Voltage on Any Pin other conditions beyond those indicated in the
with Respect to Ground ........................................ −1.0V to +7.0V operational sections of this specification is not
implied. Exposure to absolute maximum rating
Maximum Operating Voltage .......................................... 6.25V conditions for extended periods may affect
device reliability
DC Output Current........................................................ 5.0 mA
Note: When the ORG pin is connected to VCC, the “x 16” organization is selected. When it is
connected to ground, the “x 8” organization is selected. If the ORG pin is left uncon-
nected and the application does not load the input beyond the capability of the internal 1
Meg ohm pullup, then the “x 16” organization is selected. The feature is not available on
the 1.8V devices.
For the AT93C46, if “x 16” organization is the mode of choice and Pin 6 (ORG) is left
unconnected, Atmel recommends using the AT93C46A device. For more details, see the
AT93C46A datasheet.
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AT93C46/56/66
Table 3. DC Characteristics
Applicable over recommended operating range from: TAI = −40°C to +85°C, VCC = +1.8V to +5.5V,
TAE = -40°C to +125°C, VCC = +1.8V to +5.5V (unless otherwise noted)
Symbol Parameter Test Condition Min Typ Max Unit
VCC1 Supply Voltage 1.8 5.5 V
VCC2 Supply Voltage 2.7 5.5 V
VCC3 Supply Voltage 4.5 5.5 V
READ at 1.0 MHz 0.5 2.0 mA
ICC Supply Current VCC = 5.0V
WRITE at 1.0 MHz 0.5 2.0 mA
ISB1 Standby Current VCC = 1.8V CS = 0V 0 0.1 µA
ISB2 Standby Current VCC = 2.7V CS = 0V 6.0 10.0 µA
ISB3 Standby Current VCC = 5.0V CS = 0V 17 30 µA
IIL Input Leakage VIN = 0V to VCC 0.1 1.0 µA
IOL Output Leakage VIN = 0V to VCC 0.1 1.0 µA
VIL1(1) Input Low Voltage −0.6 0.8
2.7V ≤ VCC ≤ 5.5V V
VIH1(1) Input High Voltage 2.0 VCC + 1
VIL2(1) Input Low Voltage −0.6 VCC x 0.3
1.8V ≤ VCC ≤ 2.7V V
VIH2(1) Input High Voltage VCC x 0.7 VCC + 1
VOL1 Output Low Voltage IOL = 2.1 mA 0.4 V
2.7V ≤ VCC ≤ 5.5V
VOH1 Output High Voltage IOH = −0.4 mA 2.4 V
VOL2 Output Low Voltage IOL = 0.15 mA 0.2 V
1.8V ≤ VCC ≤ 2.7V
VOH2 Output High Voltage IOH = −100 µA VCC – 0.2 V
Note: 1. VIL min and VIH max are reference only and are not tested.
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Table 4. AC Characteristics
Applicable over recommended operating range from TAI = −40°C to + 85°C, VCC = As Specified,
CL = 1 TTL Gate and 100 pF (unless otherwise noted)
Symbol Parameter Test Condition Min Typ Max Units
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AT93C46/56/66
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Functional The AT93C46/56/66 is accessed via a simple and versatile three-wire serial communi-
cation interface. Device operation is controlled by seven instructions issued by the host
Description processor. A valid instruction starts with a rising edge of CS and consists of a start bit
(logic “1”) followed by the appropriate op code and the desired memory address
location.
READ (READ): The Read (READ) instruction contains the address code for the mem-
ory location to be read. After the instruction and address are decoded, data from the
selected memory location is available at the serial output pin DO. Output data changes
are synchronized with the rising edges of serial clock SK. It should be noted that a
dummy bit (logic “0”) precedes the 8- or 16-bit data output string.
ERASE/WRITE ENABLE (EWEN): To assure data integrity, the part automatically goes
into the Erase/Write Disable (EWDS) state when power is first applied. An Erase/Write
Enable (EWEN) instruction must be executed first before any programming instructions
can be carried out. Please note that once in the EWEN state, programming remains
enabled until an EWDS instruction is executed or VCC power is removed from the part.
ERASE (ERASE): The Erase (ERASE) instruction programs all bits in the specified
memory location to the logical “1” state. The self-timed erase cycle starts once the
Erase instruction and address are decoded. The DO pin outputs the Ready/Busy status
of the part if CS is brought high after being kept low for a minimum of 250 ns (tCS). A
logic “1” at pin DO indicates that the selected memory location has been erased and the
part is ready for another instruction.
WRITE (WRITE): The Write (WRITE) instruction contains the 8 or 16 bits of data to be
written into the specified memory location. The self-timed programming cycle tWP starts
after the last bit of data is received at serial data input pin DI. The DO pin outputs the
Read/Busy status of the part if CS is brought high after being kept low for a minimum of
250 ns (tCS). A logic “0” at DO indicates that programming is still in progress. A logic “1”
indicates that the memory location at the specified address has been written with the
data pattern contained in the instruction and the part is ready for further instructions. A
Ready/Busy status cannot be obtained if the CS is brought high after the end of the self-
timed programming cycle tWP.
ERASE ALL (ERAL): The Erase All (ERAL) instruction programs every bit in the mem-
ory array to the logic “1” state and is primarily used for testing purposes. The DO pin
outputs the Ready/Busy status of the part if CS is brought high after being kept low for a
minimum of 250 ns (tCS). The ERAL instruction is valid only at VCC = 5.0V ± 10%.
WRITE ALL (WRAL): The Write All (WRAL) instruction programs all memory locations
with the data patterns specified in the instruction. The DO pin outputs the Ready/Busy
status of the part if CS is brought high after being kept low for a minimum of 250 ns (tCS).
The WRAL instruction is valid only at VCC = 5.0V ± 10%.
ERASE/WRITE DISABLE (EWDS): To protect against accidental data disturb, the
Erase/Write Disable (EWDS) instruction disables all programming modes and should be
executed after all programming operations. The operation of the Read instruction is
independent of both the EWEN and EWDS instructions and can be executed at any
time.
6 AT93C46/56/66
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AT93C46/56/66
Timing Diagrams
Figure 2. Synchronous Data Timing
µs
7
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Figure 3. READ Timing
tCS
High Impedance
tCS
CS
SK
DI 1 0 0 1 1 ...
tCS
CS
SK
DI 1 0 0 0 0 ...
8 AT93C46/56/66
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AT93C46/56/66
tCS
CS
SK
DI 1 0 1 AN ... A0 DN ... D0
HIGH IMPEDANCE
DO BUSY READY
tWP
SK
DI 1 0 0 0 1 ... DN ... D0
BUSY
HIGH IMPEDANCE
DO READY
tWP
CS CHECK STANDBY
STATUS
SK
tSV tDF
tWP
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Figure 9. ERAL Timing(1)
tCS
CS CHECK STANDBY
STATUS
SK
DI 1 0 0 1 0
tSV tDF
HIGH IMPEDANCE BUSY HIGH IMPEDANCE
DO
READY
tWP
10 AT93C46/56/66
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AT93C46/56/66
Package Type
8P3 8-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)
8S1 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC)
8S2 8-lead, 0.200" Wide, Plastic Gull Wing Small Outline (EIAJ SOIC)
8A2 8-lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP)
8U3-1 8-ball, Die Ball Grid Array Package (dBGA2)
8Y1 8-lead, 4.90 mm x 3.00 mm Body, Dual Footprint, Non-leaded, Miniature Array Package (MAP)
8Y5 8-lead, 2.00 mm x 3.00 mm Body, Dual Footprint, Non-leaded, Miniature Array Package (MAP)
Options
−2.7 Low Voltage (2.7V to 5.5V)
−1.8 Low Voltage (1.8V to 5.5V)
R Rotated Pinout
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AT93C56(1) Ordering Information
Ordering Code(2) Package Operation Range
AT93C56-10PI-2.7 8P3
AT93C56-10SI-2.7 8S1
Industrial
AT93C56W-10SI-2.7 8S2
(−40°C to 85°C)
AT93C56-10TI-2.7 8A2
AT93C56Y1-10YI-2.7 8Y1
AT93C56-10PI-1.8 8P3
AT93C56-10SI-1.8 8S1
Industrial
AT93C56W-10SI-1.8 8S2
(−40°C to 85°C)
AT93C56-10TI-1.8 8A2
AT93C56Y1-10YI-1.8 8Y1
Notes: 1. This device is not recommended for new designs. Please refer to AT93C56A.
2. For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in Table 3 on page 3 and Table 4 on
page 4.
Package Type
8P3 8-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)
8S1 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC)
8S2 8-lead, 0.200" Wide, Plastic Gull Wing Small Outline (EIAJ SOIC)
8A2 8-lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP)
8Y1 8-lead, 4.90 mm x 3.00 mm Body, Dual Footprint, Non-leaded, Miniature Array Package (MAP)
Options
−2.7 Low Voltage (2.7V to 5.5V)
1.8 Low Voltage (1.8V to 5.5V)
12 AT93C46/56/66
0172Z–SEEPR–9/05
AT93C46/56/66
Package Type
8P3 8-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)
8S1 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC)
8S2 8-lead, 0.200" Wide, Plastic Gull Wing Small Outline (EIAJ SOIC)
8A2 8-lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP)
8Y1 8-lead, 4.90 mm x 3.00 mm Body, Dual Footprint, Non-leaded, Miniature Array Package (MAP)
Options
−2.7 Low Voltage (2.7V to 5.5V)
−1.8 Low Voltage (1.8V to 5.5V)
13
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Packaging Information
8P3 – PDIP
1
E
E1
Top View c
eA
End View
COMMON DIMENSIONS
D (Unit of Measure = inches)
e
D1 SYMBOL MIN NOM MAX NOTE
A2 A
A 0.210 2
A2 0.115 0.130 0.195
b 0.014 0.018 0.022 5
b2 0.045 0.060 0.070 6
b3 0.030 0.039 0.045 6
c 0.008 0.010 0.014
D 0.355 0.365 0.400 3
b2 L D1 0.005 3
b3 E 0.300 0.310 0.325 4
4 PLCS b E1 0.240 0.250 0.280 3
e 0.100 BSC
Side View
eA 0.300 BSC 4
L 0.115 0.130 0.150 2
Notes: 1. This drawing is for general information only; refer to JEDEC Drawing MS-001, Variation BA for additional information.
2. Dimensions A and L are measured with the package seated in JEDEC seating plane Gauge GS-3.
3. D, D1 and E1 dimensions do not include mold Flash or protrusions. Mold Flash or protrusions shall not exceed 0.010 inch.
4. E and eA measured with the leads constrained to be perpendicular to datum.
5. Pointed or rounded lead tips are preferred to ease insertion.
6. b2 and b3 maximum dimensions do not include Dambar protrusions. Dambar protrusions shall not exceed 0.010 (0.25 mm).
01/09/02
TITLE DRAWING NO. REV.
2325 Orchard Parkway 8P3, 8-lead, 0.300" Wide Body, Plastic Dual
8P3 B
R San Jose, CA 95131 In-line Package (PDIP)
14 AT93C46/56/66
0172Z–SEEPR–9/05
AT93C46/56/66
E E1
N L
∅
Top View
End View
e B
COMMON DIMENSIONS
A
(Unit of Measure = mm)
Note: These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc.
10/7/03
TITLE DRAWING NO. REV.
1150 E. Cheyenne Mtn. Blvd. 8S1, 8-lead (0.150" Wide Body), Plastic Gull Wing
Colorado Springs, CO 80906 8S1 B
R
Small Outline (JEDEC SOIC)
15
0172Z–SEEPR–9/05
8S2 – EIAJ SOIC
E E1
N L
Top View ∅
End View
e b COMMON DIMENSIONS
A (Unit of Measure = mm)
Notes: 1. This drawing is for general information only; refer to EIAJ Drawing EDR-7320 for additional information.
2. Mismatch of the upper and lower dies and resin burrs are not included.
3. It is recommended that upper and lower cavities be equal. If they are different, the larger dimension shall be regarded.
4. Determines the true geometric position.
5. Values b and C apply to pb/Sn solder plated terminal. The standard thickness of the solder layer shall be 0.010 +0.010/−0.005 mm.
10/7/03
TITLE DRAWING NO. REV.
2325 Orchard Parkway 8S2, 8-lead, 0.209" Body, Plastic Small
San Jose, CA 95131 8S2 C
R
Outline Package (EIAJ)
16 AT93C46/56/66
0172Z–SEEPR–9/05
AT93C46/56/66
8A2 – TSSOP
3 2 1
Pin 1 indicator
this corner
E1 E
L1
N
L
Top View End View
COMMON DIMENSIONS
(Unit of Measure = mm)
Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances,
datums, etc.
2. Dimension D does not include mold Flash, protrusions or gate burrs. Mold Flash, protrusions and gate burrs shall not exceed
0.15 mm (0.006 in) per side.
3. Dimension E1 does not include inter-lead Flash or protrusions. Inter-lead Flash and protrusions shall not exceed 0.25 mm
(0.010 in) per side.
4. Dimension b does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.08 mm total in excess of the
b dimension at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum space between
protrusion and adjacent lead is 0.07 mm.
5. Dimension D and E1 to be determined at Datum Plane H. 5/30/02
TITLE DRAWING NO. REV.
2325 Orchard Parkway 8A2, 8-lead, 4.4 mm Body, Plastic
8A2 B
R San Jose, CA 95131 Thin Shrink Small Outline Package (TSSOP)
17
0172Z–SEEPR–9/05
8U3-1 – dBGA2
D
1. b
A1
PIN 1 BALL PAD CORNER
A2
Top View
A
8 7 6 5
e
COMMON DIMENSIONS
(Unit of Measure = mm)
(e1)
SYMBOL MIN NOM MAX NOTE
Bottom View A 0.71 0.81 0.91
8 SOLDER BALLS
A1 0.10 0.15 0.20
A2 0.40 0.45 0.50
b 0.20 0.25 0.30
D 1.50 BSC
1. Dimension “b” is measured at the maximum solder ball diameter.
E 2.00 BSC
This drawing is for general information only. e 0.50 BSC
e1 0.25 REF
d 1.00 BSC
d1 0.25 REF
6/24/03
TITLE DRAWING NO. REV.
1150 E. Cheyenne Mtn. Blvd. 8U3-1, 8-ball, 1.50 x 2.00 mm Body, 0.50 mm pitch,
R Colorado Springs, CO 80906 Small Die Ball Grid Array Package (dBGA2) PO8U3-1 A
18 AT93C46/56/66
0172Z–SEEPR–9/05
AT93C46/56/66
8Y1 – MAP
1 2 3 4
E1
D D1
8 7 6 5
A1 b e
E
2/28/03
TITLE DRAWING NO. REV.
2325 Orchard Parkway 8Y1, 8-lead (4.90 x 3.00 mm Body) MSOP Array Package
San Jose, CA 95131 8Y1 C
R
(MAP) Y1
19
0172Z–SEEPR–9/05
8Y5 – MAP
D2 b
(8x)
Pin 1
Index
Area
E
E2
Pin 1 ID
L (8x)
e (6x)
A3
1.50 REF.
Bottom View
Top View
A
COMMON DIMENSIONS
(Unit of Measure = mm)
20 AT93C46/56/66
0172Z–SEEPR–9/05
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0172Z–SEEPR–9/05