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    3CS3 04 PDF

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    This document contains a 3 page exam for a Digital Electronics course. It includes 10 questions in Part A worth 2 marks each, 5 questions in Part B worth 8 marks each, and 4 questions in Part C worth 15 marks each. The exam covers topics such as binary conversions, Boolean algebra, logic gates, multiplexers, flip flops, counters, and logic families. Students are instructed to attempt all questions from Parts A and B, and 4 questions from Part C.

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    3CS3 04 PDF

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    prashantvlsi
    75 views3 pages
    This document contains a 3 page exam for a Digital Electronics course. It includes 10 questions in Part A worth 2 marks each, 5 questions in Part B worth 8 marks each, and 4 questions in Part C worth 15 marks each. The exam covers topics such as binary conversions, Boolean algebra, logic gates, multiplexers, flip flops, counters, and logic families. Students are instructed to attempt all questions from Parts A and B, and 4 questions from Part C.

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    This document contains a 3 page exam for a Digital Electronics course. It includes 10 questions in Part A worth 2 marks each, 5 questions in Part B worth 8 marks each, and 4 questions in Part C worth 15 marks each. The exam covers topics such as binary conversions, Boolean algebra, logic gates, multiplexers, flip flops, counters, and logic families. Students are instructed to attempt all questions from Parts A and B, and 4 questions from Part C.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    75 views3 pages

    3CS3 04 PDF

    Uploaded by

    prashantvlsi
    This document contains a 3 page exam for a Digital Electronics course. It includes 10 questions in Part A worth 2 marks each, 5 questions in Part B worth 8 marks each, and 4 questions in Part C worth 15 marks each. The exam covers topics such as binary conversions, Boolean algebra, logic gates, multiplexers, flip flops, counters, and logic families. Students are instructed to attempt all questions from Parts A and B, and 4 questions from Part C.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 3

    Total No of Pages: tr

    3E1 137
    B. Tech. III: Sem. (Main) Exam., Dec. - 2018
    ESC Computer Science & Engineering
    3CS3 - 04 Digital Electronics
    CS, IT
    Time: 3 Hours Maximum Marks: 120

    Instructions to Candidates :
    Attempt all ten questions from Part A, selecting five questions from Purt B and
    four questi.ons from Purt C.
    Schelmafic diagrams must be shown wherever necessary. Any data you feel
    missing may suitably be assumed and stated clearly. Units of quantities
    used /calculated must be stated clearly.
    [Jse of following supporting material is permitted during examinatibn.
    (Mentioned inform No. 205)

    1. NIL 2. NIL

    PART -A
    (Answer should tre giyen up to 25 words o_nly) [10x2=20l

    All questions are compulsory

    Q.1 Convert (D2. 9)16 = I ;t

    Q.2 Find the sum (y)o = $.2)e + (4.5)o

    Q.3 ConvertY = A + BC+ AB + ABC intocanonical lbrm.

    Q.4 Find the minimum number of nand gate required to realize Y - ABC.

    Q.5 Find the value of x


    (23).+ (12)*= (101)*

    [3E1137]; Page 1 of3 Is680]


    Q.6 Explain the reflected code.

    Q.7 Implement a latch using 2:1 mux.

    Q.8 State the difference between combinational and sequential circuit.

    Q,9 Write the RS flip flop excitation table.

    Q.10 How many JK flip flop are required to implement modulus 50 counters?

    PART. B

    (Analytical/Problem solvins questions) [5x8=40]

    Attempt anv five questions

    Q.1 The two numbers represented in signed 2's complement form are P = 11101101 and

    Q = 11100110. Find the value obtained in signed 2's complement form for P - Q.
    Q.2 Simplify the following function and implement it using NOR gare -
    F=AB+aBD+ABD+ ACD+ AgE

    Q.3 Implement the following logic using only one 8:1 MUX -
    F (A, B, C, D) = lm (I,3,4, ll, 12, 13,14,15)

    Q.4 Explain prime, essential and redundant implicant using suitable example.

    Q.5 State the merits and demerits of various logic families.

    Q.6 Convert JK flip flop into RS flip flop. Explain its process also.

    Q.7 A stair case light is controlled by two switches one at top of stairs and another at bottom

    of stairs. Realize the circuit using minimum number of NOR gate when lamp (L) glows.

    [3E113 7] Page2 of3 Is680]


    PART -C
    [4x15=60]

    Q.1 using JK flip flop design a synchronous counter that counts


    in sequence -

    000,001, 110,011,010, 111, 101, 100.000

    Q.2 Simplify the following function using tabulation method and verify
    the result using
    K-map

    F= I (0,6,9,10, 13) + d (1, 3, g)

    Q.3 Draw a neat circuit diagram of TTL (Transistor Transistor Logic) NAND gate with

    totem pole output and explain.

    Q.4 Determine the next state for each of six unused states in BCD ripple
    counter. Is the
    counter self starting? Design a divide by g counter also.

    Q.s Write short note on only two -


    (a) Universal gate

    (b) ASCII code

    (c) Weighted code

    (d) High threshold logic

    [3E1137] Page 3 of3 Is680]

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