Electronic Devices Lab Simulations: December 2019
Electronic Devices Lab Simulations: December 2019
Electronic Devices Lab Simulations: December 2019
Simulations
December 2019
ii
LIST OF TABLES
iii
LIST OF FIGURES
iv
1. DIODE CHARACTERISTICS
Aim:
To study the characteristics of Diode.
Theory:
We use semiconductor materials (Si,Ge) to form variety of electronic devices . The most
basic device is diode. Diode is a two terminal PN junction device . PN junction is formed
by bringing a P type material in contact with N type material.
When a P type material is brought in contact with N type material electrons and holes
start recombining near junction. This results in lack of charge carrier at the junction is
called depletion region. When we apply voltage across the terminals of PN junction, we
call it as diode.
Diode is unidirectional device that allows the flow of current in one direction only
depending on the biasing.
Design:
V<0, ID=IS
V>0, ID=IS(eV/NV – 1)
N = 1, for G
= 2 for Si
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Circuit Diagram:
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Results:
1 0 0 0 0
2 0.58 0 2.24 2
3 0.66 5 4.34 4
4 0.69 10 6.70 6
5 0.70 15 8.84 8
6 0.71 20 10.94 10
7 0.72 25 13.00 12
8 0.73 30 15.35 14
9 0.74 35 16.88 16
10 0.74 40 18.66 18
11 0.75 45 21.4 20
12 0.75 50 23.5 22
13 0.75 55 25.6 24
14 0.76 60 27.9 26
15 0.76 65
16 0.76 70
17 0.77 75
18 0.77 80
19 0.77 85
20 0.77 90
21 0.77 95
22 0.77 100
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Inference:
The diode characteristics are studied and it is observed that the forward current increases by
very small value till cutoff voltage and then it increases rapidly. And reverse current also start
increases rapidly when reverse bias voltage crosses breakdown voltage.
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2. ZENER DIODE CHARACTERISTICS
Aim:
To study the characteristics of Zener diode.
Theory: The I-V Characteristics Curve of a zener diode, shown below, is the curve which
shows the current-voltage relationship of a zener diode.
The zener diode goes through a number of different regions or stages, of which are explained
below.
The right half side of the characteristics curve is the part in which the zener diode receives
forward voltage, which is positive voltage across its anode to cathode terminals. The diode in
this region is in forward biased. During this period, the current is small for a while until it
spikes exponentially up once the voltage reaches a certain point, called the threshold voltage.
The left half side of the characteristics curve is the more important part, when considering
zener diodes. This is the part in which the zener diode receives positive voltage across its
cathode to anode terminals. The diode in this region is reverse biased.
Circuit Diagram:
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Figure 2-2: Transfer characteristics of Zener Diode.
S.
N Forward Current Reverse Current
o Voltage(V ) (mA) Voltage(V) (µA)
1 0 0 0 0
2 0.52 0 0.05 2
3 1.57 5 0.14 4
4 2.35 10 0.30 6
5 2.49 15 0.54 8
6 2.92 20 0.81 10
7 3.09 25 1.05 12
8 3.50 30 1.36 14
9 3.70 35 1.63 16
10 3.83 40 1.90 18
11 3.87 45 2.22 20
12 3.96 50 2.58 22
13 4.03 55 2.71 24
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14 4.10 60 3.09 26
15 3.34 28
16 3.63 30
17 3.81 32
18 4.14 34
19 4.37 36
20 4.74 38
21 4.90 40
22 4.95 42
23 5.06 44
24 5.50 46
25 5.76 48
26 5.95 50
27 6.18 52
28 6.41 54
29 6.60 56
30 6.78 58
31 6.93 60
Inference:
The Zener diode characteristics are studied and it is observed that, in forward bias the Zener
diode acts as a normal diode. When the reverse bias voltage exceeds the breakdown voltage
the reverse current starts increase rapidly.
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3. BJT CE CHARACTERISTICS
Aim:
To study the characteristics of BJT in CE mode.
Theory:
In CE mode of BJT, the input is applied between base and emitter and the output is taken
between collector and emitter, so emitter of the BJT is common to both input and output.
Input characteristics are obtained between the input voltage and input current at
constant output voltage.
Output characteristics are obtained between output voltage and output current at
constant input current.
Transfer characteristics are obtained between output current.
Circuit Diagram:
Circuit Diagram should have a caption as below
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Figure 2-2: Input characteristics of BJT.
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Results:
VBE IB
0 -4.6E-11
0.5 2.71E-07
1 0.018264
1.5 0.064894
2 0.113436
2.5 0.162495
3 0.211771
3.5 0.261607
4 0.310996
4.5 0.360488
5 0.410104
Table 3-1 :Input Voltage and input current table.
VCE IC
0 -0.02629
1 0.406835
2 0.855009
3 1.293044
4 1.391964
5 1.414716
6 1.437711
7 1.460712
8 1.483714
9 1.506716
10 1.529718
Table 3-2 :Output Voltage and output current table.
VBE IC
0 5.79E-11
1 0.587446
2 1.52998
3 2.082564
4 2.505418
5 2.855812
6 3.162495
7 3.431618
8 3.675551
9 3.899699
10 4.107366
11 4.301179
12 4.482691
13 4.550398
14 4.561066
15 4.566119
In input characteristics curve, as input voltage increases the input current increases by
very small value till cut off voltage after that a small increase in input voltage will
rapidly increases the input current.
In output characteristic curve, the output current increases rapidly till it becomes
equal to input voltage, after that the output current becomes almost constant.
In transfer characteristics, the collector current will be almost zero in cutoff region, in
active region it increases rapidly and becomes almost constant in saturation region.
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4. JFET CHARACTERISTICS
Aim:
To study the characteristics of JFET.
Theory:
Output or Drain Characteristic.
The curve obtained between drain current ID and drain-source voltage VDS with gate
to source voltage VGS as the parameter is called the drain or output characteristic.
Initially when drain-source voltage VDS is zero no current flows (ID = 0). When VDS
voltage is increased the drain current increases linearly with the increase in VDS, up to
the knee point. This region is called the channel ohmic region.
When VDS voltage is further increased the current approaches constant saturation
value known as saturation region.
Transfer characteristics.
The curve obtained between drain current ID and gate-source voltage VGS with drain
to source voltage VDS constant is called the Transfer characteristic.
Circuit Diagram:
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Figure 4-2: Input characteristics of JFET.
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Results:
VGS(Volts) IG(Amperes)
0.1 -1.56E-12
0.25 1.8E-9
0.3 1.24E-8
0.35 8.42E-8
0.4 5.44E-07
0.45 3.97E-06
0.55 1.87E-04
0.6 1.23E-04
0.65 0.000821
0.7 0.005675
0.75 0.03922
Table 4-1 Input voltage and input current table
VDS(Volts) ID(Amperes)
0 -1.1E-12
0.5 0.000187
1 0.000324
1.5 0.000411
2 0.000448
2.5 0.000449
3 0.000449
3.5 0.000449
4 0.000449
4.5 0.000449
5 0.000449
Table 4-2 Output voltage and output current table
VGS(Volts) ID(Amperes)
-2.5 1.45E-11
-2 1.4E-11
-1.5 2.5E-05
-1 0.0001
-0.5 0.000225
0 0.0004
0.5 0.000625
1 0.0009
1.5 0.001225
2 0.0016
2.5 0.002025
3 0.0025
Table 4-3 Input voltage and output current table
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Inference:
In output characteristics, initially when drain-source voltage VDS is zero no current flows (ID
= 0). When VDS voltage is increased the drain current increases linearly and then becomes
constant.
In transfer characteristics, Drain current decreases with the increase in negative gate-source
bias.
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5. MOSFET CHARACTERISTICS
Aim:
To study the characteristics of a MOSFET.
Theory:
MOSFET is seen to exhibit three operating regions,
Cut-Off Region
Cut-off region is a region in which the MOSFET will be OFF as there will be no
current flow through it.
Saturation Region
In saturation region, the MOSFETs have their IDS constant with an increase in VDS
and occurs once VDS exceeds the value of pinch-off voltage.
Circuit Diagram:
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Figure 5-2: Transfer characteristics of MOSFET.
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Results:
VDS(Volts) ID(Ampere)
0 0
0.5 1.75E-05
1 3E-05
1.5 3.75E-05
2 4E-05
2.5 4E-05
3 4E-05
3.5 4E-05
4 4E-05
4.5 4E-05
5 4E-05
VGS(Volts) ID(Ampere)
0 1.2E-11
0.5 2.5E-06
1 1E-05
1.5 2.25E-05
2 4E-05
2.5 6.25E-05
3 9E-05
3.5 0.000123
4 0.00016
4.5 0.000203
5 0.00025
Inference:
The Drain and transfer characteristics of MOSFET are studied, and it is observed that, ID will
be zero till cutoff voltage and starts increase linearly in active region and becomes constant in
saturation region.
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6. VERIFICATION OF MAXIMUM POWER TRANFER THEOREM
Aim:
To verify the maximum power transfer theorem.
Theory:
The maximum power transfer theorem states that the maximum amount of power will be
dissipated by a load resistance when that load resistance is equal to the Thevenin resistance of
the network supplying the power. If the load resistance is lesser or higher than Thevenin
resistance of the source network, its dissipated power will be less than the maximum.
Design:
P=VxI
Circuit Diagram:
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Figure 6-2: Power versus load resistance graph.
Results:
Inference:
The maximum power transfer theorem is verified and it is observed that the power dissipation
across the load resistor is maximum when the load resistance is equal to Thevenin resistance.
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