Digital Ic Applications NOTES (R-16) : Giet College of Engineering

GIET COLLEGE OF ENGINEERING
NH-16, CHAITANYA KNOWLEDGE CITY-

RAJAMAHENDRAVARAM
DIGITAL IC APPLICATIONS
NOTES(R-16)
Prepared by
CH.NAVEEN KUMAR, assistant professor
ELECTRONICS AND COMMUNICATION ENGINEERING
B.TECH THIRD YEAR COURSE

(Applicable for the batches admitted from 2018-2019)
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY KAKINADA

KAKINADA
Syllabus:-
UNIT-I
Digital Logic Families and Interfacing: Introduction to logic families, CMOS logic, CMOS steady
state and dynamic electrical behavior, CMOS logic families. Bipolar logic, transistor-transistor logic,
TTL families, CMOS/TTL interfacing, low voltage CMOS logic and interfacing, Emitter coupled
logic.
UNIT-II
Introduction to VHDL: Design flow, program structure, levels of abstraction, Elements of VHDL:
Data types, data objects, operators and identifiers. Packages, Libraries and Bindings, Subprograms.
VHDL Programming using structural and data flow modeling.
UNIT-III
Behavioral Modeling: Process statement, variable assignment statement, signal assignment statement,
wait statement , if statement, case statement ,null statement, loop statement, exit statement, next
statement ,assertion statement, more on signal assignment statement ,Inertial Delay Model, Transport
Delay Model ,Creating Signal Waveforms, Signal Drivers , Other Sequential Statements , Multiple
Processes. Logic Synthesis, Inside a logic Synthesizer.
UNIT-IV
Combinational Logic Design: Binary Adder-Subtractor, Ripple Adder, Look Ahead Carry Generator,
ALU, Decoders, encoders, multiplexers and demultiplexers, parity circuits, comparators, Barrel
Shifter, Simple Floating- Point Encoder, Dual Priority Encoder, Design considerations of the above
combinational logic circuits with relevant Digital ICs, modeling of above ICs using VHDL.
UNIT-V
Sequential Logic Design: SSI Latches and flip flops, Ring Counter, Johnson Counter, Design of
Modulus N Synchronous Counters, Shift Registers, Universal Shift Registers, Design considerations of
the above sequential logic circuits with relevant Digital ICs, modeling of above ICs using VHDL.
UNIT-VI:
Synchronous and Asynchronous Sequential Circuits: Basic design steps: State diagram, state table,
state assignment, choice of flip flops and derivation of next state and output expressions, timing
diagram. State assignment problem: One hot encoding. Mealy and Moore type FSM for serial adder,
VHDL code for the serial adder. Analysis of Asynchronous circuits, State Reduction, State
Assignment. A complete design example: The vending machine controller.
Text Books:
1. Digital Design Principles & Practices – John F. Wakerly, PHI/ Pearson Education Asia, 3rd Ed.,
2005.
2. VHDL Primer – J. Bhasker, Pearson Education/ PHI, 3rd Edition.
References:
1. Fundamentals of Digital Logic with VHDL Design- Stephen Brown, ZvonkoVranesic,

McGrawHill, 3rd Edition.
LESSON PLAN:-
3.INDIVIDUAL TIMETABLE:
DAY I II III IV V VI
MON DICA
TUE DICA
LUNCH BREAK
WED DICA LAB
THU DICA DICA LAB
FRI DICA
SAT DICA
VISION OF THE DEPARTMENT
“Excel in education and research in Electronics & Communication Engineering”. Progressively
achieve higher levels of quality standards by adopting latest learning / teaching processes which are
embedded in the support system and to maintain an environment which fosters holistic development
and strengthens the morality & ethics of the learners.
MISSION OF THE DEPARTMENT

i. To impart quality education in fundamentals of basic sciences, mathematics, electronics
and communication engineering through innovative teaching-learning processes.
ii. To facilitate Graduates define, design, and solve engineering problems in the field of
Electronics and Communication Engineering using various Electronic Design Automation
(EDA) tools.
iii. To encourage research culture among faculty and students thereby facilitating them to be
creative and innovative through constant interaction with R & D organizations and Industry.
iv. To inculcate teamwork, imbibe leadership qualities, professional ethics and social
responsibilities in students and faculty
PEO’S AND PO’S
Program Educational Objectives of B. Tech (ECE) Program:

I To prepare students with excellent comprehension of basic sciences, mathematics and
engineering subjects facilitating them to gain employment or pursue postgraduate studies with
an appreciation for lifelong learning.
II To train students with problem solving capabilities such as analysis and design with
adequate practical skills wherein they demonstrate creativity and innovation that would
enable them to develop state of the art equipment and technologies of multidisciplinary nature
for societal development.
Program Outcomes of B.Tech ECE Program:

1) An ability to apply knowledge of Mathematics, Science, and Engineering to solve complex
engineering problems of Electronics and Communication Engineering systems.
2) An ability to model, simulate and design Electronics and Communication Engineering
systems, conduct experiments, as well as analyze and interpret data and prepare a report with
conclusions.
3) An ability to design an Electronics and Communication Engineering system, component, or
process to meet desired needs within the realistic constraints such as economic,
environmental, social, political, ethical, health and safety, manufacturability and
sustainability.
4) An ability to function on multidisciplinary teams involving interpersonal skills.
5) An ability to identify, formulate and solve engineering problems of

multidisciplinary nature.
6) An understanding of professional and ethical responsibilities involved in the practice of
Electronics and Communication Engineering profession.
7) An ability to communicate effectively with a range of audience on complex engineering
problems of multidisciplinary nature both in oral and written form.
8) The broad education necessary to understand the impact of engineering solutions in a global,
economic, environmental and societal context.
9) A recognition of the need for, and an ability to engage in life-long learning and acquire the
capability for the same.
10) A knowledge of contemporary issues involved in the practice of Electronics and
Communication Engineering profession
11) An ability to use the techniques, skills and modern engineering tools necessary for
engineering practice
12) An ability to use modern Electronic Design Automation (EDA) tools, software and electronic
equipment to analyze, synthesize and evaluate Electronics and Communication Engineering
systems for multidisciplinary tasks.
13) Apply engineering and project management principles to one's own work and also to manage
projects of multidisciplinary nature
Course objectives and outcomes:
Course objectives
The main objectives of this course are:
 Introduction of digital logic families and interfacing concepts for digital design is considered.
 VHDL fundamentals were discussed to modeling the digital system design blocks.
 VHDL compilers, simulators and synthesis tools are described, which are used to verify digital
systems in a technology-independent fashion.
 Design and implementation of combinational and sequential digital logic circuits is explained.
Course outcomes:
At the end of this course the student can able to:
 Understand the structure of commercially available digital integrated circuit families.

 Learn the IEEE Standard 1076 Hardware Description Language (VHDL).
 Model complex digital systems at several levels of abstractions, behavioral, structural,
simulation, synthesis and rapid system prototyping.
 Analyze and design basic digital circuits with combinatorial and sequential logic circuits using
VHDL.
ASSIGNMENT QUESTIONS
UNIT-1
UNIT-2
UNIT-3
UNIT-4
UNIT-5
UNIT-6
QUESTION BANK
MID QUESTIONS:

NH-16, CHAITANYA KNOWLEDGE CITY, RAJAHMUNDRY – 533 296.
III B. Tech I Semester 1st MID Examination
Date: ( Electronics and communication Engineering)
Time: 1.30 hrs. Max Marks:15
Answer all questions
1. A) Draw 2-inputOR/NOR gate using ECL logic and explain with truth table .(3M)
B) Explain the CMOS circuit behavior with resistive load.(2M)

2. A)Explain about Data Objects in VHDL with examples.(2M)
B) Discuss libraries and packages n detail with examples.(3M)

3. A)Design two input XNOR gate using CMOS.(2M)
B )Explain about process statement and case statement with example.(3M)

NH-16, CHAITANYA KNOWLEDGE CITY, RAJAHMUNDRY – 533 296.
III B. Tech I Semester II MID Examination
Date: Electronics and Communication Engineering
Time: 1.30 hrs. Max Marks:15
Answer all questions
1. a)Design 8 bit ALU using digital ICs.(3M)

b)Write VHDL code for 16 bit barrel shifter.(2M)
2. a)With a neat sketch explain universal shift register.(3M)
b) Explain about state diagram.(2M)
3. a)Explain in details working of JOHNSON COUNTER using 74LS194 IC.(3M)
b)Explain MELAY type FSM adder.(2M)

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GIET COLLEGE OF ENGINEERING

NH-16, CHAITANYA KNOWLEDGE CITY-

B.TECH THIRD YEAR COURSE

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY KAKINADA

1. Fundamentals of Digital Logic with VHDL Design- Stephen Brown, ZvonkoVranesic,

MISSION OF THE DEPARTMENT

Program Educational Objectives of B. Tech (ECE) Program:

Program Outcomes of B.Tech ECE Program:

4) An ability to function on multidisciplinary teams involving interpersonal skills.

5) An ability to identify, formulate and solve engineering problems of

At the end of this course the student can able to:

 Understand the structure of commercially available digital integrated circuit families.

GIET COLLEGE OF ENGINEERING

B) Explain the CMOS circuit behavior with resistive load.(2M)

B) Discuss libraries and packages n detail with examples.(3M)

B )Explain about process statement and case statement with example.(3M)

GIET COLLEGE OF ENGINEERING

1. a)Design 8 bit ALU using digital ICs.(3M)

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