74HC4052D Datasheet en 20160912 PDF
74HC4052D Datasheet en 20160912 PDF
74HC4052D Datasheet en 20160912 PDF
74HC4051D,74HC4052D
1. Functional Description
74HC4051D:8-Channel Analog Multiplexer/Demultiplexer
74HC4052D:Dual 4-Channel Analog Multiplexer/Demultiplexer
2. General
The 74HC4051D, 74HC4052D are high speed CMOS ANALOG MULTIPLEXER/DEMULTIPLEXER fabricated
with silicon gate C2MOS technology. They achieve the high speed operation similar to equivalent LSTTL while
maintaining the CMOS low power dissipation.
The 74HC4051D has an 8 channel configuration and the 74HC4052D has a 4 channel× 2 configuration.
The digital signal to the control terminal turns "ON" the corresponding switch of each channel a large amplitude
signal (VCC - VEE) can then be switched by the small logical amplitude (VCC - GND) control signal.
For example, in the case of VCC = 5 V, GND = 0 V, VEE = -5 V, signals between -5 V and +5 V can be switched
from the logical circuit with a single power supply of 5 V. As the ON-resistance of each switch is low, they can be
connected to circuits with low input impedance.
All inputs are equipped with protection circuits against static discharge or transient excess voltage.
3. Features
(1) Low power dissipation: ICC = 4.0 µA (max) (VCC = 6.0 V, VEE = GND, Ta = 25 )
(2) Low ON-resistance: RON = 130 Ω (typ. VIN = VEE), 75 Ω (typ. VIN = VCC) at VCC - VEE = 9 V
(3) High noise immunity: THD = 0.02 % (typ.) at VCC - VEE = 9 V
4. Packaging
SOIC16
74HC4051D 74HC4052D
7. Marking
74HC4051D 74HC4052D
74HC4051D
74HC4052D
X: Don't care
*: Except 74HC4052D
Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even
destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report
and estimated failure rate, etc).
Note: The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either VCC or GND.
Input/Output leakage current II/O VOS = VCC or GND GND 6.0 ±0.06 µA
(Switch ON) VIN = VIH or VIL -6.0 6.0 ±0.1
Control input leakage current IIN VIN = VCC or GND GND 6.0 ±0.1 µA
Quiescent supply current ICC VIN = VCC or GND GND 6.0 4.0 µA
-6.0 6.0 8.0
Input/Output leakage current II/O VOS = VCC or GND GND 6.0 ±0.6 µA
(Switch ON) VIN = VIH or VIL -6.0 6.0 ±1.0
Control input leakage current IIN VIN = VCC or GND GND 6.0 ±1.0 µA
Quiescent supply current ICC VIN = VCC or GND GND 6.0 40.0 µA
-6.0 6.0 80.0
Note 1: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current
consumption without load. Average operating current can be obtained by the equation.
ICC(opr) = CPD × VCC × fIN + ICC
Sine Wave Distortion THD RL = 10 kΩ, CL = 50 pF VIN = 4.0 Vp-p -2.25 2.25 0.025 %
fIN = 1 kHz VIN = 8.0 Vp-p -4.5 4.5 0.020
VIN = 11.0 Vp-p -6.0 6.0 0.018
Maximum frequency fMAX(I/O) Adjust fIN voltage to obtain (Note 1) -2.25 2.25 120 MHz
response 0 dBm at VOS
74HC4051D (Note 2) 45
Increase fIN frequency until
74HC4052D dB meter reads -3 dB 70
RL = 50 Ω, CL = 10 pF (Note 1) -4.5 4.5 190
fIN = 1 MHz, sine wave
74HC4051D (Note 2) 70
Figure 3
74HC4052D 110
(Note 1) -6.0 6.0 200
74HC4051D (Note 2) 85
74HC4052D 140
Feed through FTH VIN is centered at (VCC/2). -2.25 2.25 -50 dB
attenuation (switch OFF) Adjust input for 0 dBm.
RL = 600 Ω, CL = 50 pF, -4.5 4.5 -50
fIN = 1 MHz, sine wave
-6.0 6.0 -50
Figure 4
Crosstalk (control input Xtalk RL = 600 Ω, CL = 50 pF, -2.25 2.25 60 mV
to signal output) fIN = 1 MHz,
-4.5 4.5 140
square wave (tr = tf = 6 ns)
Figure 5 -6.0 6.0 200
Crosstalk (between any Xtalk Adjust VIN to obtain 0 dBm -2.25 2.25 -50 dB
switches) at input.
RL = 600 Ω, CL = 50 pF, -4.5 4.5 -50
fIN = 1 MHz, sine wave
-6.0 6.0 -50
Figure 6
Note: These characteristics are determined by design of devices.
Note 1: Input COMMON terminal, and measured at SWITCH terminal.
Note 2: Input SWITCH terminal, and measured at COMMON terminal.
Package Name(s)
Nickname: SOIC16
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