Search Results (56)

The critical charge of sensitive nodes decreases as transistors scale down with the advancement of CMOS technology, making SRAM cells more susceptible to soft errors in the space industry. When a radiation particle strikes a sensitive node of a conventional 6T SRAM cell, a single event upset (SEU) can occur, flipping in the stored data in the cell. Additionally, charge sharing between transistors can cause single-event multi-node upsets (SEMNUs), where data in multiple nodes are flipped simultaneously due to a single particle strike. Therefore, this paper proposes a radiation-hardened high stability 16T (RHHS16T) cell for space applications. The characteristics of RHHS16T are evaluated and compared with previously proposed radiation-hardened SRAM cells such as QUCCE12T, WEQUATRO, RHBD10T, RHD12T, RSP14T, RHPD14T, and RHBD14T. Simulation results for RHHS16T indicated that the proposed cell demonstrates improved performance in read stability, write access time, and write stability compared to all comparison cells. These improvements in the proposed cell are achieved with higher power consumption and a minor area penalty. Notably, isolating the storage node from the bit line during read operations and the feedback loop between nodes during write operations enables the proposed RHHS16T to achieve enhanced read stability and write stability, respectively. The proposed integrated circuit was implemented using a 90 nm CMOS process and operates at a supply voltage of 1V. Furthermore, RHHS16T provides high immunity against SEUs and SEMNUs. Through its enhanced read and write stability, it ensures reliable data retention for space applications. Full article

In space environments, radiation particles affect the stored values of SRAM cells, and these effects, such as single-event upsets (SEUs) and single-event multiple-node upsets (SEMNUs), pose a threat to the reliability of systems used in the space industry. To mitigate the impacts of SEUs and SEMNUs, this paper proposes the Read Stability Improved and Low Power (RSLP16T) SRAM cell. It was confirmed that in SEU-induced simulations, all nodes of the RSLP16T could be restored with a charge amount of less than 100 fC. Additionally, it was verified that a similar level of restoration was possible for SEMNUs occurring in pair of storage nodes. The proposed cell achieves a high level of read stability due to a high pull-down cell ratio (current ratio, CR) at the storage nodes and the fact that only a pair of nodes is in contact with the bit lines during read operations. Because all node paths use a stacking structure for internal transistor configuration and a relatively higher number of cells are composed of PMOS, it consumes the least hold power. While these improvements come at the cost of slightly increased delay time and area, performance evaluation revealed that the equivalent quality metric (EQM) was the highest, indicating that the benefits outweigh the drawbacks. The proposed integrated circuit is implemented in the 90 nm CMOS process and operated on 1 V supply voltage. Full article

Exposure to space radiation substantially degrades satellite systems, provoking severe partial or, in some extreme cases, total failures. Electrostatic discharges (ESD), single event latch-up (SEL), and single event upsets (SEU) are among the most frequent causes of those reported satellite anomalies. The impact of space radiation dose on satellite equipment has been studied in-depth. This study conducts a statistical analysis to explore the relationships between low-Earth orbit (LEO) and geostationary orbit (GEO) satellite anomalies and particle concentrations, solar and geomagnetic activity in the period 2010–2022. Through a monthly and daily timescale analysis, the present work explores the temporal response of space disturbances on satellite systems and the periods when satellites are vulnerable to those disturbances. Full article

The exposure of spaceborne devices to high-energy charged particles in space results in the occurrence of both a total ionizing dose (TID) and the single-event effect (SEE). These phenomena present significant challenges for the reliable operation of spacecraft and satellites. The rapid advancement of semiconductor fabrication processes and the continuous reduction in device feature size have led to an increase in the significance of the synergistic effects of TID and SEE in static random access memory (SRAM). In order to elucidate the involved physical mechanisms, the synergistic effects of TID and single-event upset (SEU) in a new kind of 130 nm 7T silicon-on-insulator (SOI) SRAM were investigated by means of cobalt-60 gamma-ray and heavy ion irradiation experiments. The findings demonstrate that 7T SOI SRAM is capable of maintaining normal reading and writing functionality when subjected to TID irradiation at a total dose of up to 750 krad(Si). In general, the TID was observed to reduce the SEU cross-section of the 7T SOI SRAM. However, the extent of this reduction was influenced by the heavy ion LET value and the specific writing data pattern employed. Based on the available evidence, it can be proposed that TID preirradiation represents a promising avenue for enhancing the resilience of 7T SOI SRAMs to SEU. Full article

In this paper, the temperature dependence of single event upset (SEU) cross-section in 28 nm embedded Static Random Access Memory (SRAM) of System in Package (SiP) was investigated. An atmospheric neutron beam with an energy range of MeV~GeV was utilized. The SEU cross-section increased by 39.8% when the temperature increased from 296 K to 382 K. Further Technology Computer Aided Design (TCAD) simulation results show that the temperature has a weak impact on the peak pulse current, which is mainly caused by the change of bipolar amplification effect with temperature. As the temperature increases, the critical charge of the device decreases by about 4.8%. The impact of temperature on the SEU cross-section is determined competitively by the peak pulse current and the critical charge. The impact of temperature on critical charge is expected to become more severe as the feature size is further advanced. Full article

Electrical models play a crucial role in assessing the radiation sensitivity of devices. However, since they are usually not provided for end users, it is essential to have alternative modeling approaches to optimize circuit design before irradiation tests, and to support the understanding of post-irradiation data. This work proposes a novel simplified methodology to evaluate the single-event effects (SEEs) cross-section. To validate the proposed approach, we consider the 6T SRAM cell a case study in four technological nodes. The modeling considers layout features and the doping profile, presenting ways to estimate unknown parameters. The accuracy and limitations are determined by comparing our simulations with actual experimental data. The results demonstrated a strong correlation with irradiation data, without requiring any fitting of the simulation results or access to process design kit (PDK) data. This proves that our approach is a reliable method for calculating the single-event upset (SEU) cross-section for heavy-ion irradiation. Full article

Single Event Upsets (SEUs) are most likely to cause bit flips within the trained parameters of a convolutional neural network (CNN). Therefore, it is crucial to analyze and implement hardening techniques to enhance their reliability under radiation. In this paper, random fault injections into the weights of LeNet-5 were carried out in order to evaluate and propose strategies to improve the reliability of a CNN. According to the results of an SEU fault injection, the accuracy of the CNN can be classified into the following three categories: benign conditions, poor conditions, and critical conditions. Two efficient methods for mitigating weight-related SEUs are proposed, as follows: weight limiting and Triple Modular Redundancy (TMR) for the critical bit of the critical layer. The hardening results show that when the number of SEU faults is small, the weight limiting almost completely eliminates the critical and poor conditions of LeNet-5’s accuracy. Additionally, even when the number of SEU faults is large enough, combining the weight limiting and TMR methods for the critical bit of the critical layer can retain the occurrence rate of benign conditions at 98%, saving 99.3% of the hardware resources compared to the Full-TMR hardening method. Full article

Due to the advantages of parallel architecture and low power consumption, a field-programmable gate array (FPGA) is typically utilized as the hardware for convolutional neural network (CNN) accelerators. However, SRAM-based FPGA devices are extremely susceptible to single-event upsets (SEUs) induced by space radiation. In this paper, a fault tolerance analysis and fault injection experiments are applied to a CNN accelerator, and the overall results show that SEUs occurring in a control unit (CTRL) lead to the highest system error rate, which is over 70%. After that, a hybrid hardening strategy consisting of a finite state machine error-correcting circuit (FSM-ECC) and a triple modular redundancy automatic hardening technique (TMR-AHT) is proposed in this paper to achieve a tradeoff between radiation reliability and design overhead. Moreover, the proposed methodology has very small workload and good migration ability. Finally, by full exploiting the fault tolerance property of CNNs, a highly reliable CNN accelerator with the proposed hybrid hardening strategy is implemented with Xilinx Zynq-7035. When BER is 2 × 10⁻⁶, the proposed hybrid hardening strategy reduces the whole system error rate by 78.95% with the overhead of an extra 20.7% of look-up tables (LUTs) and 20.9% of flip-flops (FFs). Full article

This work explains that the Coulomb elastic process on the nucleus is a major source of single-event effects (SEE) for protons within the energy range of 1–10 MeV. The infinite range of Coulomb interactions implies an exceptionally high recoil probability. This research seeks to extend the investigations under which the elastic process becomes significant in the energy deposition process by providing a simplified methodology to evaluate the elastic contribution impact on the reliability of electronics. The goal is to derive a method to provide a simple way to calculate and predict the SEE cross-section. At very low energy, we observe a significant increase in the proton differential cross-section. The use of a direct Monte Carlo approach would mainly trigger low energy recoiling ions, and a very long calculation time would be necessary to observe the tail of the spectrum. In this sense, this work provides a simple methodology to calculate the SEE cross-section. The single-event upset (SEU) cross-section results demonstrate a good agreement with the experimental data in terms of shape and order of magnitude for different technological nodes. Full article

A new physics-based compact model, which makes it possible to simulate in a unified way the neutrons and protons of cosmic ray-induced SEU cross-sections, including the effects from nuclear reaction products and from direct ionization by low-energy protons, has been proposed and validated. The proposed approach is analytical and based on explicit analytical relationships and approximations with physics-based fitting parameters. GEANT4 or SRIM numerical calculations can be used as an aid to adjust or refine the phenomenological parameters or functions included in the model, taking into account real geometrical configurations and chemical compositions of the devices. In particular, explicit energy dependencies of the soft error cross-sections for protons and neutrons over a wide range of nucleon energies were obtained and validated. The main application areas of the developed model include space physics, accelerator studies high energy physics and nuclear experiments. Full article

In the pursuit of enhancing the technological maturity of innovative magnetic sensing techniques, opportunities presented by in-orbit platforms (IOD/IOV experiments) provide a means to evaluate their in-flight capabilities. The Magnetic Experiments for the Laser Interferometer Space Antenna (MELISA) represent a set of in-flight demonstrators designed to characterize the low-frequency noise performance of a magnetic measurement system within a challenging space environment. In Low Earth Orbit (LEO) satellites, electronic circuits are exposed to high levels of radiation coming from energetic particles trapped by the Earth’s magnetic field, solar flares, and galactic cosmic rays. A significant effect is the accidental bit-flipping in memory registers. This work presents an analysis of memory data redundancy resources using auxiliary second flash memory and exposes recovery options to retain critical data utilizing a duplicated data structure. A new and lightweight technique, CCM (Cross-Checking and Mirroring), is proposed to verify the proper performance of these techniques. Four alternative algorithms included in the original version of the MELISA software (Version v0.0) are presented. All the versions have been validated and evaluated according to various merit indicators. The evaluations showed similar performances for the proposed techniques, and they are valid for situations in which the flash memory suffers from more than one bit-flip. The overhead due to the introduction of additional instructions to the main code is negligible, even in the target experiment based on an 8-bit microcontroller. Full article

Integrated circuits suffer severe deterioration due to single-event upsets (SEUs) in irradiated environments. Spin-transfer torque magnetic random-access memory (STT-MRAM) appears to be a promising candidate for next-generation memory as it shows promising properties, such as non-volatility, speed, and unlimited endurance. One of the important merits of STT-MRAM is its radiation hardness, thanks to its core component, a magnetic tunnel junction (MTJ), being capable of good function in an irradiated environment. This property makes MRAM attractive for space and nuclear technology applications. In this paper, a novel radiation-hardened triple modular redundancy (TMR) design for anti-radiation reinforcement is proposed based on the utilization of STT-MTJ devices. Simulation results demonstrate the radiation-hardened performance of the design. This shows improvements in the design’s robustness against ionizing radiation. Full article

Planar devices and FinFET devices exhibit significant differences in single-event upset (SEU) response and charge collection. However, the charge collection process during SEU in FinFET devices has not been thoroughly investigated. This article addresses this gap by establishing a FinFET SRAM simulation structure and employing simulation software to delve into the charge collection process of FinFET devices during single-event upset. The results reveal substantial differences in charge collection between NMOS and PMOS, and that direct incidence of PMOS leads to the phenomenon of multiple-node charge collection causing SRAM unit upset followed by recovery. Full article

The increasing demand for high-speed, energy-efficient, and miniaturized electronics has led to significant challenges and compromises in the domain of conventional clock-based digital designs, most notably reduced circuit reliability, particularly in mission-critical hardware. At scaled technology nodes, devices are vulnerable to transient or soft errors, such as Single Event Upset (SEU) and Single Event Latch-up (SEL). External radiation, internal electromagnetic interference (EMI), or noise are the primary sources of these errors, which can compromise the circuit functionality. In response to these challenges, the Quasi-Delay-Insensitive (QDI) Null Convention Logic (NCL) asynchronous design paradigm has emerged as a promising alternative, offering advantages such as ultra-low power performance, reduced noise and EMI, and resilience to process, voltage, and temperature variations. Moreover, its unique architecture and insensitivity to timing variations offers a degree of resistance against transient errors; however, it is not entirely resilient. Several resiliency schemes are available to detect and mitigate soft errors in QDI circuits, with approaches based on redundancy proving to be the most effective in ensuring complete resilience across all major QDI implementation paradigms, including NCL, Pre-charge/Weak-charge Half Buffers (PCHB/WCHB), and Sleep Convention Logic (SCL). This research focuses on one such redundancy-based resiliency scheme for QDI NCL circuits, known as the dual-modular redundancy-based NCL (DMR-NCL) architecture, and addresses the absence of formal methods for the verification and analysis of such circuits. A novel methodology has been proposed for formally verifying the correctness of DMR-NCL circuits synthesized from their synchronous counterparts, covering both safety (functional correctness) and liveness (the absence of deadlock). In addition, this research introduces a formal framework for the vulnerability analysis of DMR-NCL circuits against SEU/SEL. To demonstrate the framework’s efficacy and scalability, a prototype computer-aided support tool has been developed, which verifies and analyzes multiple DMR-NCL benchmark circuits of varying sizes and complexities. Full article

Static random-access memory (SRAM), a pivotal component in integrated circuits, finds extensive applications and remains a focal point in the global research on single-event effects (SEEs). Prolonged exposure to irradiation, particularly the displacement damage effect (DD) induced by high-energy protons, poses a substantial threat to the performance of electronic devices. Additionally, the impact of proton displacement damage effects on the performance of a six-transistor SRAM with an asymmetric structure is not well understood. In this paper, we conducted an analysis of the impact and regularities of DD on the upset cross-sections of SRAM and simulated the single-event upset (SEU) characteristics of SRAM using the Monte Carlo method. The research findings reveal an overall increasing trend in upset cross-sections with the augmentation of proton energy. Notably, the effect of proton irradiation on the SEU cross-section is related to the storage state of SRAM. Due to the asymmetry in the distribution of sensitive regions during the storage of “0” and “1”, the impact of DD in the two initial states is not uniform. These findings can be used to identify the causes of SEU in memory devices. Full article