research-article

A Java Processor IP Design for Embedded SoC

Authors:

Jun-Fu WangAuthors Info & Claims

ACM Transactions on Embedded Computing Systems (TECS), Volume 14, Issue 2

Article No.: 35, Pages 1 - 25

https://doi.org/10.1145/2629649

Published: 17 February 2015 Publication History

Abstract

In this article, we present a reusable Java processor IP for application processors of embedded systems. For the Java microarchitecture, we propose a low-cost stack memory design that supports a two-fold instruction folding pipeline and a low-complexity Java exception handling hardware. We also propose a mapping between the Java dynamic class loading model and the SoC platform-based design principle so that the Java core can be encapsulated as a reusable IP. To achieve this goal, a two-level method area with two on-chip circular buffers is proposed as an interface between the RISC core and the Java core. The proposed architecture is implemented on a Xilinx Virtex-5 FPGA device. Experimental results show that its performance has some advantages over other Java processors and a Java VM with JIT acceleration on a PowerPC platform.

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Cited By

Sylvestre LChailloux ESérot J(2023)Accelerating OCaml Programs on FPGAInternational Journal of Parallel Programming10.1007/s10766-022-00748-z51:2-3(186-207)Online publication date: 1-Jun-2023
https://dl.acm.org/doi/10.1007/s10766-022-00748-z
Tsai CLin Y(2018)A Hardwired Priority-Queue Scheduler for a Four-Core Java SoC2018 IEEE International Symposium on Circuits and Systems (ISCAS)10.1109/ISCAS.2018.8351129(1-4)Online publication date: May-2018
https://doi.org/10.1109/ISCAS.2018.8351129
Yiyu T(2018)A Hardware-oriented Object Model for Java in an Embedded ProcessorMicroprocessors and Microsystems10.1016/j.micpro.2018.08.007Online publication date: Aug-2018
https://doi.org/10.1016/j.micpro.2018.08.007
Show More Cited By

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A Java Processor IP Design for Embedded SoC

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Information & Contributors

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Published In

cover image ACM Transactions on Embedded Computing Systems

ACM Transactions on Embedded Computing Systems Volume 14, Issue 2

March 2015

472 pages

ISSN:1539-9087

EISSN:1558-3465

DOI:10.1145/2737797

Editor:
Sandeep K. Shukla
Virginia Tech, USA

Issue’s Table of Contents

Copyright © 2015 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

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ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 17 February 2015

Accepted: 01 May 2014

Revised: 01 December 2013

Received: 01 December 2012

Published in TECS Volume 14, Issue 2

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Cited By

Sylvestre LChailloux ESérot J(2023)Accelerating OCaml Programs on FPGAInternational Journal of Parallel Programming10.1007/s10766-022-00748-z51:2-3(186-207)Online publication date: 1-Jun-2023
https://dl.acm.org/doi/10.1007/s10766-022-00748-z
Tsai CLin Y(2018)A Hardwired Priority-Queue Scheduler for a Four-Core Java SoC2018 IEEE International Symposium on Circuits and Systems (ISCAS)10.1109/ISCAS.2018.8351129(1-4)Online publication date: May-2018
https://doi.org/10.1109/ISCAS.2018.8351129
Yiyu T(2018)A Hardware-oriented Object Model for Java in an Embedded ProcessorMicroprocessors and Microsystems10.1016/j.micpro.2018.08.007Online publication date: Aug-2018
https://doi.org/10.1016/j.micpro.2018.08.007
Tsai CLin CChen CLin YJi WHong S(2017)Hardwiring the OS kernel into a Java application processor2017 IEEE 28th International Conference on Application-specific Systems, Architectures and Processors (ASAP)10.1109/ASAP.2017.7995259(53-60)Online publication date: Jul-2017
https://doi.org/10.1109/ASAP.2017.7995259
Tsai CWu TSu HChen C(2016)JAIP-MP: A Four-Core Java Application Processor for Embedded SystemsVLSI-SoC: Design for Reliability, Security, and Low Power10.1007/978-3-319-46097-0_9(170-192)Online publication date: 13-Sep-2016
https://doi.org/10.1007/978-3-319-46097-0_9
Tsai CWu TSu H(2015)JAIP-MP: A four-core Java application processor2015 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)10.1109/VLSI-SoC.2015.7314414(189-194)Online publication date: Oct-2015
https://doi.org/10.1109/VLSI-SoC.2015.7314414

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