VLSI test expertise system using a control flow model
Authors: 
G. Saucier, C. BellonAuthors Info & Claims
Abstract
The automatic generation of test programs for VLSI circuits and systems remains an unanswered wish. The solution seems to be a computerized expert aid, integrated in a whole system for circuit design. This paper outlines the concepts of an intelligent agent whose aims are to help the designer in appraising the diagnosability of the device or the system under design, to suggest design modifications, to generate test patterns for elementary modules and to assemble the basic test sequences into a test program for the whole circuit.
Emphasis is put in this paper on this last task, especially for systems described by a control flow model (CADOC language) which is suitable for VLSI circuits like general purpose or dedicated micro-processors, distributed controllers, etc... The CAT system works like an intelligent assistant for test program generation and like an expert system for the diagnosis on the chip.
References
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C. ROBACH, P. MALECHA, "Computer Aided Testability evaluation and test generation", International Test Conference, Cherry Hill 83, Philadelphia, USA, 1983.
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C. BELLON, C. ROBACH, G. SAUCIER, "An intelligent assistant for test program generation: the SUPERCAT system", International Conference on Computer Aided Design (ICC AD), Santa Clara, USA, 1983.
[3]
C, BELLON, G. ROBACH; G. SAUCIER, "VLSI test Program generation: a system for intelligent assistance", IEEE International Conference on Computer Design/VLSI in Computers (ICCD), New York, USA 1983.
[4]
P. AMBLARD, M. CRASTES DE PAULET, J. RARIVOMANANA, G. SAUCIER, "CADOC a functional specification and simulation tool", ICCAD, Santa Clara, USA, 1983
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P. AMBLARD, M. CRASTES DE PAULET, J. RARIVOMANANA, G. SAUCIER, "Méthodes et outils CAO de conception et d'optimisation de circuits intégrés complexes", Grant DAII-IMAG, 3rd Report, 1983.
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C. BELLON, G. SAUCIER, "Vérification de circuits complexes et analyse dynamique", Journées d'Electronique, Lausanne, Switzerland, 1983.
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Index Terms
- VLSI test expertise system using a control flow model
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Information
Published In
June 1984
715 pages
ISBN:0818605421
Sponsors
- SIGDA: ACM Special Interest Group on Design Automation
- IEEE: Institute of Electrical and Electronics Engineers
- IEEE-CS: Computer Society
Publisher
IEEE Press
Publication History
Published: 25 June 1984
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DAC '84 Paper Acceptance Rate 116 of 290 submissions, 40%;
Overall Acceptance Rate 1,770 of 5,499 submissions, 32%
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