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RTGEN: An Algorithm for Automatic Generation of Reservation Tables from Architectural Descriptions

Published: 01 November 1999 Publication History

Abstract

Reservation Tables (RTs) have long been used to detect conflicts between operations that simultaneously access the same architectural resource. Traditionally, these RTs have been specified explicitly by the designer. However, the increasing complexity of modern processors makes the manual specification of RTs cumbersome and error-prone. Furthermore, manual specification of such conflict information is infeasible for supporting rapid architectural exploration. In this paper we present an algorithm to automatically generate RTs from a high-level processor description, with the goal of avoiding manual specification of RTs, resulting in more concise architectural specifications and also supporting faster turn-around time in Design Space Exploration. We demonstrate the utility of our approach on a set of experiments using the TI C6201 VLIW DSP and DLX processor architectures, and a suite of multimedia and scientific applications.

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  • (2003)Instruction Scheduler Generation for Retargetable CompilationIEEE Design & Test10.1109/MDT.2003.117305120:1(34-41)Online publication date: 1-Jan-2003
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cover image ACM Conferences
ISSS '99: Proceedings of the 12th international symposium on System synthesis
November 1999
133 pages
ISBN:076950356X

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IEEE Computer Society

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Published: 01 November 1999

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View all
  • (2004)A procedure for obtaining a behavioral description for the control logic of a non-linear pipelineProceedings of the 2004 Asia and South Pacific Design Automation Conference10.5555/1015090.1015112(86-91)Online publication date: 27-Jan-2004
  • (2004)Processor-memory coexploration using an architecture description languageACM Transactions on Embedded Computing Systems10.1145/972627.9726343:1(140-162)Online publication date: 1-Feb-2004
  • (2003)Instruction Scheduler Generation for Retargetable CompilationIEEE Design & Test10.1109/MDT.2003.117305120:1(34-41)Online publication date: 1-Jan-2003
  • (2002)Memory System Connectivity ExplorationProceedings of the conference on Design, automation and test in Europe10.5555/882452.874550Online publication date: 4-Mar-2002
  • (2002)Quick pipingACM SIGPLAN Notices10.1145/566225.51385937:7(175-184)Online publication date: 19-Jun-2002
  • (2002)Quick pipingProceedings of the joint conference on Languages, compilers and tools for embedded systems: software and compilers for embedded systems10.1145/513829.513859(175-184)Online publication date: 19-Jun-2002
  • (2001)Access pattern based local memory customization for low power embedded systemsProceedings of the conference on Design, automation and test in Europe10.5555/367072.367973(778-784)Online publication date: 13-Mar-2001
  • (2000)MISTProceedings of the 2000 IEEE/ACM international conference on Computer-aided design10.5555/602902.602999(431-438)Online publication date: 5-Nov-2000
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  • (2000)How to solve the current memory access and data transfer bottlenecksProceedings of the conference on Design, automation and test in Europe10.1145/343647.343813(426-435)Online publication date: 1-Jan-2000
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