research-article

Practical placement and routing techniques for analog circuit designs

Authors:

Evangeline F. Y. Young,

K. P. PunAuthors Info & Claims

ICCAD '10: Proceedings of the International Conference on Computer-Aided Design

Pages 675 - 679

Published: 07 November 2010 Publication History

Abstract

In this paper, we will present an effective layout method for analog circuits. We consider symmetry constraint, common centroid constraint, device merging and device clustering during the placement step. Symmetric routing will then be performed. In order to have successful routing, we will perform analog-based routability-driven adjustment during the placement process, taking into account for analog circuits that wires are not preferred to be layout on top of active devices. All these concepts were put together in our tool. Experimental results show that we can generate quality analog layout within minutes of time that passes the design rule check, layout-schematic verification and the simulation results are comparable with those of manual design, while a manual design will take a designer a couple of days to generate.

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Cited By

Li YLin YMadhusudan MSharma ASapatnekar SHarjani RHu J(2022)Performance-driven Wire Sizing for Analog Integrated CircuitsACM Transactions on Design Automation of Electronic Systems10.1145/355954228:2(1-23)Online publication date: 26-Aug-2022
https://dl.acm.org/doi/10.1145/3559542
Chi HLiu CChen H(2020)Wire Load Oriented Analog Routing with Matching ConstraintsACM Transactions on Design Automation of Electronic Systems10.1145/340393225:6(1-26)Online publication date: 25-Aug-2020
https://dl.acm.org/doi/10.1145/3403932
Chin CPan PChen HChen TLin JHenkel J(2013)Efficient analog layout prototyping by layout reuse with routing preservationProceedings of the International Conference on Computer-Aided Design10.5555/2561828.2561836(40-47)Online publication date: 18-Nov-2013
https://dl.acm.org/doi/10.5555/2561828.2561836
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Practical placement and routing techniques for analog circuit designs
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Information & Contributors

Information

Published In

cover image ACM Conferences

ICCAD '10: Proceedings of the International Conference on Computer-Aided Design

November 2010

863 pages

ISBN:9781424481927

General Chair:
Louis Scheffer
Howard Hughes Medical Institute, Ashburn, VA
,
Program Chairs:
Joel Phillips
Cadence Research Labs, Berkeley, CA
,
Alan J. Hu
Univ. of British Columbia, Vancouver, BC V6T 1Z4 Canada

Sponsors

SIGDA: ACM Special Interest Group on Design Automation
IEEE CEDA

Publisher

IEEE Press

Publication History

Published: 07 November 2010

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Research-article

Conference

ICCAD '10

Sponsor:

SIGDA

ICCAD '10: The International Conference on Computer-Aided Design

November 7 - 11, 2010

California, San Jose

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Overall Acceptance Rate 457 of 1,762 submissions, 26%

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Cited By

Li YLin YMadhusudan MSharma ASapatnekar SHarjani RHu J(2022)Performance-driven Wire Sizing for Analog Integrated CircuitsACM Transactions on Design Automation of Electronic Systems10.1145/355954228:2(1-23)Online publication date: 26-Aug-2022
https://dl.acm.org/doi/10.1145/3559542
Chi HLiu CChen H(2020)Wire Load Oriented Analog Routing with Matching ConstraintsACM Transactions on Design Automation of Electronic Systems10.1145/340393225:6(1-26)Online publication date: 25-Aug-2020
https://dl.acm.org/doi/10.1145/3403932
Chin CPan PChen HChen TLin JHenkel J(2013)Efficient analog layout prototyping by layout reuse with routing preservationProceedings of the International Conference on Computer-Aided Design10.5555/2561828.2561836(40-47)Online publication date: 18-Nov-2013
https://dl.acm.org/doi/10.5555/2561828.2561836
Liao YChen YCai XLiu CChen TAyala JJones AMadden PCoskun A(2013)LASERProceedings of the 23rd ACM international conference on Great lakes symposium on VLSI10.1145/2483028.2483071(107-112)Online publication date: 2-May-2013
https://dl.acm.org/doi/10.1145/2483028.2483071
Ou HChien HChang Y(2013)Simultaneous analog placement and routing with current flow and current density considerationsProceedings of the 50th Annual Design Automation Conference10.1145/2463209.2488739(1-6)Online publication date: 29-May-2013
https://dl.acm.org/doi/10.1145/2463209.2488739
Chien HOu HChen TKuan TChang Y(2013)Double patterning lithography-aware analog placementProceedings of the 50th Annual Design Automation Conference10.1145/2463209.2488738(1-6)Online publication date: 29-May-2013
https://dl.acm.org/doi/10.1145/2463209.2488738
Pan PChen HCheng YLiu JHu WHu A(2012)Configurable analog routing methodology via technology and design constraint unificationProceedings of the International Conference on Computer-Aided Design10.1145/2429384.2429517(620-626)Online publication date: 5-Nov-2012
https://dl.acm.org/doi/10.1145/2429384.2429517
Ou HChien HChang YGroeneveld PSciuto DHassoun S(2012)Non-uniform multilevel analog routing with matching constraintsProceedings of the 49th Annual Design Automation Conference10.1145/2228360.2228458(549-554)Online publication date: 3-Jun-2012
https://dl.acm.org/doi/10.1145/2228360.2228458
Lin CLu CLin JChang SHu JKoh C(2012)Routability-driven placement algorithm for analog integrated circuitsProceedings of the 2012 ACM international symposium on International Symposium on Physical Design10.1145/2160916.2160934(71-78)Online publication date: 25-Mar-2012
https://dl.acm.org/doi/10.1145/2160916.2160934
Chou POu HChang YPhillips JHu AGraeb H(2011)Heterogeneous B*-trees for analog placement with symmetry and regularity considerationsProceedings of the International Conference on Computer-Aided Design10.5555/2132325.2132445(512-516)Online publication date: 7-Nov-2011
https://dl.acm.org/doi/10.5555/2132325.2132445
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