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The ARM Cortex-A510 is the successor to the ARM Cortex-A55 and the first ARMv9 high efficiency “LITTLE” CPU. It is the companion to the ARM Cortex-A710 "big" core. It's a 64-bit instruction set clean-sheet CPU designed by ARM Holdings' Cambridge design team. Design: * 3-wide in-order design, the Cortex-A55 was 2-wide. * 3-wide fetch and decode front-end as well as 3-wide issue and execute on the back-end, which includes 3 ALU's. Improvements: * 35% performance uplift compared to Cortex-A55 * 20% more energy efficient than Cortex-A55 * 3x ML uplift

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  • The ARM Cortex-A510 is the successor to the ARM Cortex-A55 and the first ARMv9 high efficiency “LITTLE” CPU. It is the companion to the ARM Cortex-A710 "big" core. It's a 64-bit instruction set clean-sheet CPU designed by ARM Holdings' Cambridge design team. Design: * 3-wide in-order design, the Cortex-A55 was 2-wide. * 3-wide fetch and decode front-end as well as 3-wide issue and execute on the back-end, which includes 3 ALU's. Improvements: * 35% performance uplift compared to Cortex-A55 * 20% more energy efficient than Cortex-A55 * 3x ML uplift (en)
  • ARM Cortex-A510是一個基於ARMv964位指令集架構設計的中央處理器以及ARM內核。由安謀控股旗下劍橋設計中心的劍橋團隊設計。 (zh)
dbo:wikiPageID
  • 68551858 (xsd:integer)
dbo:wikiPageLength
  • 3098 (xsd:nonNegativeInteger)
dbo:wikiPageRevisionID
  • 1097651707 (xsd:integer)
dbo:wikiPageWikiLink
dbp:arch
dbp:designfirm
dbp:hypertransportFastest
  • unit= unit= (en)
dbp:hypertransportSlowest
  • 2.020000 (xsd:double)
dbp:microarch
  • ARM Cortex-A510 (en)
dbp:name
  • ARM Cortex-A510 (en)
dbp:pcode
  • Klein (en)
dbp:predecessor
dbp:producedStart
  • 2021 (xsd:integer)
dbp:wikiPageUsesTemplate
dcterms:subject
rdfs:comment
  • The ARM Cortex-A510 is the successor to the ARM Cortex-A55 and the first ARMv9 high efficiency “LITTLE” CPU. It is the companion to the ARM Cortex-A710 "big" core. It's a 64-bit instruction set clean-sheet CPU designed by ARM Holdings' Cambridge design team. Design: * 3-wide in-order design, the Cortex-A55 was 2-wide. * 3-wide fetch and decode front-end as well as 3-wide issue and execute on the back-end, which includes 3 ALU's. Improvements: * 35% performance uplift compared to Cortex-A55 * 20% more energy efficient than Cortex-A55 * 3x ML uplift (en)
  • ARM Cortex-A510是一個基於ARMv964位指令集架構設計的中央處理器以及ARM內核。由安謀控股旗下劍橋設計中心的劍橋團隊設計。 (zh)
rdfs:label
  • ARM Cortex-A510 (en)
  • ARM Cortex-A510 (zh)
owl:sameAs
prov:wasDerivedFrom
foaf:isPrimaryTopicOf
is dbo:wikiPageWikiLink of
is dbp:microarch of
is dbp:successor of
is foaf:primaryTopic of
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