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Radiation hard true single-phase-clock logic for high-speed circuits in 28 nm CMOS
/ Klekotko, A (Leuven U. ; CERN) ; Baszczyk, M (CERN) ; Biereigel, S (Leuven U. ; CERN) ; Kulis, S (CERN) ; Moreira, P (CERN) ; Prinzie, J (Leuven U.) ; Tavernier, F (Leuven U.)
True Single-Phase-Clock (TSPC) dynamic logic is widely used in high-speed circuits such as high-speed SERDES (Serializer/Deserializer) and frequency dividers. TSPC flip-flops (FF) are known for their high operational speed and low power consumption, compared to static FFs. [...]
2023 - 8 p.
- Published in : JINST 18 (2023) C02068
Fulltext: PDF;
In : Topical Workshop on Electronics for Particle Physics 2022 (TWEPP 2022), Bergen, Norway, 19 - 23 Sep 2022, pp.C02068
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2.
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Digital duty-cycle correction circuit for clock paths in radiation-tolerant high-speed wireline transmitters
/ Klekotko, A (Leuven U. ; CERN) ; Baszczyk, M (CERN) ; Biereigel, S (CERN) ; Kulis, S (CERN) ; Martina, F (CERN) ; Moreira, P (CERN) ; Tavernier, F (Leuven U.) ; Prinzie, J (Leuven U.)
Ongoing developments in the field of radiation-toleranthigh-speed transmitters (HSTs)aim at increasing thedata rates above 25 Gb/s while increasingtotal ionizing dose (TID)tolerance above 1 Grad. The use of half-ratearchitectures imposes tight constraints on clock signal quality, in particular itsduty-cycle. [...]
2024 - 7 p.
- Published in : JINST 19 (2024) C02030
Fulltext: PDF;
In : Topical Workshop on Electronics for Particle Physics 2023 (TWEPP 2023), Geremeas, Sardinia, Italy, 1 - 6 Oct 2023, pp.C02030
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3.
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A Radiation-Tolerant 25.6-Gb/s High-Speed Transmitter in 28-nm CMOS With a Tolerance of 1 Grad
/ Klekotko, A (CERN ; Leuven U.) ; Biereigel, S (CERN) ; Baszczyk, M (CERN) ; Moreira, P (CERN) ; Martina, F (CERN) ; Prinzie, J (Leuven U.) ; Kulis, S (Leuven U.)
This article presents a 25.6-Gbit $\cdot $ s−1 high-speed transmitter (HST) manufactured using 28-nm CMOS technology. The HST macroblock includes an all-digital phase-locked loop (ADPLL), duty cycle corrector (DCC) circuit, data pattern generator, serializer, and a driver capable of driving the differential 100- $\Omega $ line as well as a silicon photonics (SiPh) ring modulator (RM). [...]
2024 - 9 p.
- Published in : IEEE Trans. Nucl. Sci. 71 (2024) 2124-2132
Fulltext: PDF;
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4.
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MALTA-Cz: A radiation hard full-size monolithic CMOS sensor with small electrodes on high-resistivity Czochralski substrate
/ Pernegger, H. (CERN) ; Allport, P. (Birmingham U.) ; Berlea, D.V. (DESY, Zeuthen) ; Birman, A. (Technion) ; Bortoletto, D. (Oxford U.) ; Buttar, C. (Glasgow U.) ; Charbon, E. (LPHE, Lausanne) ; Dachs, F. (CERN) ; Dao, V. (CERN) ; Denizli, H. (Abant Izzet Baysal U.) et al.
Depleted Monolithic Active Pixel Sensor (DMAPS) sensors developed in the Tower Semiconductor 180 nm CMOS imaging process have been designed in the context of the ATLAS ITk upgrade Phase-II at the HL-LHC and for future collider experiments. The "MALTA-Czochralski (MALTA-Cz)" full size DMAPS sensor has been developed with the goal to demonstrate a radiation hard, thin CMOS sensor with high granularity, high hit-rate capability, fast response time and superior radiation tolerance. [...]
arXiv:2301.03912.-
2023-09-13 - 24 p.
- Published in : JINST 18 (2023) P09018
Fulltext: 2301.03912 - PDF; Publication - PDF;
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5.
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Dual use driver for high speed links transmitters in the future high energy physics experiments
/ Baszczyk, M (CERN) ; Biereigel, S (CERN) ; Klekotko, A (CERN ; Leuven U.) ; Kulis, S (CERN) ; Martina, F (CERN) ; Moreira, P (CERN)
The paper presents the Dual Use Driver (DUDE) for highspeed links, a circuit designed for the Demonstrator ASIC for Radiation-Tolerant Transmitter in 28 nm CMOS (DART28) developed under the EP-R&D; programme on technologies for future high energyphysics experiments. The driver operates at 25.6 Gbps and it allows driving both 100 Ωtransmission lines and optical Ring Modulators (RMs) integrated in a photonics integrated circuit(PIC). [...]
2024 - 7 p.
- Published in : JINST 19 (2024) C03013
Fulltext: PDF;
In : Topical Workshop on Electronics for Particle Physics 2023 (TWEPP 2023), Geremeas, Sardinia, Italy, 1 - 6 Oct 2023, pp.C03013
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7.
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NA62 Liquid Krypton Purity Monitor
/ Bremer, Johan (CERN) ; Bryman, Douglas (British Columbia U. ; TRIUMF) ; Danielsson, Hans (CERN) ; Falaleev, Valeri (Dubna, JINR ; INFN, Perugia) ; Koettig, Torsten (CERN) ; Kurchaninov, Leonid (TRIUMF) ; Liberadzka-Porret, Joanna (CERN) ; Onufrena, Aleksandra (CERN) ; Velghe, Bob (TRIUMF)
A system for determining the purity of liquid krypton employed in the NA62 rare kaon decay experiment at CERN was developed based on the use of a time projection chamber. The attenuation of drifting ionization electrons from absorption of 511 keV gamma rays in liquid krypton was measured to estimate the purity. [...]
arXiv:2210.16232.-
2023-10-10 - 6 p.
- Published in : Nucl. Instrum. Methods Phys. Res., A 1057 (2023) 168764
Fulltext: 2210.16232 - PDF; Publication - PDF;
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8.
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The lpGBT PLL and CDR Architecture, Performance and SEE Robustness
/ Biereigel, Stefan (Brandenburg Tech. U. ; Leuven U. ; CERN) ; Kulis, Szymon (CERN) ; Francisco, Rui (CERN) ; Leitao, Pedro Vicente (CERN) ; Leroux, Paul (Leuven U.) ; Moreira, Paulo (CERN) ; Prinzie, Jeffrey (Leuven U.)
We present the design, architecture and experimental results of the low jitter Clock and Data Recovery (CDR) and Phase Locked Loop (PLL) circuit in the Low-Power Gigabit Transceiver (lpGBT) ASIC. This circuit includes a low noise radiation-tolerant integrated LC-oscillator with a nominal frequency of 5.12 GHz to support a 10.24 Gbps uplink and a 2.56 Gbps downlink CDR. [...]
SISSA, 2020 - 5 p.
- Published in : PoS TWEPP2019 (2020) 034
Fulltext: PDF;
In : TWEPP 2019 Topical Workshop on Electronics for Particle Physics, Santiago De Compostela, Spain, 2 - 6 Sep 2019, pp.034
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DMAPS Monopix developments in large and small electrode designs
/ Bespin, C. (Bonn U.) ; Barbero, M. (Marseille, CPPM) ; Barrillon, P. (Marseille, CPPM) ; Berdalovic, I. (CERN) ; Bhat, S. (Marseille, CPPM) ; Breugnon, P. (Marseille, CPPM) ; Caicedo, I. (Bonn U.) ; Cardella, R. (CERN) ; Chen, Z. (Marseille, CPPM) ; Degerli, Y. (IRFU, Saclay) et al.
LF-Monopix1 and TJ-Monopix1 are depleted monolithic active pixel sensors (DMAPS) in 150 nm LFoundry and 180 nm TowerJazz CMOS technologies respectively. They are designed for usage in high-rate and high-radiation environments such as the ATLAS Inner Tracker at the High-Luminosity Large Hadron Collider (HL-LHC). [...]
arXiv:2006.02297.-
2020-10-21 - 7 p.
- Published in : Nucl. Instrum. Methods Phys. Res., A 978 (2020) 164460
In : 12th international "Hiroshima" Symposium on the Development and Application of Semiconductor Tracking Detectors (HSTD), Hiroshima, Japan, 14 - 18 Dec 2019, pp.164460
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10.
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A 2.56-GHz SEU Radiation Hard $LC$ -Tank VCO for High-Speed Communication Links in 65-nm CMOS Technology
/ Prinzie, Jeffrey (Leuven U.) ; Christiansen, Jorgen (CERN) ; Moreira, Paulo (CERN) ; Steyaert, Michiel (Leuven U.) ; Leroux, Paul (Leuven U.)
This paper presents a radiation tolerant phase-locked loop CMOS application-specified integrated circuit with an optimized voltage controlled oscillator (VCO) for single-event upsets (SEUs). The circuit is designed for high-energy particle physics experiments for low-jitter clock generation and clock recovery. [...]
2017 - 6 p.
- Published in : IEEE Trans. Nucl. Sci. 65 (2018) 407-412
In : 54th Annual IEEE International Nuclear and Space Radiation Effects Conference, New Orleans, LA, USA, 17 - 21 Jul 2017, pp.407-412
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