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Acceleration beyond lowest order event generation. An outlook on further parallelism within MadGraph5_aMC@NLO / Wettersten, Zenny (CERN ; Vienna, OAW) ; Mattelaer, Olivier (Louvain U., CP3) ; Roiser, Stefan (CERN) ; Schöfbeck, Robert (Vienna, OAW) ; Valassi, Andrea (CERN)
An important area of high energy physics studies at the Large Hadron Collider (LHC) currently concerns the need for more extensive and precise comparison data. Important tools in this realm are event reweighing and evaluation of more precise next-to-leading order (NLO) processes via Monte Carlo event generators, especially in the context of the upcoming High Luminosity LHC. [...]
arXiv:2312.07440.- 2024 - 8 p. - Published in : EPJ Web Conf.: 295 (2024) , pp. 10001
Fulltext: 2312.07440 - PDF; document - PDF;
In : 26th International Conference on Computing in High Energy & Nuclear Physics, Norfolk, Virginia, Us, 8 - 12 May 2023, pp.10001

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Madgraph5_aMC@NLO on GPUs and vector CPUs Experience with the first alpha release / Hageboeck, Stephan (CERN) ; Childers, Taylor (Argonne (main)) ; Hopkins, Walter (Argonne (main)) ; Mattelaer, Olivier (Cathol. U. Louvain (main)) ; Nichols, Nathan (Argonne (main)) ; Roiser, Stefan (CERN) ; Teig, Jørgen (CERN) ; Valassi, Andrea (CERN) ; Vuosalo, Carl (U. Wisconsin, Madison (main)) ; Wettersten, Zenny (CERN)
Madgraph5_aMC@NLO is one of the most-frequently used Monte-Carlo event generators at the LHC, and an important consumer of compute resources. The software has been reengineered to maintain the overall look and feel of the user interface while speeding up event generation on CPUs and GPUs. [...]
arXiv:2312.02898.- 2024 - 8 p. - Published in : EPJ Web Conf. 295 (2024) 11013 Fulltext: document - PDF; 2312.02898 - PDF;
In : 26th International Conference on Computing in High Energy & Nuclear Physics, Norfolk, Virginia, Us, 8 - 12 May 2023, pp.11013

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The perfectly parallel program: Architectures for hardware acceleration and heterogeneous computing (1/2) / Wettersten, Zenny (speaker) (CERN)
- Technical details of processing units in the context of hardware acceleration - Flynn's taxonomy of computer architectures and its relation to types of software parallelism - Data-level parallelism as a solution to current bottlenecks in scientific computing - Evaluating the possible speedup hardware can provide - How physical limitations in instruction/memory access affect your code
2024 - 3360. Inverted CSC; Inverted CERN School of Computing 2024 External links: Talk details; Event details In : Inverted CERN School of Computing 2024

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The perfectly parallel program: Design philosophy for parallel programming (2/2) / Wettersten, Zenny (speaker) (CERN)
- Relating the fundamental restrictions and capabilities of hardware parallelism to software engineering - Defining what makes an algorithm "parallel" or not - Considerations for designing a parallel algorithm with respect to control flow and memory access - Legacy code, and how to go about re-designing existing software for novel hardware
2024 - 3274. Inverted CSC; Inverted CERN School of Computing 2024 External links: Talk details; Event details In : Inverted CERN School of Computing 2024

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Simplifying QCD event generation with chirality flow, reference vectors and spin directions / Boman, Emil (Lund U.) ; Lifson, Andrew (Lund U.) ; Sjodahl, Malin (Lund U.) ; Warnerbring, Adam (Siegen U.) ; Wettersten, Zenny (CERN ; Vienna, OAW)
The chirality-flow formalism, combined with good choices of gauge reference vectors, simplifies tree-level calculations to the extent that it is often possible to write down amplitudes corresponding to Feynman diagrams immediately. It has also proven to give a very sizable speedup in a proof of concept implementation of massless tree-level QED in MadGraph5_aMC@NLO. [...]
arXiv:2312.07447; MCnet-23-20.- 2024-02-01 - 29 p. - Published in : JHEP 2402 (2024) 005 Fulltext: document - PDF; 2312.07447 - PDF;

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似た著者名：
1	Wettersten, Z.
1	Wettersten, Zenny Jovi Joestar

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